#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
#[cfg(not(feature = "nosync"))]
pub use crate::stm32f7::peripherals::tim1_v3::Instance;
pub use crate::stm32f7::peripherals::tim1_v3::{
CCMR3_Output, AF1, AF2, ARR, BDTR, CCER, CCMR1, CCMR2, CCR1, CCR2, CCR3, CCR4, CCR5, CNT, CR1,
CR2, CRR6, DCR, DIER, DMAR, EGR, PSC, RCR, SMCR, SR,
};
pub use crate::stm32f7::peripherals::tim1_v3::{RegisterBlock, ResetValues};
pub mod TIM8 {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x40010400,
_marker: ::core::marker::PhantomData,
};
pub const reset: ResetValues = ResetValues {
CR1: 0x00000000,
CR2: 0x00000000,
SMCR: 0x00000000,
DIER: 0x00000000,
SR: 0x00000000,
EGR: 0x00000000,
CCMR1: 0x00000000,
CCMR2: 0x00000000,
CCER: 0x00000000,
CNT: 0x00000000,
PSC: 0x00000000,
ARR: 0x00000000,
CCR1: 0x00000000,
CCR2: 0x00000000,
CCR3: 0x00000000,
CCR4: 0x00000000,
DCR: 0x00000000,
DMAR: 0x00000000,
RCR: 0x00000000,
BDTR: 0x00000000,
CCMR3_Output: 0x00000000,
CCR5: 0x00000000,
CRR6: 0x00000000,
AF1: 0x00000000,
AF2: 0x00000000,
};
#[cfg(not(feature = "nosync"))]
#[allow(renamed_and_removed_lints)]
#[allow(private_no_mangle_statics)]
#[no_mangle]
static mut TIM8_TAKEN: bool = false;
#[cfg(not(feature = "nosync"))]
#[inline]
pub fn take() -> Option<Instance> {
external_cortex_m::interrupt::free(|_| unsafe {
if TIM8_TAKEN {
None
} else {
TIM8_TAKEN = true;
Some(INSTANCE)
}
})
}
#[cfg(not(feature = "nosync"))]
#[inline]
pub fn release(inst: Instance) {
external_cortex_m::interrupt::free(|_| unsafe {
if TIM8_TAKEN && inst.addr == INSTANCE.addr {
TIM8_TAKEN = false;
} else {
panic!("Released a peripheral which was not taken");
}
});
}
#[cfg(not(feature = "nosync"))]
#[inline]
pub unsafe fn steal() -> Instance {
TIM8_TAKEN = true;
INSTANCE
}
}
pub const TIM8: *const RegisterBlock = 0x40010400 as *const _;