Struct stm32mp1::stm32mp157::otg::otg_hs_diepeachmsk1::OTG_HS_DIEPEACHMSK1_SPEC

pub struct OTG_HS_DIEPEACHMSK1_SPEC;

This register works with the OTG_DIEPINT1 register to generate a dedicated interrupt OTG_HS_EP1_IN for endpoint #1. The IN endpoint interrupt for a specific status in the OTG_DOEPINT1 register can be masked by writing into the corresponding bit in this register. Status bits are masked by default.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see otg_hs_diepeachmsk1 module

Trait Implementations

impl Readable for OTG_HS_DIEPEACHMSK1_SPEC

read() method returns otg_hs_diepeachmsk1::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for OTG_HS_DIEPEACHMSK1_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for OTG_HS_DIEPEACHMSK1_SPEC

reset() method sets OTG_HS_DIEPEACHMSK1 to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for OTG_HS_DIEPEACHMSK1_SPEC

write(|w| ..) method takes otg_hs_diepeachmsk1::W writer structure

type Writer = W

Writer type argument to write, et al.