stm32mp1 0.16.0

Device support crates for STM32MP1 devices
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121

///Register `DTHRCTL` reader
pub type R = crate::R<DTHRCTLrs>;
///Register `DTHRCTL` writer
pub type W = crate::W<DTHRCTLrs>;
///Field `NONISOTHREN` reader - NONISOTHREN
pub type NONISOTHREN_R = crate::BitReader;
///Field `NONISOTHREN` writer - NONISOTHREN
pub type NONISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `ISOTHREN` reader - ISOTHREN
pub type ISOTHREN_R = crate::BitReader;
///Field `ISOTHREN` writer - ISOTHREN
pub type ISOTHREN_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `TXTHRLEN` reader - TXTHRLEN
pub type TXTHRLEN_R = crate::FieldReader<u16>;
///Field `TXTHRLEN` writer - TXTHRLEN
pub type TXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
///Field `RXTHREN` reader - RXTHREN
pub type RXTHREN_R = crate::BitReader;
///Field `RXTHREN` writer - RXTHREN
pub type RXTHREN_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `RXTHRLEN` reader - RXTHRLEN
pub type RXTHRLEN_R = crate::FieldReader<u16>;
///Field `RXTHRLEN` writer - RXTHRLEN
pub type RXTHRLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
///Field `ARPEN` reader - ARPEN
pub type ARPEN_R = crate::BitReader;
///Field `ARPEN` writer - ARPEN
pub type ARPEN_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    ///Bit 0 - NONISOTHREN
    #[inline(always)]
    pub fn nonisothren(&self) -> NONISOTHREN_R {
        NONISOTHREN_R::new((self.bits & 1) != 0)
    }
    ///Bit 1 - ISOTHREN
    #[inline(always)]
    pub fn isothren(&self) -> ISOTHREN_R {
        ISOTHREN_R::new(((self.bits >> 1) & 1) != 0)
    }
    ///Bits 2:10 - TXTHRLEN
    #[inline(always)]
    pub fn txthrlen(&self) -> TXTHRLEN_R {
        TXTHRLEN_R::new(((self.bits >> 2) & 0x01ff) as u16)
    }
    ///Bit 16 - RXTHREN
    #[inline(always)]
    pub fn rxthren(&self) -> RXTHREN_R {
        RXTHREN_R::new(((self.bits >> 16) & 1) != 0)
    }
    ///Bits 17:25 - RXTHRLEN
    #[inline(always)]
    pub fn rxthrlen(&self) -> RXTHRLEN_R {
        RXTHRLEN_R::new(((self.bits >> 17) & 0x01ff) as u16)
    }
    ///Bit 27 - ARPEN
    #[inline(always)]
    pub fn arpen(&self) -> ARPEN_R {
        ARPEN_R::new(((self.bits >> 27) & 1) != 0)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DTHRCTL")
            .field("nonisothren", &self.nonisothren())
            .field("isothren", &self.isothren())
            .field("txthrlen", &self.txthrlen())
            .field("rxthren", &self.rxthren())
            .field("rxthrlen", &self.rxthrlen())
            .field("arpen", &self.arpen())
            .finish()
    }
}
impl W {
    ///Bit 0 - NONISOTHREN
    #[inline(always)]
    pub fn nonisothren(&mut self) -> NONISOTHREN_W<DTHRCTLrs> {
        NONISOTHREN_W::new(self, 0)
    }
    ///Bit 1 - ISOTHREN
    #[inline(always)]
    pub fn isothren(&mut self) -> ISOTHREN_W<DTHRCTLrs> {
        ISOTHREN_W::new(self, 1)
    }
    ///Bits 2:10 - TXTHRLEN
    #[inline(always)]
    pub fn txthrlen(&mut self) -> TXTHRLEN_W<DTHRCTLrs> {
        TXTHRLEN_W::new(self, 2)
    }
    ///Bit 16 - RXTHREN
    #[inline(always)]
    pub fn rxthren(&mut self) -> RXTHREN_W<DTHRCTLrs> {
        RXTHREN_W::new(self, 16)
    }
    ///Bits 17:25 - RXTHRLEN
    #[inline(always)]
    pub fn rxthrlen(&mut self) -> RXTHRLEN_W<DTHRCTLrs> {
        RXTHRLEN_W::new(self, 17)
    }
    ///Bit 27 - ARPEN
    #[inline(always)]
    pub fn arpen(&mut self) -> ARPEN_W<DTHRCTLrs> {
        ARPEN_W::new(self, 27)
    }
}
/**OTG device threshold control register

You can [`read`](crate::Reg::read) this register and get [`dthrctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dthrctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#OTG:DTHRCTL)*/
pub struct DTHRCTLrs;
impl crate::RegisterSpec for DTHRCTLrs {
    type Ux = u32;
}
///`read()` method returns [`dthrctl::R`](R) reader structure
impl crate::Readable for DTHRCTLrs {}
///`write(|w| ..)` method takes [`dthrctl::W`](W) writer structure
impl crate::Writable for DTHRCTLrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets DTHRCTL to value 0
impl crate::Resettable for DTHRCTLrs {}