stm32mp1 0.16.0

Device support crates for STM32MP1 devices
Documentation 
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///Register `HWCFGR` reader
pub type R = crate::R<HWCFGRrs>;
///Field `CFG1` reader - CFG1
pub type CFG1_R = crate::FieldReader;
impl R {
    ///Bits 0:3 - CFG1
    #[inline(always)]
    pub fn cfg1(&self) -> CFG1_R {
        CFG1_R::new((self.bits & 0x0f) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("HWCFGR")
            .field("cfg1", &self.cfg1())
            .finish()
    }
}
/**HASH Hardware Configuration Register

You can [`read`](crate::Reg::read) this register and get [`hwcfgr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP157.html#HASH1:HWCFGR)*/
pub struct HWCFGRrs;
impl crate::RegisterSpec for HWCFGRrs {
    type Ux = u32;
}
///`read()` method returns [`hwcfgr::R`](R) reader structure
impl crate::Readable for HWCFGRrs {}
///`reset()` method sets HWCFGR to value 0x01
impl crate::Resettable for HWCFGRrs {
    const RESET_VALUE: u32 = 0x01;
}