stm32mp1 0.16.0

Device support crates for STM32MP1 devices
Documentation 
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///Register `VER` reader
pub type R = crate::R<VERrs>;
///Field `MINREV` reader - MINREV
pub type MINREV_R = crate::FieldReader;
///Field `MAJREV` reader - MAJREV
pub type MAJREV_R = crate::FieldReader;
impl R {
    ///Bits 0:3 - MINREV
    #[inline(always)]
    pub fn minrev(&self) -> MINREV_R {
        MINREV_R::new((self.bits & 0x0f) as u8)
    }
    ///Bits 4:7 - MAJREV
    #[inline(always)]
    pub fn majrev(&self) -> MAJREV_R {
        MAJREV_R::new(((self.bits >> 4) & 0x0f) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("VER")
            .field("minrev", &self.minrev())
            .field("majrev", &self.majrev())
            .finish()
    }
}
/**PWR IP version register

You can [`read`](crate::Reg::read) this register and get [`ver::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP153.html#PWR:VER)*/
pub struct VERrs;
impl crate::RegisterSpec for VERrs {
    type Ux = u32;
}
///`read()` method returns [`ver::R`](R) reader structure
impl crate::Readable for VERrs {}
///`reset()` method sets VER to value 0x11
impl crate::Resettable for VERrs {
    const RESET_VALUE: u32 = 0x11;
}