stm32mp1 0.15.0

Device support crates for STM32MP1 devices
Documentation
#[doc = "Register `MDMA_C22IFCR` writer"]
pub struct W(crate::W<MDMA_C22IFCR_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<MDMA_C22IFCR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<MDMA_C22IFCR_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<MDMA_C22IFCR_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `CTEIF` writer - CTEIF"]
pub type CTEIF_W<'a> = crate::BitWriter<'a, u32, MDMA_C22IFCR_SPEC, bool, 0>;
#[doc = "Field `CCTCIF` writer - CCTCIF"]
pub type CCTCIF_W<'a> = crate::BitWriter<'a, u32, MDMA_C22IFCR_SPEC, bool, 1>;
#[doc = "Field `CBRTIF` writer - CBRTIF"]
pub type CBRTIF_W<'a> = crate::BitWriter<'a, u32, MDMA_C22IFCR_SPEC, bool, 2>;
#[doc = "Field `CBTIF` writer - CBTIF"]
pub type CBTIF_W<'a> = crate::BitWriter<'a, u32, MDMA_C22IFCR_SPEC, bool, 3>;
#[doc = "Field `CLTCIF` writer - CLTCIF"]
pub type CLTCIF_W<'a> = crate::BitWriter<'a, u32, MDMA_C22IFCR_SPEC, bool, 4>;
impl W {
    #[doc = "Bit 0 - CTEIF"]
    #[inline(always)]
    pub fn cteif(&mut self) -> CTEIF_W {
        CTEIF_W::new(self)
    }
    #[doc = "Bit 1 - CCTCIF"]
    #[inline(always)]
    pub fn cctcif(&mut self) -> CCTCIF_W {
        CCTCIF_W::new(self)
    }
    #[doc = "Bit 2 - CBRTIF"]
    #[inline(always)]
    pub fn cbrtif(&mut self) -> CBRTIF_W {
        CBRTIF_W::new(self)
    }
    #[doc = "Bit 3 - CBTIF"]
    #[inline(always)]
    pub fn cbtif(&mut self) -> CBTIF_W {
        CBTIF_W::new(self)
    }
    #[doc = "Bit 4 - CLTCIF"]
    #[inline(always)]
    pub fn cltcif(&mut self) -> CLTCIF_W {
        CLTCIF_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "MDMA channel 22 interrupt flag clear register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mdma_c22ifcr](index.html) module"]
pub struct MDMA_C22IFCR_SPEC;
impl crate::RegisterSpec for MDMA_C22IFCR_SPEC {
    type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [mdma_c22ifcr::W](W) writer structure"]
impl crate::Writable for MDMA_C22IFCR_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets MDMA_C22IFCR to value 0"]
impl crate::Resettable for MDMA_C22IFCR_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}