stm32l4x6/tim15/
egr.rs

1#[doc = r" Value to write to the register"]
2pub struct W {
3    bits: u32,
4}
5impl super::EGR {
6    #[doc = r" Writes to the register"]
7    #[inline]
8    pub fn write<F>(&self, f: F)
9    where
10        F: FnOnce(&mut W) -> &mut W,
11    {
12        let mut w = W::reset_value();
13        f(&mut w);
14        self.register.set(w.bits);
15    }
16}
17#[doc = r" Proxy"]
18pub struct _BGW<'a> {
19    w: &'a mut W,
20}
21impl<'a> _BGW<'a> {
22    #[doc = r" Sets the field bit"]
23    pub fn set_bit(self) -> &'a mut W {
24        self.bit(true)
25    }
26    #[doc = r" Clears the field bit"]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r" Writes raw bits to the field"]
31    #[inline]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        const MASK: bool = true;
34        const OFFSET: u8 = 7;
35        self.w.bits &= !((MASK as u32) << OFFSET);
36        self.w.bits |= ((value & MASK) as u32) << OFFSET;
37        self.w
38    }
39}
40#[doc = r" Proxy"]
41pub struct _TGW<'a> {
42    w: &'a mut W,
43}
44impl<'a> _TGW<'a> {
45    #[doc = r" Sets the field bit"]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r" Clears the field bit"]
50    pub fn clear_bit(self) -> &'a mut W {
51        self.bit(false)
52    }
53    #[doc = r" Writes raw bits to the field"]
54    #[inline]
55    pub fn bit(self, value: bool) -> &'a mut W {
56        const MASK: bool = true;
57        const OFFSET: u8 = 6;
58        self.w.bits &= !((MASK as u32) << OFFSET);
59        self.w.bits |= ((value & MASK) as u32) << OFFSET;
60        self.w
61    }
62}
63#[doc = r" Proxy"]
64pub struct _COMGW<'a> {
65    w: &'a mut W,
66}
67impl<'a> _COMGW<'a> {
68    #[doc = r" Sets the field bit"]
69    pub fn set_bit(self) -> &'a mut W {
70        self.bit(true)
71    }
72    #[doc = r" Clears the field bit"]
73    pub fn clear_bit(self) -> &'a mut W {
74        self.bit(false)
75    }
76    #[doc = r" Writes raw bits to the field"]
77    #[inline]
78    pub fn bit(self, value: bool) -> &'a mut W {
79        const MASK: bool = true;
80        const OFFSET: u8 = 5;
81        self.w.bits &= !((MASK as u32) << OFFSET);
82        self.w.bits |= ((value & MASK) as u32) << OFFSET;
83        self.w
84    }
85}
86#[doc = r" Proxy"]
87pub struct _CC1GW<'a> {
88    w: &'a mut W,
89}
90impl<'a> _CC1GW<'a> {
91    #[doc = r" Sets the field bit"]
92    pub fn set_bit(self) -> &'a mut W {
93        self.bit(true)
94    }
95    #[doc = r" Clears the field bit"]
96    pub fn clear_bit(self) -> &'a mut W {
97        self.bit(false)
98    }
99    #[doc = r" Writes raw bits to the field"]
100    #[inline]
101    pub fn bit(self, value: bool) -> &'a mut W {
102        const MASK: bool = true;
103        const OFFSET: u8 = 1;
104        self.w.bits &= !((MASK as u32) << OFFSET);
105        self.w.bits |= ((value & MASK) as u32) << OFFSET;
106        self.w
107    }
108}
109#[doc = r" Proxy"]
110pub struct _UGW<'a> {
111    w: &'a mut W,
112}
113impl<'a> _UGW<'a> {
114    #[doc = r" Sets the field bit"]
115    pub fn set_bit(self) -> &'a mut W {
116        self.bit(true)
117    }
118    #[doc = r" Clears the field bit"]
119    pub fn clear_bit(self) -> &'a mut W {
120        self.bit(false)
121    }
122    #[doc = r" Writes raw bits to the field"]
123    #[inline]
124    pub fn bit(self, value: bool) -> &'a mut W {
125        const MASK: bool = true;
126        const OFFSET: u8 = 0;
127        self.w.bits &= !((MASK as u32) << OFFSET);
128        self.w.bits |= ((value & MASK) as u32) << OFFSET;
129        self.w
130    }
131}
132impl W {
133    #[doc = r" Reset value of the register"]
134    #[inline]
135    pub fn reset_value() -> W {
136        W { bits: 0 }
137    }
138    #[doc = r" Writes raw bits to the register"]
139    #[inline]
140    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
141        self.bits = bits;
142        self
143    }
144    #[doc = "Bit 7 - Break generation"]
145    #[inline]
146    pub fn bg(&mut self) -> _BGW {
147        _BGW { w: self }
148    }
149    #[doc = "Bit 6 - Trigger generation"]
150    #[inline]
151    pub fn tg(&mut self) -> _TGW {
152        _TGW { w: self }
153    }
154    #[doc = "Bit 5 - Capture/Compare control update generation"]
155    #[inline]
156    pub fn comg(&mut self) -> _COMGW {
157        _COMGW { w: self }
158    }
159    #[doc = "Bit 1 - Capture/compare 1 generation"]
160    #[inline]
161    pub fn cc1g(&mut self) -> _CC1GW {
162        _CC1GW { w: self }
163    }
164    #[doc = "Bit 0 - Update generation"]
165    #[inline]
166    pub fn ug(&mut self) -> _UGW {
167        _UGW { w: self }
168    }
169}
stm32l4x6/tim15/egr.rs

stm32l4x6/tim15/
egr.rs
