1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CR3 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `WUFIE`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum WUFIER {
48 #[doc = "Interrupt is inhibited"]
49 DISABLED,
50 #[doc = "An USART interrupt is generated whenever WUF=1 in the ISR register"]
51 ENABLED,
52}
53impl WUFIER {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 WUFIER::DISABLED => false,
69 WUFIER::ENABLED => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> WUFIER {
76 match value {
77 false => WUFIER::DISABLED,
78 true => WUFIER::ENABLED,
79 }
80 }
81 #[doc = "Checks if the value of the field is `DISABLED`"]
82 #[inline]
83 pub fn is_disabled(&self) -> bool {
84 *self == WUFIER::DISABLED
85 }
86 #[doc = "Checks if the value of the field is `ENABLED`"]
87 #[inline]
88 pub fn is_enabled(&self) -> bool {
89 *self == WUFIER::ENABLED
90 }
91}
92#[doc = "Possible values of the field `WUS`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum WUSR {
95 #[doc = "WUF active on address match"]
96 ADDRESS,
97 #[doc = "WuF active on Start bit detection"]
98 START,
99 #[doc = "WUF active on RXNE"]
100 RXNE,
101 #[doc = r" Reserved"]
102 _Reserved(u8),
103}
104impl WUSR {
105 #[doc = r" Value of the field as raw bits"]
106 #[inline]
107 pub fn bits(&self) -> u8 {
108 match *self {
109 WUSR::ADDRESS => 0,
110 WUSR::START => 2,
111 WUSR::RXNE => 3,
112 WUSR::_Reserved(bits) => bits,
113 }
114 }
115 #[allow(missing_docs)]
116 #[doc(hidden)]
117 #[inline]
118 pub fn _from(value: u8) -> WUSR {
119 match value {
120 0 => WUSR::ADDRESS,
121 2 => WUSR::START,
122 3 => WUSR::RXNE,
123 i => WUSR::_Reserved(i),
124 }
125 }
126 #[doc = "Checks if the value of the field is `ADDRESS`"]
127 #[inline]
128 pub fn is_address(&self) -> bool {
129 *self == WUSR::ADDRESS
130 }
131 #[doc = "Checks if the value of the field is `START`"]
132 #[inline]
133 pub fn is_start(&self) -> bool {
134 *self == WUSR::START
135 }
136 #[doc = "Checks if the value of the field is `RXNE`"]
137 #[inline]
138 pub fn is_rxne(&self) -> bool {
139 *self == WUSR::RXNE
140 }
141}
142#[doc = r" Value of the field"]
143pub struct SCARCNTR {
144 bits: u8,
145}
146impl SCARCNTR {
147 #[doc = r" Value of the field as raw bits"]
148 #[inline]
149 pub fn bits(&self) -> u8 {
150 self.bits
151 }
152}
153#[doc = "Possible values of the field `DEP`"]
154#[derive(Clone, Copy, Debug, PartialEq)]
155pub enum DEPR {
156 #[doc = "DE signal is active high"]
157 HIGH,
158 #[doc = "DE signal is active low"]
159 LOW,
160}
161impl DEPR {
162 #[doc = r" Returns `true` if the bit is clear (0)"]
163 #[inline]
164 pub fn bit_is_clear(&self) -> bool {
165 !self.bit()
166 }
167 #[doc = r" Returns `true` if the bit is set (1)"]
168 #[inline]
169 pub fn bit_is_set(&self) -> bool {
170 self.bit()
171 }
172 #[doc = r" Value of the field as raw bits"]
173 #[inline]
174 pub fn bit(&self) -> bool {
175 match *self {
176 DEPR::HIGH => false,
177 DEPR::LOW => true,
178 }
179 }
180 #[allow(missing_docs)]
181 #[doc(hidden)]
182 #[inline]
183 pub fn _from(value: bool) -> DEPR {
184 match value {
185 false => DEPR::HIGH,
186 true => DEPR::LOW,
187 }
188 }
189 #[doc = "Checks if the value of the field is `HIGH`"]
190 #[inline]
191 pub fn is_high(&self) -> bool {
192 *self == DEPR::HIGH
193 }
194 #[doc = "Checks if the value of the field is `LOW`"]
195 #[inline]
196 pub fn is_low(&self) -> bool {
197 *self == DEPR::LOW
198 }
199}
200#[doc = "Possible values of the field `DEM`"]
201#[derive(Clone, Copy, Debug, PartialEq)]
202pub enum DEMR {
203 #[doc = "DE function is disabled"]
204 DISABLED,
205 #[doc = "The DE signal is output on the RTS pin"]
206 ENABLED,
207}
208impl DEMR {
209 #[doc = r" Returns `true` if the bit is clear (0)"]
210 #[inline]
211 pub fn bit_is_clear(&self) -> bool {
212 !self.bit()
213 }
214 #[doc = r" Returns `true` if the bit is set (1)"]
215 #[inline]
216 pub fn bit_is_set(&self) -> bool {
217 self.bit()
218 }
219 #[doc = r" Value of the field as raw bits"]
220 #[inline]
221 pub fn bit(&self) -> bool {
222 match *self {
223 DEMR::DISABLED => false,
224 DEMR::ENABLED => true,
225 }
226 }
227 #[allow(missing_docs)]
228 #[doc(hidden)]
229 #[inline]
230 pub fn _from(value: bool) -> DEMR {
231 match value {
232 false => DEMR::DISABLED,
233 true => DEMR::ENABLED,
234 }
235 }
236 #[doc = "Checks if the value of the field is `DISABLED`"]
237 #[inline]
238 pub fn is_disabled(&self) -> bool {
239 *self == DEMR::DISABLED
240 }
241 #[doc = "Checks if the value of the field is `ENABLED`"]
242 #[inline]
243 pub fn is_enabled(&self) -> bool {
244 *self == DEMR::ENABLED
245 }
246}
247#[doc = "Possible values of the field `DDRE`"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum DDRER {
250 #[doc = "DMA is not disabled in case of reception error"]
251 NOTDISABLED,
252 #[doc = "DMA is disabled following a reception error"]
253 DISABLED,
254}
255impl DDRER {
256 #[doc = r" Returns `true` if the bit is clear (0)"]
257 #[inline]
258 pub fn bit_is_clear(&self) -> bool {
259 !self.bit()
260 }
261 #[doc = r" Returns `true` if the bit is set (1)"]
262 #[inline]
263 pub fn bit_is_set(&self) -> bool {
264 self.bit()
265 }
266 #[doc = r" Value of the field as raw bits"]
267 #[inline]
268 pub fn bit(&self) -> bool {
269 match *self {
270 DDRER::NOTDISABLED => false,
271 DDRER::DISABLED => true,
272 }
273 }
274 #[allow(missing_docs)]
275 #[doc(hidden)]
276 #[inline]
277 pub fn _from(value: bool) -> DDRER {
278 match value {
279 false => DDRER::NOTDISABLED,
280 true => DDRER::DISABLED,
281 }
282 }
283 #[doc = "Checks if the value of the field is `NOTDISABLED`"]
284 #[inline]
285 pub fn is_not_disabled(&self) -> bool {
286 *self == DDRER::NOTDISABLED
287 }
288 #[doc = "Checks if the value of the field is `DISABLED`"]
289 #[inline]
290 pub fn is_disabled(&self) -> bool {
291 *self == DDRER::DISABLED
292 }
293}
294#[doc = "Possible values of the field `OVRDIS`"]
295#[derive(Clone, Copy, Debug, PartialEq)]
296pub enum OVRDISR {
297 #[doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data"]
298 ENABLED,
299 #[doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register"]
300 DISABLED,
301}
302impl OVRDISR {
303 #[doc = r" Returns `true` if the bit is clear (0)"]
304 #[inline]
305 pub fn bit_is_clear(&self) -> bool {
306 !self.bit()
307 }
308 #[doc = r" Returns `true` if the bit is set (1)"]
309 #[inline]
310 pub fn bit_is_set(&self) -> bool {
311 self.bit()
312 }
313 #[doc = r" Value of the field as raw bits"]
314 #[inline]
315 pub fn bit(&self) -> bool {
316 match *self {
317 OVRDISR::ENABLED => false,
318 OVRDISR::DISABLED => true,
319 }
320 }
321 #[allow(missing_docs)]
322 #[doc(hidden)]
323 #[inline]
324 pub fn _from(value: bool) -> OVRDISR {
325 match value {
326 false => OVRDISR::ENABLED,
327 true => OVRDISR::DISABLED,
328 }
329 }
330 #[doc = "Checks if the value of the field is `ENABLED`"]
331 #[inline]
332 pub fn is_enabled(&self) -> bool {
333 *self == OVRDISR::ENABLED
334 }
335 #[doc = "Checks if the value of the field is `DISABLED`"]
336 #[inline]
337 pub fn is_disabled(&self) -> bool {
338 *self == OVRDISR::DISABLED
339 }
340}
341#[doc = "Possible values of the field `ONEBIT`"]
342#[derive(Clone, Copy, Debug, PartialEq)]
343pub enum ONEBITR {
344 #[doc = "Three sample bit method"]
345 SAMPLE3,
346 #[doc = "One sample bit method"]
347 SAMPLE1,
348}
349impl ONEBITR {
350 #[doc = r" Returns `true` if the bit is clear (0)"]
351 #[inline]
352 pub fn bit_is_clear(&self) -> bool {
353 !self.bit()
354 }
355 #[doc = r" Returns `true` if the bit is set (1)"]
356 #[inline]
357 pub fn bit_is_set(&self) -> bool {
358 self.bit()
359 }
360 #[doc = r" Value of the field as raw bits"]
361 #[inline]
362 pub fn bit(&self) -> bool {
363 match *self {
364 ONEBITR::SAMPLE3 => false,
365 ONEBITR::SAMPLE1 => true,
366 }
367 }
368 #[allow(missing_docs)]
369 #[doc(hidden)]
370 #[inline]
371 pub fn _from(value: bool) -> ONEBITR {
372 match value {
373 false => ONEBITR::SAMPLE3,
374 true => ONEBITR::SAMPLE1,
375 }
376 }
377 #[doc = "Checks if the value of the field is `SAMPLE3`"]
378 #[inline]
379 pub fn is_sample3(&self) -> bool {
380 *self == ONEBITR::SAMPLE3
381 }
382 #[doc = "Checks if the value of the field is `SAMPLE1`"]
383 #[inline]
384 pub fn is_sample1(&self) -> bool {
385 *self == ONEBITR::SAMPLE1
386 }
387}
388#[doc = "Possible values of the field `CTSIE`"]
389#[derive(Clone, Copy, Debug, PartialEq)]
390pub enum CTSIER {
391 #[doc = "Interrupt is inhibited"]
392 DISABLED,
393 #[doc = "An interrupt is generated whenever CTSIF=1 in the ISR register"]
394 ENABLED,
395}
396impl CTSIER {
397 #[doc = r" Returns `true` if the bit is clear (0)"]
398 #[inline]
399 pub fn bit_is_clear(&self) -> bool {
400 !self.bit()
401 }
402 #[doc = r" Returns `true` if the bit is set (1)"]
403 #[inline]
404 pub fn bit_is_set(&self) -> bool {
405 self.bit()
406 }
407 #[doc = r" Value of the field as raw bits"]
408 #[inline]
409 pub fn bit(&self) -> bool {
410 match *self {
411 CTSIER::DISABLED => false,
412 CTSIER::ENABLED => true,
413 }
414 }
415 #[allow(missing_docs)]
416 #[doc(hidden)]
417 #[inline]
418 pub fn _from(value: bool) -> CTSIER {
419 match value {
420 false => CTSIER::DISABLED,
421 true => CTSIER::ENABLED,
422 }
423 }
424 #[doc = "Checks if the value of the field is `DISABLED`"]
425 #[inline]
426 pub fn is_disabled(&self) -> bool {
427 *self == CTSIER::DISABLED
428 }
429 #[doc = "Checks if the value of the field is `ENABLED`"]
430 #[inline]
431 pub fn is_enabled(&self) -> bool {
432 *self == CTSIER::ENABLED
433 }
434}
435#[doc = "Possible values of the field `CTSE`"]
436#[derive(Clone, Copy, Debug, PartialEq)]
437pub enum CTSER {
438 #[doc = "CTS hardware flow control disabled"]
439 DISABLED,
440 #[doc = "CTS mode enabled, data is only transmitted when the CTS input is asserted"]
441 ENABLED,
442}
443impl CTSER {
444 #[doc = r" Returns `true` if the bit is clear (0)"]
445 #[inline]
446 pub fn bit_is_clear(&self) -> bool {
447 !self.bit()
448 }
449 #[doc = r" Returns `true` if the bit is set (1)"]
450 #[inline]
451 pub fn bit_is_set(&self) -> bool {
452 self.bit()
453 }
454 #[doc = r" Value of the field as raw bits"]
455 #[inline]
456 pub fn bit(&self) -> bool {
457 match *self {
458 CTSER::DISABLED => false,
459 CTSER::ENABLED => true,
460 }
461 }
462 #[allow(missing_docs)]
463 #[doc(hidden)]
464 #[inline]
465 pub fn _from(value: bool) -> CTSER {
466 match value {
467 false => CTSER::DISABLED,
468 true => CTSER::ENABLED,
469 }
470 }
471 #[doc = "Checks if the value of the field is `DISABLED`"]
472 #[inline]
473 pub fn is_disabled(&self) -> bool {
474 *self == CTSER::DISABLED
475 }
476 #[doc = "Checks if the value of the field is `ENABLED`"]
477 #[inline]
478 pub fn is_enabled(&self) -> bool {
479 *self == CTSER::ENABLED
480 }
481}
482#[doc = "Possible values of the field `RTSE`"]
483#[derive(Clone, Copy, Debug, PartialEq)]
484pub enum RTSER {
485 #[doc = "RTS hardware flow control disabled"]
486 DISABLED,
487 #[doc = "RTS output enabled, data is only requested when there is space in the receive buffer"]
488 ENABLED,
489}
490impl RTSER {
491 #[doc = r" Returns `true` if the bit is clear (0)"]
492 #[inline]
493 pub fn bit_is_clear(&self) -> bool {
494 !self.bit()
495 }
496 #[doc = r" Returns `true` if the bit is set (1)"]
497 #[inline]
498 pub fn bit_is_set(&self) -> bool {
499 self.bit()
500 }
501 #[doc = r" Value of the field as raw bits"]
502 #[inline]
503 pub fn bit(&self) -> bool {
504 match *self {
505 RTSER::DISABLED => false,
506 RTSER::ENABLED => true,
507 }
508 }
509 #[allow(missing_docs)]
510 #[doc(hidden)]
511 #[inline]
512 pub fn _from(value: bool) -> RTSER {
513 match value {
514 false => RTSER::DISABLED,
515 true => RTSER::ENABLED,
516 }
517 }
518 #[doc = "Checks if the value of the field is `DISABLED`"]
519 #[inline]
520 pub fn is_disabled(&self) -> bool {
521 *self == RTSER::DISABLED
522 }
523 #[doc = "Checks if the value of the field is `ENABLED`"]
524 #[inline]
525 pub fn is_enabled(&self) -> bool {
526 *self == RTSER::ENABLED
527 }
528}
529#[doc = "Possible values of the field `DMAT`"]
530#[derive(Clone, Copy, Debug, PartialEq)]
531pub enum DMATR {
532 #[doc = "DMA mode is disabled for transmission"]
533 DISABLED,
534 #[doc = "DMA mode is enabled for transmission"]
535 ENABLED,
536}
537impl DMATR {
538 #[doc = r" Returns `true` if the bit is clear (0)"]
539 #[inline]
540 pub fn bit_is_clear(&self) -> bool {
541 !self.bit()
542 }
543 #[doc = r" Returns `true` if the bit is set (1)"]
544 #[inline]
545 pub fn bit_is_set(&self) -> bool {
546 self.bit()
547 }
548 #[doc = r" Value of the field as raw bits"]
549 #[inline]
550 pub fn bit(&self) -> bool {
551 match *self {
552 DMATR::DISABLED => false,
553 DMATR::ENABLED => true,
554 }
555 }
556 #[allow(missing_docs)]
557 #[doc(hidden)]
558 #[inline]
559 pub fn _from(value: bool) -> DMATR {
560 match value {
561 false => DMATR::DISABLED,
562 true => DMATR::ENABLED,
563 }
564 }
565 #[doc = "Checks if the value of the field is `DISABLED`"]
566 #[inline]
567 pub fn is_disabled(&self) -> bool {
568 *self == DMATR::DISABLED
569 }
570 #[doc = "Checks if the value of the field is `ENABLED`"]
571 #[inline]
572 pub fn is_enabled(&self) -> bool {
573 *self == DMATR::ENABLED
574 }
575}
576#[doc = "Possible values of the field `DMAR`"]
577#[derive(Clone, Copy, Debug, PartialEq)]
578pub enum DMARR {
579 #[doc = "DMA mode is disabled for reception"]
580 DISABLED,
581 #[doc = "DMA mode is enabled for reception"]
582 ENABLED,
583}
584impl DMARR {
585 #[doc = r" Returns `true` if the bit is clear (0)"]
586 #[inline]
587 pub fn bit_is_clear(&self) -> bool {
588 !self.bit()
589 }
590 #[doc = r" Returns `true` if the bit is set (1)"]
591 #[inline]
592 pub fn bit_is_set(&self) -> bool {
593 self.bit()
594 }
595 #[doc = r" Value of the field as raw bits"]
596 #[inline]
597 pub fn bit(&self) -> bool {
598 match *self {
599 DMARR::DISABLED => false,
600 DMARR::ENABLED => true,
601 }
602 }
603 #[allow(missing_docs)]
604 #[doc(hidden)]
605 #[inline]
606 pub fn _from(value: bool) -> DMARR {
607 match value {
608 false => DMARR::DISABLED,
609 true => DMARR::ENABLED,
610 }
611 }
612 #[doc = "Checks if the value of the field is `DISABLED`"]
613 #[inline]
614 pub fn is_disabled(&self) -> bool {
615 *self == DMARR::DISABLED
616 }
617 #[doc = "Checks if the value of the field is `ENABLED`"]
618 #[inline]
619 pub fn is_enabled(&self) -> bool {
620 *self == DMARR::ENABLED
621 }
622}
623#[doc = "Possible values of the field `SCEN`"]
624#[derive(Clone, Copy, Debug, PartialEq)]
625pub enum SCENR {
626 #[doc = "Smartcard Mode disabled"]
627 DISABLED,
628 #[doc = "Smartcard Mode enabled"]
629 ENABLED,
630}
631impl SCENR {
632 #[doc = r" Returns `true` if the bit is clear (0)"]
633 #[inline]
634 pub fn bit_is_clear(&self) -> bool {
635 !self.bit()
636 }
637 #[doc = r" Returns `true` if the bit is set (1)"]
638 #[inline]
639 pub fn bit_is_set(&self) -> bool {
640 self.bit()
641 }
642 #[doc = r" Value of the field as raw bits"]
643 #[inline]
644 pub fn bit(&self) -> bool {
645 match *self {
646 SCENR::DISABLED => false,
647 SCENR::ENABLED => true,
648 }
649 }
650 #[allow(missing_docs)]
651 #[doc(hidden)]
652 #[inline]
653 pub fn _from(value: bool) -> SCENR {
654 match value {
655 false => SCENR::DISABLED,
656 true => SCENR::ENABLED,
657 }
658 }
659 #[doc = "Checks if the value of the field is `DISABLED`"]
660 #[inline]
661 pub fn is_disabled(&self) -> bool {
662 *self == SCENR::DISABLED
663 }
664 #[doc = "Checks if the value of the field is `ENABLED`"]
665 #[inline]
666 pub fn is_enabled(&self) -> bool {
667 *self == SCENR::ENABLED
668 }
669}
670#[doc = "Possible values of the field `NACK`"]
671#[derive(Clone, Copy, Debug, PartialEq)]
672pub enum NACKR {
673 #[doc = "NACK transmission in case of parity error is disabled"]
674 DISABLED,
675 #[doc = "NACK transmission during parity error is enabled"]
676 ENABLED,
677}
678impl NACKR {
679 #[doc = r" Returns `true` if the bit is clear (0)"]
680 #[inline]
681 pub fn bit_is_clear(&self) -> bool {
682 !self.bit()
683 }
684 #[doc = r" Returns `true` if the bit is set (1)"]
685 #[inline]
686 pub fn bit_is_set(&self) -> bool {
687 self.bit()
688 }
689 #[doc = r" Value of the field as raw bits"]
690 #[inline]
691 pub fn bit(&self) -> bool {
692 match *self {
693 NACKR::DISABLED => false,
694 NACKR::ENABLED => true,
695 }
696 }
697 #[allow(missing_docs)]
698 #[doc(hidden)]
699 #[inline]
700 pub fn _from(value: bool) -> NACKR {
701 match value {
702 false => NACKR::DISABLED,
703 true => NACKR::ENABLED,
704 }
705 }
706 #[doc = "Checks if the value of the field is `DISABLED`"]
707 #[inline]
708 pub fn is_disabled(&self) -> bool {
709 *self == NACKR::DISABLED
710 }
711 #[doc = "Checks if the value of the field is `ENABLED`"]
712 #[inline]
713 pub fn is_enabled(&self) -> bool {
714 *self == NACKR::ENABLED
715 }
716}
717#[doc = "Possible values of the field `HDSEL`"]
718#[derive(Clone, Copy, Debug, PartialEq)]
719pub enum HDSELR {
720 #[doc = "Half duplex mode is not selected"]
721 NOTSELECTED,
722 #[doc = "Half duplex mode is selected"]
723 SELECTED,
724}
725impl HDSELR {
726 #[doc = r" Returns `true` if the bit is clear (0)"]
727 #[inline]
728 pub fn bit_is_clear(&self) -> bool {
729 !self.bit()
730 }
731 #[doc = r" Returns `true` if the bit is set (1)"]
732 #[inline]
733 pub fn bit_is_set(&self) -> bool {
734 self.bit()
735 }
736 #[doc = r" Value of the field as raw bits"]
737 #[inline]
738 pub fn bit(&self) -> bool {
739 match *self {
740 HDSELR::NOTSELECTED => false,
741 HDSELR::SELECTED => true,
742 }
743 }
744 #[allow(missing_docs)]
745 #[doc(hidden)]
746 #[inline]
747 pub fn _from(value: bool) -> HDSELR {
748 match value {
749 false => HDSELR::NOTSELECTED,
750 true => HDSELR::SELECTED,
751 }
752 }
753 #[doc = "Checks if the value of the field is `NOTSELECTED`"]
754 #[inline]
755 pub fn is_not_selected(&self) -> bool {
756 *self == HDSELR::NOTSELECTED
757 }
758 #[doc = "Checks if the value of the field is `SELECTED`"]
759 #[inline]
760 pub fn is_selected(&self) -> bool {
761 *self == HDSELR::SELECTED
762 }
763}
764#[doc = "Possible values of the field `IRLP`"]
765#[derive(Clone, Copy, Debug, PartialEq)]
766pub enum IRLPR {
767 #[doc = "Normal mode"]
768 NORMAL,
769 #[doc = "Low-power mode"]
770 LOWPOWER,
771}
772impl IRLPR {
773 #[doc = r" Returns `true` if the bit is clear (0)"]
774 #[inline]
775 pub fn bit_is_clear(&self) -> bool {
776 !self.bit()
777 }
778 #[doc = r" Returns `true` if the bit is set (1)"]
779 #[inline]
780 pub fn bit_is_set(&self) -> bool {
781 self.bit()
782 }
783 #[doc = r" Value of the field as raw bits"]
784 #[inline]
785 pub fn bit(&self) -> bool {
786 match *self {
787 IRLPR::NORMAL => false,
788 IRLPR::LOWPOWER => true,
789 }
790 }
791 #[allow(missing_docs)]
792 #[doc(hidden)]
793 #[inline]
794 pub fn _from(value: bool) -> IRLPR {
795 match value {
796 false => IRLPR::NORMAL,
797 true => IRLPR::LOWPOWER,
798 }
799 }
800 #[doc = "Checks if the value of the field is `NORMAL`"]
801 #[inline]
802 pub fn is_normal(&self) -> bool {
803 *self == IRLPR::NORMAL
804 }
805 #[doc = "Checks if the value of the field is `LOWPOWER`"]
806 #[inline]
807 pub fn is_low_power(&self) -> bool {
808 *self == IRLPR::LOWPOWER
809 }
810}
811#[doc = "Possible values of the field `IREN`"]
812#[derive(Clone, Copy, Debug, PartialEq)]
813pub enum IRENR {
814 #[doc = "IrDA disabled"]
815 DISABLED,
816 #[doc = "IrDA enabled"]
817 ENABLED,
818}
819impl IRENR {
820 #[doc = r" Returns `true` if the bit is clear (0)"]
821 #[inline]
822 pub fn bit_is_clear(&self) -> bool {
823 !self.bit()
824 }
825 #[doc = r" Returns `true` if the bit is set (1)"]
826 #[inline]
827 pub fn bit_is_set(&self) -> bool {
828 self.bit()
829 }
830 #[doc = r" Value of the field as raw bits"]
831 #[inline]
832 pub fn bit(&self) -> bool {
833 match *self {
834 IRENR::DISABLED => false,
835 IRENR::ENABLED => true,
836 }
837 }
838 #[allow(missing_docs)]
839 #[doc(hidden)]
840 #[inline]
841 pub fn _from(value: bool) -> IRENR {
842 match value {
843 false => IRENR::DISABLED,
844 true => IRENR::ENABLED,
845 }
846 }
847 #[doc = "Checks if the value of the field is `DISABLED`"]
848 #[inline]
849 pub fn is_disabled(&self) -> bool {
850 *self == IRENR::DISABLED
851 }
852 #[doc = "Checks if the value of the field is `ENABLED`"]
853 #[inline]
854 pub fn is_enabled(&self) -> bool {
855 *self == IRENR::ENABLED
856 }
857}
858#[doc = "Possible values of the field `EIE`"]
859#[derive(Clone, Copy, Debug, PartialEq)]
860pub enum EIER {
861 #[doc = "Interrupt is inhibited"]
862 DISABLED,
863 #[doc = "An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register"]
864 ENABLED,
865}
866impl EIER {
867 #[doc = r" Returns `true` if the bit is clear (0)"]
868 #[inline]
869 pub fn bit_is_clear(&self) -> bool {
870 !self.bit()
871 }
872 #[doc = r" Returns `true` if the bit is set (1)"]
873 #[inline]
874 pub fn bit_is_set(&self) -> bool {
875 self.bit()
876 }
877 #[doc = r" Value of the field as raw bits"]
878 #[inline]
879 pub fn bit(&self) -> bool {
880 match *self {
881 EIER::DISABLED => false,
882 EIER::ENABLED => true,
883 }
884 }
885 #[allow(missing_docs)]
886 #[doc(hidden)]
887 #[inline]
888 pub fn _from(value: bool) -> EIER {
889 match value {
890 false => EIER::DISABLED,
891 true => EIER::ENABLED,
892 }
893 }
894 #[doc = "Checks if the value of the field is `DISABLED`"]
895 #[inline]
896 pub fn is_disabled(&self) -> bool {
897 *self == EIER::DISABLED
898 }
899 #[doc = "Checks if the value of the field is `ENABLED`"]
900 #[inline]
901 pub fn is_enabled(&self) -> bool {
902 *self == EIER::ENABLED
903 }
904}
905#[doc = "Possible values of the field `UCESM`"]
906#[derive(Clone, Copy, Debug, PartialEq)]
907pub enum UCESMR {
908 #[doc = "USART clock is disabled in STOP mode"]
909 DISABLED,
910 #[doc = "USART clock is enabled in STOP mode"]
911 ENABLED,
912}
913impl UCESMR {
914 #[doc = r" Returns `true` if the bit is clear (0)"]
915 #[inline]
916 pub fn bit_is_clear(&self) -> bool {
917 !self.bit()
918 }
919 #[doc = r" Returns `true` if the bit is set (1)"]
920 #[inline]
921 pub fn bit_is_set(&self) -> bool {
922 self.bit()
923 }
924 #[doc = r" Value of the field as raw bits"]
925 #[inline]
926 pub fn bit(&self) -> bool {
927 match *self {
928 UCESMR::DISABLED => false,
929 UCESMR::ENABLED => true,
930 }
931 }
932 #[allow(missing_docs)]
933 #[doc(hidden)]
934 #[inline]
935 pub fn _from(value: bool) -> UCESMR {
936 match value {
937 false => UCESMR::DISABLED,
938 true => UCESMR::ENABLED,
939 }
940 }
941 #[doc = "Checks if the value of the field is `DISABLED`"]
942 #[inline]
943 pub fn is_disabled(&self) -> bool {
944 *self == UCESMR::DISABLED
945 }
946 #[doc = "Checks if the value of the field is `ENABLED`"]
947 #[inline]
948 pub fn is_enabled(&self) -> bool {
949 *self == UCESMR::ENABLED
950 }
951}
952#[doc = "Possible values of the field `TCBGTIE`"]
953#[derive(Clone, Copy, Debug, PartialEq)]
954pub enum TCBGTIER {
955 #[doc = "Interrupt is inhibited"]
956 DISABLED,
957 #[doc = "An USART interrupt is generated whenever TCBGT=1 in the ISR register"]
958 ENABLED,
959}
960impl TCBGTIER {
961 #[doc = r" Returns `true` if the bit is clear (0)"]
962 #[inline]
963 pub fn bit_is_clear(&self) -> bool {
964 !self.bit()
965 }
966 #[doc = r" Returns `true` if the bit is set (1)"]
967 #[inline]
968 pub fn bit_is_set(&self) -> bool {
969 self.bit()
970 }
971 #[doc = r" Value of the field as raw bits"]
972 #[inline]
973 pub fn bit(&self) -> bool {
974 match *self {
975 TCBGTIER::DISABLED => false,
976 TCBGTIER::ENABLED => true,
977 }
978 }
979 #[allow(missing_docs)]
980 #[doc(hidden)]
981 #[inline]
982 pub fn _from(value: bool) -> TCBGTIER {
983 match value {
984 false => TCBGTIER::DISABLED,
985 true => TCBGTIER::ENABLED,
986 }
987 }
988 #[doc = "Checks if the value of the field is `DISABLED`"]
989 #[inline]
990 pub fn is_disabled(&self) -> bool {
991 *self == TCBGTIER::DISABLED
992 }
993 #[doc = "Checks if the value of the field is `ENABLED`"]
994 #[inline]
995 pub fn is_enabled(&self) -> bool {
996 *self == TCBGTIER::ENABLED
997 }
998}
999#[doc = "Values that can be written to the field `WUFIE`"]
1000pub enum WUFIEW {
1001 #[doc = "Interrupt is inhibited"]
1002 DISABLED,
1003 #[doc = "An USART interrupt is generated whenever WUF=1 in the ISR register"]
1004 ENABLED,
1005}
1006impl WUFIEW {
1007 #[allow(missing_docs)]
1008 #[doc(hidden)]
1009 #[inline]
1010 pub fn _bits(&self) -> bool {
1011 match *self {
1012 WUFIEW::DISABLED => false,
1013 WUFIEW::ENABLED => true,
1014 }
1015 }
1016}
1017#[doc = r" Proxy"]
1018pub struct _WUFIEW<'a> {
1019 w: &'a mut W,
1020}
1021impl<'a> _WUFIEW<'a> {
1022 #[doc = r" Writes `variant` to the field"]
1023 #[inline]
1024 pub fn variant(self, variant: WUFIEW) -> &'a mut W {
1025 {
1026 self.bit(variant._bits())
1027 }
1028 }
1029 #[doc = "Interrupt is inhibited"]
1030 #[inline]
1031 pub fn disabled(self) -> &'a mut W {
1032 self.variant(WUFIEW::DISABLED)
1033 }
1034 #[doc = "An USART interrupt is generated whenever WUF=1 in the ISR register"]
1035 #[inline]
1036 pub fn enabled(self) -> &'a mut W {
1037 self.variant(WUFIEW::ENABLED)
1038 }
1039 #[doc = r" Sets the field bit"]
1040 pub fn set_bit(self) -> &'a mut W {
1041 self.bit(true)
1042 }
1043 #[doc = r" Clears the field bit"]
1044 pub fn clear_bit(self) -> &'a mut W {
1045 self.bit(false)
1046 }
1047 #[doc = r" Writes raw bits to the field"]
1048 #[inline]
1049 pub fn bit(self, value: bool) -> &'a mut W {
1050 const MASK: bool = true;
1051 const OFFSET: u8 = 22;
1052 self.w.bits &= !((MASK as u32) << OFFSET);
1053 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1054 self.w
1055 }
1056}
1057#[doc = "Values that can be written to the field `WUS`"]
1058pub enum WUSW {
1059 #[doc = "WUF active on address match"]
1060 ADDRESS,
1061 #[doc = "WuF active on Start bit detection"]
1062 START,
1063 #[doc = "WUF active on RXNE"]
1064 RXNE,
1065}
1066impl WUSW {
1067 #[allow(missing_docs)]
1068 #[doc(hidden)]
1069 #[inline]
1070 pub fn _bits(&self) -> u8 {
1071 match *self {
1072 WUSW::ADDRESS => 0,
1073 WUSW::START => 2,
1074 WUSW::RXNE => 3,
1075 }
1076 }
1077}
1078#[doc = r" Proxy"]
1079pub struct _WUSW<'a> {
1080 w: &'a mut W,
1081}
1082impl<'a> _WUSW<'a> {
1083 #[doc = r" Writes `variant` to the field"]
1084 #[inline]
1085 pub fn variant(self, variant: WUSW) -> &'a mut W {
1086 unsafe { self.bits(variant._bits()) }
1087 }
1088 #[doc = "WUF active on address match"]
1089 #[inline]
1090 pub fn address(self) -> &'a mut W {
1091 self.variant(WUSW::ADDRESS)
1092 }
1093 #[doc = "WuF active on Start bit detection"]
1094 #[inline]
1095 pub fn start(self) -> &'a mut W {
1096 self.variant(WUSW::START)
1097 }
1098 #[doc = "WUF active on RXNE"]
1099 #[inline]
1100 pub fn rxne(self) -> &'a mut W {
1101 self.variant(WUSW::RXNE)
1102 }
1103 #[doc = r" Writes raw bits to the field"]
1104 #[inline]
1105 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1106 const MASK: u8 = 3;
1107 const OFFSET: u8 = 20;
1108 self.w.bits &= !((MASK as u32) << OFFSET);
1109 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1110 self.w
1111 }
1112}
1113#[doc = r" Proxy"]
1114pub struct _SCARCNTW<'a> {
1115 w: &'a mut W,
1116}
1117impl<'a> _SCARCNTW<'a> {
1118 #[doc = r" Writes raw bits to the field"]
1119 #[inline]
1120 pub fn bits(self, value: u8) -> &'a mut W {
1121 const MASK: u8 = 7;
1122 const OFFSET: u8 = 17;
1123 self.w.bits &= !((MASK as u32) << OFFSET);
1124 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1125 self.w
1126 }
1127}
1128#[doc = "Values that can be written to the field `DEP`"]
1129pub enum DEPW {
1130 #[doc = "DE signal is active high"]
1131 HIGH,
1132 #[doc = "DE signal is active low"]
1133 LOW,
1134}
1135impl DEPW {
1136 #[allow(missing_docs)]
1137 #[doc(hidden)]
1138 #[inline]
1139 pub fn _bits(&self) -> bool {
1140 match *self {
1141 DEPW::HIGH => false,
1142 DEPW::LOW => true,
1143 }
1144 }
1145}
1146#[doc = r" Proxy"]
1147pub struct _DEPW<'a> {
1148 w: &'a mut W,
1149}
1150impl<'a> _DEPW<'a> {
1151 #[doc = r" Writes `variant` to the field"]
1152 #[inline]
1153 pub fn variant(self, variant: DEPW) -> &'a mut W {
1154 {
1155 self.bit(variant._bits())
1156 }
1157 }
1158 #[doc = "DE signal is active high"]
1159 #[inline]
1160 pub fn high(self) -> &'a mut W {
1161 self.variant(DEPW::HIGH)
1162 }
1163 #[doc = "DE signal is active low"]
1164 #[inline]
1165 pub fn low(self) -> &'a mut W {
1166 self.variant(DEPW::LOW)
1167 }
1168 #[doc = r" Sets the field bit"]
1169 pub fn set_bit(self) -> &'a mut W {
1170 self.bit(true)
1171 }
1172 #[doc = r" Clears the field bit"]
1173 pub fn clear_bit(self) -> &'a mut W {
1174 self.bit(false)
1175 }
1176 #[doc = r" Writes raw bits to the field"]
1177 #[inline]
1178 pub fn bit(self, value: bool) -> &'a mut W {
1179 const MASK: bool = true;
1180 const OFFSET: u8 = 15;
1181 self.w.bits &= !((MASK as u32) << OFFSET);
1182 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1183 self.w
1184 }
1185}
1186#[doc = "Values that can be written to the field `DEM`"]
1187pub enum DEMW {
1188 #[doc = "DE function is disabled"]
1189 DISABLED,
1190 #[doc = "The DE signal is output on the RTS pin"]
1191 ENABLED,
1192}
1193impl DEMW {
1194 #[allow(missing_docs)]
1195 #[doc(hidden)]
1196 #[inline]
1197 pub fn _bits(&self) -> bool {
1198 match *self {
1199 DEMW::DISABLED => false,
1200 DEMW::ENABLED => true,
1201 }
1202 }
1203}
1204#[doc = r" Proxy"]
1205pub struct _DEMW<'a> {
1206 w: &'a mut W,
1207}
1208impl<'a> _DEMW<'a> {
1209 #[doc = r" Writes `variant` to the field"]
1210 #[inline]
1211 pub fn variant(self, variant: DEMW) -> &'a mut W {
1212 {
1213 self.bit(variant._bits())
1214 }
1215 }
1216 #[doc = "DE function is disabled"]
1217 #[inline]
1218 pub fn disabled(self) -> &'a mut W {
1219 self.variant(DEMW::DISABLED)
1220 }
1221 #[doc = "The DE signal is output on the RTS pin"]
1222 #[inline]
1223 pub fn enabled(self) -> &'a mut W {
1224 self.variant(DEMW::ENABLED)
1225 }
1226 #[doc = r" Sets the field bit"]
1227 pub fn set_bit(self) -> &'a mut W {
1228 self.bit(true)
1229 }
1230 #[doc = r" Clears the field bit"]
1231 pub fn clear_bit(self) -> &'a mut W {
1232 self.bit(false)
1233 }
1234 #[doc = r" Writes raw bits to the field"]
1235 #[inline]
1236 pub fn bit(self, value: bool) -> &'a mut W {
1237 const MASK: bool = true;
1238 const OFFSET: u8 = 14;
1239 self.w.bits &= !((MASK as u32) << OFFSET);
1240 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1241 self.w
1242 }
1243}
1244#[doc = "Values that can be written to the field `DDRE`"]
1245pub enum DDREW {
1246 #[doc = "DMA is not disabled in case of reception error"]
1247 NOTDISABLED,
1248 #[doc = "DMA is disabled following a reception error"]
1249 DISABLED,
1250}
1251impl DDREW {
1252 #[allow(missing_docs)]
1253 #[doc(hidden)]
1254 #[inline]
1255 pub fn _bits(&self) -> bool {
1256 match *self {
1257 DDREW::NOTDISABLED => false,
1258 DDREW::DISABLED => true,
1259 }
1260 }
1261}
1262#[doc = r" Proxy"]
1263pub struct _DDREW<'a> {
1264 w: &'a mut W,
1265}
1266impl<'a> _DDREW<'a> {
1267 #[doc = r" Writes `variant` to the field"]
1268 #[inline]
1269 pub fn variant(self, variant: DDREW) -> &'a mut W {
1270 {
1271 self.bit(variant._bits())
1272 }
1273 }
1274 #[doc = "DMA is not disabled in case of reception error"]
1275 #[inline]
1276 pub fn not_disabled(self) -> &'a mut W {
1277 self.variant(DDREW::NOTDISABLED)
1278 }
1279 #[doc = "DMA is disabled following a reception error"]
1280 #[inline]
1281 pub fn disabled(self) -> &'a mut W {
1282 self.variant(DDREW::DISABLED)
1283 }
1284 #[doc = r" Sets the field bit"]
1285 pub fn set_bit(self) -> &'a mut W {
1286 self.bit(true)
1287 }
1288 #[doc = r" Clears the field bit"]
1289 pub fn clear_bit(self) -> &'a mut W {
1290 self.bit(false)
1291 }
1292 #[doc = r" Writes raw bits to the field"]
1293 #[inline]
1294 pub fn bit(self, value: bool) -> &'a mut W {
1295 const MASK: bool = true;
1296 const OFFSET: u8 = 13;
1297 self.w.bits &= !((MASK as u32) << OFFSET);
1298 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1299 self.w
1300 }
1301}
1302#[doc = "Values that can be written to the field `OVRDIS`"]
1303pub enum OVRDISW {
1304 #[doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data"]
1305 ENABLED,
1306 #[doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register"]
1307 DISABLED,
1308}
1309impl OVRDISW {
1310 #[allow(missing_docs)]
1311 #[doc(hidden)]
1312 #[inline]
1313 pub fn _bits(&self) -> bool {
1314 match *self {
1315 OVRDISW::ENABLED => false,
1316 OVRDISW::DISABLED => true,
1317 }
1318 }
1319}
1320#[doc = r" Proxy"]
1321pub struct _OVRDISW<'a> {
1322 w: &'a mut W,
1323}
1324impl<'a> _OVRDISW<'a> {
1325 #[doc = r" Writes `variant` to the field"]
1326 #[inline]
1327 pub fn variant(self, variant: OVRDISW) -> &'a mut W {
1328 {
1329 self.bit(variant._bits())
1330 }
1331 }
1332 #[doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data"]
1333 #[inline]
1334 pub fn enabled(self) -> &'a mut W {
1335 self.variant(OVRDISW::ENABLED)
1336 }
1337 #[doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register"]
1338 #[inline]
1339 pub fn disabled(self) -> &'a mut W {
1340 self.variant(OVRDISW::DISABLED)
1341 }
1342 #[doc = r" Sets the field bit"]
1343 pub fn set_bit(self) -> &'a mut W {
1344 self.bit(true)
1345 }
1346 #[doc = r" Clears the field bit"]
1347 pub fn clear_bit(self) -> &'a mut W {
1348 self.bit(false)
1349 }
1350 #[doc = r" Writes raw bits to the field"]
1351 #[inline]
1352 pub fn bit(self, value: bool) -> &'a mut W {
1353 const MASK: bool = true;
1354 const OFFSET: u8 = 12;
1355 self.w.bits &= !((MASK as u32) << OFFSET);
1356 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1357 self.w
1358 }
1359}
1360#[doc = "Values that can be written to the field `ONEBIT`"]
1361pub enum ONEBITW {
1362 #[doc = "Three sample bit method"]
1363 SAMPLE3,
1364 #[doc = "One sample bit method"]
1365 SAMPLE1,
1366}
1367impl ONEBITW {
1368 #[allow(missing_docs)]
1369 #[doc(hidden)]
1370 #[inline]
1371 pub fn _bits(&self) -> bool {
1372 match *self {
1373 ONEBITW::SAMPLE3 => false,
1374 ONEBITW::SAMPLE1 => true,
1375 }
1376 }
1377}
1378#[doc = r" Proxy"]
1379pub struct _ONEBITW<'a> {
1380 w: &'a mut W,
1381}
1382impl<'a> _ONEBITW<'a> {
1383 #[doc = r" Writes `variant` to the field"]
1384 #[inline]
1385 pub fn variant(self, variant: ONEBITW) -> &'a mut W {
1386 {
1387 self.bit(variant._bits())
1388 }
1389 }
1390 #[doc = "Three sample bit method"]
1391 #[inline]
1392 pub fn sample3(self) -> &'a mut W {
1393 self.variant(ONEBITW::SAMPLE3)
1394 }
1395 #[doc = "One sample bit method"]
1396 #[inline]
1397 pub fn sample1(self) -> &'a mut W {
1398 self.variant(ONEBITW::SAMPLE1)
1399 }
1400 #[doc = r" Sets the field bit"]
1401 pub fn set_bit(self) -> &'a mut W {
1402 self.bit(true)
1403 }
1404 #[doc = r" Clears the field bit"]
1405 pub fn clear_bit(self) -> &'a mut W {
1406 self.bit(false)
1407 }
1408 #[doc = r" Writes raw bits to the field"]
1409 #[inline]
1410 pub fn bit(self, value: bool) -> &'a mut W {
1411 const MASK: bool = true;
1412 const OFFSET: u8 = 11;
1413 self.w.bits &= !((MASK as u32) << OFFSET);
1414 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1415 self.w
1416 }
1417}
1418#[doc = "Values that can be written to the field `CTSIE`"]
1419pub enum CTSIEW {
1420 #[doc = "Interrupt is inhibited"]
1421 DISABLED,
1422 #[doc = "An interrupt is generated whenever CTSIF=1 in the ISR register"]
1423 ENABLED,
1424}
1425impl CTSIEW {
1426 #[allow(missing_docs)]
1427 #[doc(hidden)]
1428 #[inline]
1429 pub fn _bits(&self) -> bool {
1430 match *self {
1431 CTSIEW::DISABLED => false,
1432 CTSIEW::ENABLED => true,
1433 }
1434 }
1435}
1436#[doc = r" Proxy"]
1437pub struct _CTSIEW<'a> {
1438 w: &'a mut W,
1439}
1440impl<'a> _CTSIEW<'a> {
1441 #[doc = r" Writes `variant` to the field"]
1442 #[inline]
1443 pub fn variant(self, variant: CTSIEW) -> &'a mut W {
1444 {
1445 self.bit(variant._bits())
1446 }
1447 }
1448 #[doc = "Interrupt is inhibited"]
1449 #[inline]
1450 pub fn disabled(self) -> &'a mut W {
1451 self.variant(CTSIEW::DISABLED)
1452 }
1453 #[doc = "An interrupt is generated whenever CTSIF=1 in the ISR register"]
1454 #[inline]
1455 pub fn enabled(self) -> &'a mut W {
1456 self.variant(CTSIEW::ENABLED)
1457 }
1458 #[doc = r" Sets the field bit"]
1459 pub fn set_bit(self) -> &'a mut W {
1460 self.bit(true)
1461 }
1462 #[doc = r" Clears the field bit"]
1463 pub fn clear_bit(self) -> &'a mut W {
1464 self.bit(false)
1465 }
1466 #[doc = r" Writes raw bits to the field"]
1467 #[inline]
1468 pub fn bit(self, value: bool) -> &'a mut W {
1469 const MASK: bool = true;
1470 const OFFSET: u8 = 10;
1471 self.w.bits &= !((MASK as u32) << OFFSET);
1472 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1473 self.w
1474 }
1475}
1476#[doc = "Values that can be written to the field `CTSE`"]
1477pub enum CTSEW {
1478 #[doc = "CTS hardware flow control disabled"]
1479 DISABLED,
1480 #[doc = "CTS mode enabled, data is only transmitted when the CTS input is asserted"]
1481 ENABLED,
1482}
1483impl CTSEW {
1484 #[allow(missing_docs)]
1485 #[doc(hidden)]
1486 #[inline]
1487 pub fn _bits(&self) -> bool {
1488 match *self {
1489 CTSEW::DISABLED => false,
1490 CTSEW::ENABLED => true,
1491 }
1492 }
1493}
1494#[doc = r" Proxy"]
1495pub struct _CTSEW<'a> {
1496 w: &'a mut W,
1497}
1498impl<'a> _CTSEW<'a> {
1499 #[doc = r" Writes `variant` to the field"]
1500 #[inline]
1501 pub fn variant(self, variant: CTSEW) -> &'a mut W {
1502 {
1503 self.bit(variant._bits())
1504 }
1505 }
1506 #[doc = "CTS hardware flow control disabled"]
1507 #[inline]
1508 pub fn disabled(self) -> &'a mut W {
1509 self.variant(CTSEW::DISABLED)
1510 }
1511 #[doc = "CTS mode enabled, data is only transmitted when the CTS input is asserted"]
1512 #[inline]
1513 pub fn enabled(self) -> &'a mut W {
1514 self.variant(CTSEW::ENABLED)
1515 }
1516 #[doc = r" Sets the field bit"]
1517 pub fn set_bit(self) -> &'a mut W {
1518 self.bit(true)
1519 }
1520 #[doc = r" Clears the field bit"]
1521 pub fn clear_bit(self) -> &'a mut W {
1522 self.bit(false)
1523 }
1524 #[doc = r" Writes raw bits to the field"]
1525 #[inline]
1526 pub fn bit(self, value: bool) -> &'a mut W {
1527 const MASK: bool = true;
1528 const OFFSET: u8 = 9;
1529 self.w.bits &= !((MASK as u32) << OFFSET);
1530 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1531 self.w
1532 }
1533}
1534#[doc = "Values that can be written to the field `RTSE`"]
1535pub enum RTSEW {
1536 #[doc = "RTS hardware flow control disabled"]
1537 DISABLED,
1538 #[doc = "RTS output enabled, data is only requested when there is space in the receive buffer"]
1539 ENABLED,
1540}
1541impl RTSEW {
1542 #[allow(missing_docs)]
1543 #[doc(hidden)]
1544 #[inline]
1545 pub fn _bits(&self) -> bool {
1546 match *self {
1547 RTSEW::DISABLED => false,
1548 RTSEW::ENABLED => true,
1549 }
1550 }
1551}
1552#[doc = r" Proxy"]
1553pub struct _RTSEW<'a> {
1554 w: &'a mut W,
1555}
1556impl<'a> _RTSEW<'a> {
1557 #[doc = r" Writes `variant` to the field"]
1558 #[inline]
1559 pub fn variant(self, variant: RTSEW) -> &'a mut W {
1560 {
1561 self.bit(variant._bits())
1562 }
1563 }
1564 #[doc = "RTS hardware flow control disabled"]
1565 #[inline]
1566 pub fn disabled(self) -> &'a mut W {
1567 self.variant(RTSEW::DISABLED)
1568 }
1569 #[doc = "RTS output enabled, data is only requested when there is space in the receive buffer"]
1570 #[inline]
1571 pub fn enabled(self) -> &'a mut W {
1572 self.variant(RTSEW::ENABLED)
1573 }
1574 #[doc = r" Sets the field bit"]
1575 pub fn set_bit(self) -> &'a mut W {
1576 self.bit(true)
1577 }
1578 #[doc = r" Clears the field bit"]
1579 pub fn clear_bit(self) -> &'a mut W {
1580 self.bit(false)
1581 }
1582 #[doc = r" Writes raw bits to the field"]
1583 #[inline]
1584 pub fn bit(self, value: bool) -> &'a mut W {
1585 const MASK: bool = true;
1586 const OFFSET: u8 = 8;
1587 self.w.bits &= !((MASK as u32) << OFFSET);
1588 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1589 self.w
1590 }
1591}
1592#[doc = "Values that can be written to the field `DMAT`"]
1593pub enum DMATW {
1594 #[doc = "DMA mode is disabled for transmission"]
1595 DISABLED,
1596 #[doc = "DMA mode is enabled for transmission"]
1597 ENABLED,
1598}
1599impl DMATW {
1600 #[allow(missing_docs)]
1601 #[doc(hidden)]
1602 #[inline]
1603 pub fn _bits(&self) -> bool {
1604 match *self {
1605 DMATW::DISABLED => false,
1606 DMATW::ENABLED => true,
1607 }
1608 }
1609}
1610#[doc = r" Proxy"]
1611pub struct _DMATW<'a> {
1612 w: &'a mut W,
1613}
1614impl<'a> _DMATW<'a> {
1615 #[doc = r" Writes `variant` to the field"]
1616 #[inline]
1617 pub fn variant(self, variant: DMATW) -> &'a mut W {
1618 {
1619 self.bit(variant._bits())
1620 }
1621 }
1622 #[doc = "DMA mode is disabled for transmission"]
1623 #[inline]
1624 pub fn disabled(self) -> &'a mut W {
1625 self.variant(DMATW::DISABLED)
1626 }
1627 #[doc = "DMA mode is enabled for transmission"]
1628 #[inline]
1629 pub fn enabled(self) -> &'a mut W {
1630 self.variant(DMATW::ENABLED)
1631 }
1632 #[doc = r" Sets the field bit"]
1633 pub fn set_bit(self) -> &'a mut W {
1634 self.bit(true)
1635 }
1636 #[doc = r" Clears the field bit"]
1637 pub fn clear_bit(self) -> &'a mut W {
1638 self.bit(false)
1639 }
1640 #[doc = r" Writes raw bits to the field"]
1641 #[inline]
1642 pub fn bit(self, value: bool) -> &'a mut W {
1643 const MASK: bool = true;
1644 const OFFSET: u8 = 7;
1645 self.w.bits &= !((MASK as u32) << OFFSET);
1646 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1647 self.w
1648 }
1649}
1650#[doc = "Values that can be written to the field `DMAR`"]
1651pub enum DMARW {
1652 #[doc = "DMA mode is disabled for reception"]
1653 DISABLED,
1654 #[doc = "DMA mode is enabled for reception"]
1655 ENABLED,
1656}
1657impl DMARW {
1658 #[allow(missing_docs)]
1659 #[doc(hidden)]
1660 #[inline]
1661 pub fn _bits(&self) -> bool {
1662 match *self {
1663 DMARW::DISABLED => false,
1664 DMARW::ENABLED => true,
1665 }
1666 }
1667}
1668#[doc = r" Proxy"]
1669pub struct _DMARW<'a> {
1670 w: &'a mut W,
1671}
1672impl<'a> _DMARW<'a> {
1673 #[doc = r" Writes `variant` to the field"]
1674 #[inline]
1675 pub fn variant(self, variant: DMARW) -> &'a mut W {
1676 {
1677 self.bit(variant._bits())
1678 }
1679 }
1680 #[doc = "DMA mode is disabled for reception"]
1681 #[inline]
1682 pub fn disabled(self) -> &'a mut W {
1683 self.variant(DMARW::DISABLED)
1684 }
1685 #[doc = "DMA mode is enabled for reception"]
1686 #[inline]
1687 pub fn enabled(self) -> &'a mut W {
1688 self.variant(DMARW::ENABLED)
1689 }
1690 #[doc = r" Sets the field bit"]
1691 pub fn set_bit(self) -> &'a mut W {
1692 self.bit(true)
1693 }
1694 #[doc = r" Clears the field bit"]
1695 pub fn clear_bit(self) -> &'a mut W {
1696 self.bit(false)
1697 }
1698 #[doc = r" Writes raw bits to the field"]
1699 #[inline]
1700 pub fn bit(self, value: bool) -> &'a mut W {
1701 const MASK: bool = true;
1702 const OFFSET: u8 = 6;
1703 self.w.bits &= !((MASK as u32) << OFFSET);
1704 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1705 self.w
1706 }
1707}
1708#[doc = "Values that can be written to the field `SCEN`"]
1709pub enum SCENW {
1710 #[doc = "Smartcard Mode disabled"]
1711 DISABLED,
1712 #[doc = "Smartcard Mode enabled"]
1713 ENABLED,
1714}
1715impl SCENW {
1716 #[allow(missing_docs)]
1717 #[doc(hidden)]
1718 #[inline]
1719 pub fn _bits(&self) -> bool {
1720 match *self {
1721 SCENW::DISABLED => false,
1722 SCENW::ENABLED => true,
1723 }
1724 }
1725}
1726#[doc = r" Proxy"]
1727pub struct _SCENW<'a> {
1728 w: &'a mut W,
1729}
1730impl<'a> _SCENW<'a> {
1731 #[doc = r" Writes `variant` to the field"]
1732 #[inline]
1733 pub fn variant(self, variant: SCENW) -> &'a mut W {
1734 {
1735 self.bit(variant._bits())
1736 }
1737 }
1738 #[doc = "Smartcard Mode disabled"]
1739 #[inline]
1740 pub fn disabled(self) -> &'a mut W {
1741 self.variant(SCENW::DISABLED)
1742 }
1743 #[doc = "Smartcard Mode enabled"]
1744 #[inline]
1745 pub fn enabled(self) -> &'a mut W {
1746 self.variant(SCENW::ENABLED)
1747 }
1748 #[doc = r" Sets the field bit"]
1749 pub fn set_bit(self) -> &'a mut W {
1750 self.bit(true)
1751 }
1752 #[doc = r" Clears the field bit"]
1753 pub fn clear_bit(self) -> &'a mut W {
1754 self.bit(false)
1755 }
1756 #[doc = r" Writes raw bits to the field"]
1757 #[inline]
1758 pub fn bit(self, value: bool) -> &'a mut W {
1759 const MASK: bool = true;
1760 const OFFSET: u8 = 5;
1761 self.w.bits &= !((MASK as u32) << OFFSET);
1762 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1763 self.w
1764 }
1765}
1766#[doc = "Values that can be written to the field `NACK`"]
1767pub enum NACKW {
1768 #[doc = "NACK transmission in case of parity error is disabled"]
1769 DISABLED,
1770 #[doc = "NACK transmission during parity error is enabled"]
1771 ENABLED,
1772}
1773impl NACKW {
1774 #[allow(missing_docs)]
1775 #[doc(hidden)]
1776 #[inline]
1777 pub fn _bits(&self) -> bool {
1778 match *self {
1779 NACKW::DISABLED => false,
1780 NACKW::ENABLED => true,
1781 }
1782 }
1783}
1784#[doc = r" Proxy"]
1785pub struct _NACKW<'a> {
1786 w: &'a mut W,
1787}
1788impl<'a> _NACKW<'a> {
1789 #[doc = r" Writes `variant` to the field"]
1790 #[inline]
1791 pub fn variant(self, variant: NACKW) -> &'a mut W {
1792 {
1793 self.bit(variant._bits())
1794 }
1795 }
1796 #[doc = "NACK transmission in case of parity error is disabled"]
1797 #[inline]
1798 pub fn disabled(self) -> &'a mut W {
1799 self.variant(NACKW::DISABLED)
1800 }
1801 #[doc = "NACK transmission during parity error is enabled"]
1802 #[inline]
1803 pub fn enabled(self) -> &'a mut W {
1804 self.variant(NACKW::ENABLED)
1805 }
1806 #[doc = r" Sets the field bit"]
1807 pub fn set_bit(self) -> &'a mut W {
1808 self.bit(true)
1809 }
1810 #[doc = r" Clears the field bit"]
1811 pub fn clear_bit(self) -> &'a mut W {
1812 self.bit(false)
1813 }
1814 #[doc = r" Writes raw bits to the field"]
1815 #[inline]
1816 pub fn bit(self, value: bool) -> &'a mut W {
1817 const MASK: bool = true;
1818 const OFFSET: u8 = 4;
1819 self.w.bits &= !((MASK as u32) << OFFSET);
1820 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1821 self.w
1822 }
1823}
1824#[doc = "Values that can be written to the field `HDSEL`"]
1825pub enum HDSELW {
1826 #[doc = "Half duplex mode is not selected"]
1827 NOTSELECTED,
1828 #[doc = "Half duplex mode is selected"]
1829 SELECTED,
1830}
1831impl HDSELW {
1832 #[allow(missing_docs)]
1833 #[doc(hidden)]
1834 #[inline]
1835 pub fn _bits(&self) -> bool {
1836 match *self {
1837 HDSELW::NOTSELECTED => false,
1838 HDSELW::SELECTED => true,
1839 }
1840 }
1841}
1842#[doc = r" Proxy"]
1843pub struct _HDSELW<'a> {
1844 w: &'a mut W,
1845}
1846impl<'a> _HDSELW<'a> {
1847 #[doc = r" Writes `variant` to the field"]
1848 #[inline]
1849 pub fn variant(self, variant: HDSELW) -> &'a mut W {
1850 {
1851 self.bit(variant._bits())
1852 }
1853 }
1854 #[doc = "Half duplex mode is not selected"]
1855 #[inline]
1856 pub fn not_selected(self) -> &'a mut W {
1857 self.variant(HDSELW::NOTSELECTED)
1858 }
1859 #[doc = "Half duplex mode is selected"]
1860 #[inline]
1861 pub fn selected(self) -> &'a mut W {
1862 self.variant(HDSELW::SELECTED)
1863 }
1864 #[doc = r" Sets the field bit"]
1865 pub fn set_bit(self) -> &'a mut W {
1866 self.bit(true)
1867 }
1868 #[doc = r" Clears the field bit"]
1869 pub fn clear_bit(self) -> &'a mut W {
1870 self.bit(false)
1871 }
1872 #[doc = r" Writes raw bits to the field"]
1873 #[inline]
1874 pub fn bit(self, value: bool) -> &'a mut W {
1875 const MASK: bool = true;
1876 const OFFSET: u8 = 3;
1877 self.w.bits &= !((MASK as u32) << OFFSET);
1878 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1879 self.w
1880 }
1881}
1882#[doc = "Values that can be written to the field `IRLP`"]
1883pub enum IRLPW {
1884 #[doc = "Normal mode"]
1885 NORMAL,
1886 #[doc = "Low-power mode"]
1887 LOWPOWER,
1888}
1889impl IRLPW {
1890 #[allow(missing_docs)]
1891 #[doc(hidden)]
1892 #[inline]
1893 pub fn _bits(&self) -> bool {
1894 match *self {
1895 IRLPW::NORMAL => false,
1896 IRLPW::LOWPOWER => true,
1897 }
1898 }
1899}
1900#[doc = r" Proxy"]
1901pub struct _IRLPW<'a> {
1902 w: &'a mut W,
1903}
1904impl<'a> _IRLPW<'a> {
1905 #[doc = r" Writes `variant` to the field"]
1906 #[inline]
1907 pub fn variant(self, variant: IRLPW) -> &'a mut W {
1908 {
1909 self.bit(variant._bits())
1910 }
1911 }
1912 #[doc = "Normal mode"]
1913 #[inline]
1914 pub fn normal(self) -> &'a mut W {
1915 self.variant(IRLPW::NORMAL)
1916 }
1917 #[doc = "Low-power mode"]
1918 #[inline]
1919 pub fn low_power(self) -> &'a mut W {
1920 self.variant(IRLPW::LOWPOWER)
1921 }
1922 #[doc = r" Sets the field bit"]
1923 pub fn set_bit(self) -> &'a mut W {
1924 self.bit(true)
1925 }
1926 #[doc = r" Clears the field bit"]
1927 pub fn clear_bit(self) -> &'a mut W {
1928 self.bit(false)
1929 }
1930 #[doc = r" Writes raw bits to the field"]
1931 #[inline]
1932 pub fn bit(self, value: bool) -> &'a mut W {
1933 const MASK: bool = true;
1934 const OFFSET: u8 = 2;
1935 self.w.bits &= !((MASK as u32) << OFFSET);
1936 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1937 self.w
1938 }
1939}
1940#[doc = "Values that can be written to the field `IREN`"]
1941pub enum IRENW {
1942 #[doc = "IrDA disabled"]
1943 DISABLED,
1944 #[doc = "IrDA enabled"]
1945 ENABLED,
1946}
1947impl IRENW {
1948 #[allow(missing_docs)]
1949 #[doc(hidden)]
1950 #[inline]
1951 pub fn _bits(&self) -> bool {
1952 match *self {
1953 IRENW::DISABLED => false,
1954 IRENW::ENABLED => true,
1955 }
1956 }
1957}
1958#[doc = r" Proxy"]
1959pub struct _IRENW<'a> {
1960 w: &'a mut W,
1961}
1962impl<'a> _IRENW<'a> {
1963 #[doc = r" Writes `variant` to the field"]
1964 #[inline]
1965 pub fn variant(self, variant: IRENW) -> &'a mut W {
1966 {
1967 self.bit(variant._bits())
1968 }
1969 }
1970 #[doc = "IrDA disabled"]
1971 #[inline]
1972 pub fn disabled(self) -> &'a mut W {
1973 self.variant(IRENW::DISABLED)
1974 }
1975 #[doc = "IrDA enabled"]
1976 #[inline]
1977 pub fn enabled(self) -> &'a mut W {
1978 self.variant(IRENW::ENABLED)
1979 }
1980 #[doc = r" Sets the field bit"]
1981 pub fn set_bit(self) -> &'a mut W {
1982 self.bit(true)
1983 }
1984 #[doc = r" Clears the field bit"]
1985 pub fn clear_bit(self) -> &'a mut W {
1986 self.bit(false)
1987 }
1988 #[doc = r" Writes raw bits to the field"]
1989 #[inline]
1990 pub fn bit(self, value: bool) -> &'a mut W {
1991 const MASK: bool = true;
1992 const OFFSET: u8 = 1;
1993 self.w.bits &= !((MASK as u32) << OFFSET);
1994 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1995 self.w
1996 }
1997}
1998#[doc = "Values that can be written to the field `EIE`"]
1999pub enum EIEW {
2000 #[doc = "Interrupt is inhibited"]
2001 DISABLED,
2002 #[doc = "An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register"]
2003 ENABLED,
2004}
2005impl EIEW {
2006 #[allow(missing_docs)]
2007 #[doc(hidden)]
2008 #[inline]
2009 pub fn _bits(&self) -> bool {
2010 match *self {
2011 EIEW::DISABLED => false,
2012 EIEW::ENABLED => true,
2013 }
2014 }
2015}
2016#[doc = r" Proxy"]
2017pub struct _EIEW<'a> {
2018 w: &'a mut W,
2019}
2020impl<'a> _EIEW<'a> {
2021 #[doc = r" Writes `variant` to the field"]
2022 #[inline]
2023 pub fn variant(self, variant: EIEW) -> &'a mut W {
2024 {
2025 self.bit(variant._bits())
2026 }
2027 }
2028 #[doc = "Interrupt is inhibited"]
2029 #[inline]
2030 pub fn disabled(self) -> &'a mut W {
2031 self.variant(EIEW::DISABLED)
2032 }
2033 #[doc = "An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register"]
2034 #[inline]
2035 pub fn enabled(self) -> &'a mut W {
2036 self.variant(EIEW::ENABLED)
2037 }
2038 #[doc = r" Sets the field bit"]
2039 pub fn set_bit(self) -> &'a mut W {
2040 self.bit(true)
2041 }
2042 #[doc = r" Clears the field bit"]
2043 pub fn clear_bit(self) -> &'a mut W {
2044 self.bit(false)
2045 }
2046 #[doc = r" Writes raw bits to the field"]
2047 #[inline]
2048 pub fn bit(self, value: bool) -> &'a mut W {
2049 const MASK: bool = true;
2050 const OFFSET: u8 = 0;
2051 self.w.bits &= !((MASK as u32) << OFFSET);
2052 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2053 self.w
2054 }
2055}
2056#[doc = "Values that can be written to the field `UCESM`"]
2057pub enum UCESMW {
2058 #[doc = "USART clock is disabled in STOP mode"]
2059 DISABLED,
2060 #[doc = "USART clock is enabled in STOP mode"]
2061 ENABLED,
2062}
2063impl UCESMW {
2064 #[allow(missing_docs)]
2065 #[doc(hidden)]
2066 #[inline]
2067 pub fn _bits(&self) -> bool {
2068 match *self {
2069 UCESMW::DISABLED => false,
2070 UCESMW::ENABLED => true,
2071 }
2072 }
2073}
2074#[doc = r" Proxy"]
2075pub struct _UCESMW<'a> {
2076 w: &'a mut W,
2077}
2078impl<'a> _UCESMW<'a> {
2079 #[doc = r" Writes `variant` to the field"]
2080 #[inline]
2081 pub fn variant(self, variant: UCESMW) -> &'a mut W {
2082 {
2083 self.bit(variant._bits())
2084 }
2085 }
2086 #[doc = "USART clock is disabled in STOP mode"]
2087 #[inline]
2088 pub fn disabled(self) -> &'a mut W {
2089 self.variant(UCESMW::DISABLED)
2090 }
2091 #[doc = "USART clock is enabled in STOP mode"]
2092 #[inline]
2093 pub fn enabled(self) -> &'a mut W {
2094 self.variant(UCESMW::ENABLED)
2095 }
2096 #[doc = r" Sets the field bit"]
2097 pub fn set_bit(self) -> &'a mut W {
2098 self.bit(true)
2099 }
2100 #[doc = r" Clears the field bit"]
2101 pub fn clear_bit(self) -> &'a mut W {
2102 self.bit(false)
2103 }
2104 #[doc = r" Writes raw bits to the field"]
2105 #[inline]
2106 pub fn bit(self, value: bool) -> &'a mut W {
2107 const MASK: bool = true;
2108 const OFFSET: u8 = 23;
2109 self.w.bits &= !((MASK as u32) << OFFSET);
2110 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2111 self.w
2112 }
2113}
2114#[doc = "Values that can be written to the field `TCBGTIE`"]
2115pub enum TCBGTIEW {
2116 #[doc = "Interrupt is inhibited"]
2117 DISABLED,
2118 #[doc = "An USART interrupt is generated whenever TCBGT=1 in the ISR register"]
2119 ENABLED,
2120}
2121impl TCBGTIEW {
2122 #[allow(missing_docs)]
2123 #[doc(hidden)]
2124 #[inline]
2125 pub fn _bits(&self) -> bool {
2126 match *self {
2127 TCBGTIEW::DISABLED => false,
2128 TCBGTIEW::ENABLED => true,
2129 }
2130 }
2131}
2132#[doc = r" Proxy"]
2133pub struct _TCBGTIEW<'a> {
2134 w: &'a mut W,
2135}
2136impl<'a> _TCBGTIEW<'a> {
2137 #[doc = r" Writes `variant` to the field"]
2138 #[inline]
2139 pub fn variant(self, variant: TCBGTIEW) -> &'a mut W {
2140 {
2141 self.bit(variant._bits())
2142 }
2143 }
2144 #[doc = "Interrupt is inhibited"]
2145 #[inline]
2146 pub fn disabled(self) -> &'a mut W {
2147 self.variant(TCBGTIEW::DISABLED)
2148 }
2149 #[doc = "An USART interrupt is generated whenever TCBGT=1 in the ISR register"]
2150 #[inline]
2151 pub fn enabled(self) -> &'a mut W {
2152 self.variant(TCBGTIEW::ENABLED)
2153 }
2154 #[doc = r" Sets the field bit"]
2155 pub fn set_bit(self) -> &'a mut W {
2156 self.bit(true)
2157 }
2158 #[doc = r" Clears the field bit"]
2159 pub fn clear_bit(self) -> &'a mut W {
2160 self.bit(false)
2161 }
2162 #[doc = r" Writes raw bits to the field"]
2163 #[inline]
2164 pub fn bit(self, value: bool) -> &'a mut W {
2165 const MASK: bool = true;
2166 const OFFSET: u8 = 24;
2167 self.w.bits &= !((MASK as u32) << OFFSET);
2168 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2169 self.w
2170 }
2171}
2172impl R {
2173 #[doc = r" Value of the register as raw bits"]
2174 #[inline]
2175 pub fn bits(&self) -> u32 {
2176 self.bits
2177 }
2178 #[doc = "Bit 22 - Wakeup from Stop mode interrupt enable"]
2179 #[inline]
2180 pub fn wufie(&self) -> WUFIER {
2181 WUFIER::_from({
2182 const MASK: bool = true;
2183 const OFFSET: u8 = 22;
2184 ((self.bits >> OFFSET) & MASK as u32) != 0
2185 })
2186 }
2187 #[doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection"]
2188 #[inline]
2189 pub fn wus(&self) -> WUSR {
2190 WUSR::_from({
2191 const MASK: u8 = 3;
2192 const OFFSET: u8 = 20;
2193 ((self.bits >> OFFSET) & MASK as u32) as u8
2194 })
2195 }
2196 #[doc = "Bits 17:19 - Smartcard auto-retry count"]
2197 #[inline]
2198 pub fn scarcnt(&self) -> SCARCNTR {
2199 let bits = {
2200 const MASK: u8 = 7;
2201 const OFFSET: u8 = 17;
2202 ((self.bits >> OFFSET) & MASK as u32) as u8
2203 };
2204 SCARCNTR { bits }
2205 }
2206 #[doc = "Bit 15 - Driver enable polarity selection"]
2207 #[inline]
2208 pub fn dep(&self) -> DEPR {
2209 DEPR::_from({
2210 const MASK: bool = true;
2211 const OFFSET: u8 = 15;
2212 ((self.bits >> OFFSET) & MASK as u32) != 0
2213 })
2214 }
2215 #[doc = "Bit 14 - Driver enable mode"]
2216 #[inline]
2217 pub fn dem(&self) -> DEMR {
2218 DEMR::_from({
2219 const MASK: bool = true;
2220 const OFFSET: u8 = 14;
2221 ((self.bits >> OFFSET) & MASK as u32) != 0
2222 })
2223 }
2224 #[doc = "Bit 13 - DMA Disable on Reception Error"]
2225 #[inline]
2226 pub fn ddre(&self) -> DDRER {
2227 DDRER::_from({
2228 const MASK: bool = true;
2229 const OFFSET: u8 = 13;
2230 ((self.bits >> OFFSET) & MASK as u32) != 0
2231 })
2232 }
2233 #[doc = "Bit 12 - Overrun Disable"]
2234 #[inline]
2235 pub fn ovrdis(&self) -> OVRDISR {
2236 OVRDISR::_from({
2237 const MASK: bool = true;
2238 const OFFSET: u8 = 12;
2239 ((self.bits >> OFFSET) & MASK as u32) != 0
2240 })
2241 }
2242 #[doc = "Bit 11 - One sample bit method enable"]
2243 #[inline]
2244 pub fn onebit(&self) -> ONEBITR {
2245 ONEBITR::_from({
2246 const MASK: bool = true;
2247 const OFFSET: u8 = 11;
2248 ((self.bits >> OFFSET) & MASK as u32) != 0
2249 })
2250 }
2251 #[doc = "Bit 10 - CTS interrupt enable"]
2252 #[inline]
2253 pub fn ctsie(&self) -> CTSIER {
2254 CTSIER::_from({
2255 const MASK: bool = true;
2256 const OFFSET: u8 = 10;
2257 ((self.bits >> OFFSET) & MASK as u32) != 0
2258 })
2259 }
2260 #[doc = "Bit 9 - CTS enable"]
2261 #[inline]
2262 pub fn ctse(&self) -> CTSER {
2263 CTSER::_from({
2264 const MASK: bool = true;
2265 const OFFSET: u8 = 9;
2266 ((self.bits >> OFFSET) & MASK as u32) != 0
2267 })
2268 }
2269 #[doc = "Bit 8 - RTS enable"]
2270 #[inline]
2271 pub fn rtse(&self) -> RTSER {
2272 RTSER::_from({
2273 const MASK: bool = true;
2274 const OFFSET: u8 = 8;
2275 ((self.bits >> OFFSET) & MASK as u32) != 0
2276 })
2277 }
2278 #[doc = "Bit 7 - DMA enable transmitter"]
2279 #[inline]
2280 pub fn dmat(&self) -> DMATR {
2281 DMATR::_from({
2282 const MASK: bool = true;
2283 const OFFSET: u8 = 7;
2284 ((self.bits >> OFFSET) & MASK as u32) != 0
2285 })
2286 }
2287 #[doc = "Bit 6 - DMA enable receiver"]
2288 #[inline]
2289 pub fn dmar(&self) -> DMARR {
2290 DMARR::_from({
2291 const MASK: bool = true;
2292 const OFFSET: u8 = 6;
2293 ((self.bits >> OFFSET) & MASK as u32) != 0
2294 })
2295 }
2296 #[doc = "Bit 5 - Smartcard mode enable"]
2297 #[inline]
2298 pub fn scen(&self) -> SCENR {
2299 SCENR::_from({
2300 const MASK: bool = true;
2301 const OFFSET: u8 = 5;
2302 ((self.bits >> OFFSET) & MASK as u32) != 0
2303 })
2304 }
2305 #[doc = "Bit 4 - Smartcard NACK enable"]
2306 #[inline]
2307 pub fn nack(&self) -> NACKR {
2308 NACKR::_from({
2309 const MASK: bool = true;
2310 const OFFSET: u8 = 4;
2311 ((self.bits >> OFFSET) & MASK as u32) != 0
2312 })
2313 }
2314 #[doc = "Bit 3 - Half-duplex selection"]
2315 #[inline]
2316 pub fn hdsel(&self) -> HDSELR {
2317 HDSELR::_from({
2318 const MASK: bool = true;
2319 const OFFSET: u8 = 3;
2320 ((self.bits >> OFFSET) & MASK as u32) != 0
2321 })
2322 }
2323 #[doc = "Bit 2 - Ir low-power"]
2324 #[inline]
2325 pub fn irlp(&self) -> IRLPR {
2326 IRLPR::_from({
2327 const MASK: bool = true;
2328 const OFFSET: u8 = 2;
2329 ((self.bits >> OFFSET) & MASK as u32) != 0
2330 })
2331 }
2332 #[doc = "Bit 1 - Ir mode enable"]
2333 #[inline]
2334 pub fn iren(&self) -> IRENR {
2335 IRENR::_from({
2336 const MASK: bool = true;
2337 const OFFSET: u8 = 1;
2338 ((self.bits >> OFFSET) & MASK as u32) != 0
2339 })
2340 }
2341 #[doc = "Bit 0 - Error interrupt enable"]
2342 #[inline]
2343 pub fn eie(&self) -> EIER {
2344 EIER::_from({
2345 const MASK: bool = true;
2346 const OFFSET: u8 = 0;
2347 ((self.bits >> OFFSET) & MASK as u32) != 0
2348 })
2349 }
2350 #[doc = "Bit 23 - USART Clock Enable in Stop mode"]
2351 #[inline]
2352 pub fn ucesm(&self) -> UCESMR {
2353 UCESMR::_from({
2354 const MASK: bool = true;
2355 const OFFSET: u8 = 23;
2356 ((self.bits >> OFFSET) & MASK as u32) != 0
2357 })
2358 }
2359 #[doc = "Bit 24 - Transmission complete before guard time interrupt enable"]
2360 #[inline]
2361 pub fn tcbgtie(&self) -> TCBGTIER {
2362 TCBGTIER::_from({
2363 const MASK: bool = true;
2364 const OFFSET: u8 = 24;
2365 ((self.bits >> OFFSET) & MASK as u32) != 0
2366 })
2367 }
2368}
2369impl W {
2370 #[doc = r" Reset value of the register"]
2371 #[inline]
2372 pub fn reset_value() -> W {
2373 W { bits: 0 }
2374 }
2375 #[doc = r" Writes raw bits to the register"]
2376 #[inline]
2377 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
2378 self.bits = bits;
2379 self
2380 }
2381 #[doc = "Bit 22 - Wakeup from Stop mode interrupt enable"]
2382 #[inline]
2383 pub fn wufie(&mut self) -> _WUFIEW {
2384 _WUFIEW { w: self }
2385 }
2386 #[doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection"]
2387 #[inline]
2388 pub fn wus(&mut self) -> _WUSW {
2389 _WUSW { w: self }
2390 }
2391 #[doc = "Bits 17:19 - Smartcard auto-retry count"]
2392 #[inline]
2393 pub fn scarcnt(&mut self) -> _SCARCNTW {
2394 _SCARCNTW { w: self }
2395 }
2396 #[doc = "Bit 15 - Driver enable polarity selection"]
2397 #[inline]
2398 pub fn dep(&mut self) -> _DEPW {
2399 _DEPW { w: self }
2400 }
2401 #[doc = "Bit 14 - Driver enable mode"]
2402 #[inline]
2403 pub fn dem(&mut self) -> _DEMW {
2404 _DEMW { w: self }
2405 }
2406 #[doc = "Bit 13 - DMA Disable on Reception Error"]
2407 #[inline]
2408 pub fn ddre(&mut self) -> _DDREW {
2409 _DDREW { w: self }
2410 }
2411 #[doc = "Bit 12 - Overrun Disable"]
2412 #[inline]
2413 pub fn ovrdis(&mut self) -> _OVRDISW {
2414 _OVRDISW { w: self }
2415 }
2416 #[doc = "Bit 11 - One sample bit method enable"]
2417 #[inline]
2418 pub fn onebit(&mut self) -> _ONEBITW {
2419 _ONEBITW { w: self }
2420 }
2421 #[doc = "Bit 10 - CTS interrupt enable"]
2422 #[inline]
2423 pub fn ctsie(&mut self) -> _CTSIEW {
2424 _CTSIEW { w: self }
2425 }
2426 #[doc = "Bit 9 - CTS enable"]
2427 #[inline]
2428 pub fn ctse(&mut self) -> _CTSEW {
2429 _CTSEW { w: self }
2430 }
2431 #[doc = "Bit 8 - RTS enable"]
2432 #[inline]
2433 pub fn rtse(&mut self) -> _RTSEW {
2434 _RTSEW { w: self }
2435 }
2436 #[doc = "Bit 7 - DMA enable transmitter"]
2437 #[inline]
2438 pub fn dmat(&mut self) -> _DMATW {
2439 _DMATW { w: self }
2440 }
2441 #[doc = "Bit 6 - DMA enable receiver"]
2442 #[inline]
2443 pub fn dmar(&mut self) -> _DMARW {
2444 _DMARW { w: self }
2445 }
2446 #[doc = "Bit 5 - Smartcard mode enable"]
2447 #[inline]
2448 pub fn scen(&mut self) -> _SCENW {
2449 _SCENW { w: self }
2450 }
2451 #[doc = "Bit 4 - Smartcard NACK enable"]
2452 #[inline]
2453 pub fn nack(&mut self) -> _NACKW {
2454 _NACKW { w: self }
2455 }
2456 #[doc = "Bit 3 - Half-duplex selection"]
2457 #[inline]
2458 pub fn hdsel(&mut self) -> _HDSELW {
2459 _HDSELW { w: self }
2460 }
2461 #[doc = "Bit 2 - Ir low-power"]
2462 #[inline]
2463 pub fn irlp(&mut self) -> _IRLPW {
2464 _IRLPW { w: self }
2465 }
2466 #[doc = "Bit 1 - Ir mode enable"]
2467 #[inline]
2468 pub fn iren(&mut self) -> _IRENW {
2469 _IRENW { w: self }
2470 }
2471 #[doc = "Bit 0 - Error interrupt enable"]
2472 #[inline]
2473 pub fn eie(&mut self) -> _EIEW {
2474 _EIEW { w: self }
2475 }
2476 #[doc = "Bit 23 - USART Clock Enable in Stop mode"]
2477 #[inline]
2478 pub fn ucesm(&mut self) -> _UCESMW {
2479 _UCESMW { w: self }
2480 }
2481 #[doc = "Bit 24 - Transmission complete before guard time interrupt enable"]
2482 #[inline]
2483 pub fn tcbgtie(&mut self) -> _TCBGTIEW {
2484 _TCBGTIEW { w: self }
2485 }
2486}