1#[doc = "Register `BDTR` reader"]
2pub type R = crate::R<BdtrSpec>;
3#[doc = "Register `BDTR` writer"]
4pub type W = crate::W<BdtrSpec>;
5#[doc = "Field `DTG` reader - Dead-time generator setup"]
6pub type DtgR = crate::FieldReader;
7#[doc = "Field `DTG` writer - Dead-time generator setup"]
8pub type DtgW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `LOCK` reader - Lock configuration"]
10pub type LockR = crate::FieldReader;
11#[doc = "Field `LOCK` writer - Lock configuration"]
12pub type LockW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `OSSI` reader - Off-state selection for Idle mode"]
14pub type OssiR = crate::BitReader;
15#[doc = "Field `OSSI` writer - Off-state selection for Idle mode"]
16pub type OssiW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `OSSR` reader - Off-state selection for Run mode"]
18pub type OssrR = crate::BitReader;
19#[doc = "Field `OSSR` writer - Off-state selection for Run mode"]
20pub type OssrW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BKE` reader - Break enable"]
22pub type BkeR = crate::BitReader;
23#[doc = "Field `BKE` writer - Break enable"]
24pub type BkeW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `BKP` reader - Break polarity"]
26pub type BkpR = crate::BitReader;
27#[doc = "Field `BKP` writer - Break polarity"]
28pub type BkpW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `AOE` reader - Automatic output enable"]
30pub type AoeR = crate::BitReader;
31#[doc = "Field `AOE` writer - Automatic output enable"]
32pub type AoeW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `MOE` reader - Main output enable"]
34pub type MoeR = crate::BitReader;
35#[doc = "Field `MOE` writer - Main output enable"]
36pub type MoeW<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `BKF` reader - Break filter"]
38pub type BkfR = crate::FieldReader;
39#[doc = "Field `BKF` writer - Break filter"]
40pub type BkfW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
41impl R {
42 #[doc = "Bits 0:7 - Dead-time generator setup"]
43 #[inline(always)]
44 pub fn dtg(&self) -> DtgR {
45 DtgR::new((self.bits & 0xff) as u8)
46 }
47 #[doc = "Bits 8:9 - Lock configuration"]
48 #[inline(always)]
49 pub fn lock(&self) -> LockR {
50 LockR::new(((self.bits >> 8) & 3) as u8)
51 }
52 #[doc = "Bit 10 - Off-state selection for Idle mode"]
53 #[inline(always)]
54 pub fn ossi(&self) -> OssiR {
55 OssiR::new(((self.bits >> 10) & 1) != 0)
56 }
57 #[doc = "Bit 11 - Off-state selection for Run mode"]
58 #[inline(always)]
59 pub fn ossr(&self) -> OssrR {
60 OssrR::new(((self.bits >> 11) & 1) != 0)
61 }
62 #[doc = "Bit 12 - Break enable"]
63 #[inline(always)]
64 pub fn bke(&self) -> BkeR {
65 BkeR::new(((self.bits >> 12) & 1) != 0)
66 }
67 #[doc = "Bit 13 - Break polarity"]
68 #[inline(always)]
69 pub fn bkp(&self) -> BkpR {
70 BkpR::new(((self.bits >> 13) & 1) != 0)
71 }
72 #[doc = "Bit 14 - Automatic output enable"]
73 #[inline(always)]
74 pub fn aoe(&self) -> AoeR {
75 AoeR::new(((self.bits >> 14) & 1) != 0)
76 }
77 #[doc = "Bit 15 - Main output enable"]
78 #[inline(always)]
79 pub fn moe(&self) -> MoeR {
80 MoeR::new(((self.bits >> 15) & 1) != 0)
81 }
82 #[doc = "Bits 16:19 - Break filter"]
83 #[inline(always)]
84 pub fn bkf(&self) -> BkfR {
85 BkfR::new(((self.bits >> 16) & 0x0f) as u8)
86 }
87}
88impl W {
89 #[doc = "Bits 0:7 - Dead-time generator setup"]
90 #[inline(always)]
91 pub fn dtg(&mut self) -> DtgW<BdtrSpec> {
92 DtgW::new(self, 0)
93 }
94 #[doc = "Bits 8:9 - Lock configuration"]
95 #[inline(always)]
96 pub fn lock(&mut self) -> LockW<BdtrSpec> {
97 LockW::new(self, 8)
98 }
99 #[doc = "Bit 10 - Off-state selection for Idle mode"]
100 #[inline(always)]
101 pub fn ossi(&mut self) -> OssiW<BdtrSpec> {
102 OssiW::new(self, 10)
103 }
104 #[doc = "Bit 11 - Off-state selection for Run mode"]
105 #[inline(always)]
106 pub fn ossr(&mut self) -> OssrW<BdtrSpec> {
107 OssrW::new(self, 11)
108 }
109 #[doc = "Bit 12 - Break enable"]
110 #[inline(always)]
111 pub fn bke(&mut self) -> BkeW<BdtrSpec> {
112 BkeW::new(self, 12)
113 }
114 #[doc = "Bit 13 - Break polarity"]
115 #[inline(always)]
116 pub fn bkp(&mut self) -> BkpW<BdtrSpec> {
117 BkpW::new(self, 13)
118 }
119 #[doc = "Bit 14 - Automatic output enable"]
120 #[inline(always)]
121 pub fn aoe(&mut self) -> AoeW<BdtrSpec> {
122 AoeW::new(self, 14)
123 }
124 #[doc = "Bit 15 - Main output enable"]
125 #[inline(always)]
126 pub fn moe(&mut self) -> MoeW<BdtrSpec> {
127 MoeW::new(self, 15)
128 }
129 #[doc = "Bits 16:19 - Break filter"]
130 #[inline(always)]
131 pub fn bkf(&mut self) -> BkfW<BdtrSpec> {
132 BkfW::new(self, 16)
133 }
134}
135#[doc = "break and dead-time register\n\nYou can [`read`](crate::Reg::read) this register and get [`bdtr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bdtr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
136pub struct BdtrSpec;
137impl crate::RegisterSpec for BdtrSpec {
138 type Ux = u32;
139}
140#[doc = "`read()` method returns [`bdtr::R`](R) reader structure"]
141impl crate::Readable for BdtrSpec {}
142#[doc = "`write(|w| ..)` method takes [`bdtr::W`](W) writer structure"]
143impl crate::Writable for BdtrSpec {
144 type Safety = crate::Unsafe;
145}
146#[doc = "`reset()` method sets BDTR to value 0"]
147impl crate::Resettable for BdtrSpec {}