1#[doc = "Register `ASCR` reader"]
2pub type R = crate::R<AscrSpec>;
3#[doc = "Register `ASCR` writer"]
4pub type W = crate::W<AscrSpec>;
5#[doc = "Field `ASC0` reader - Port analog switch control"]
6pub type Asc0R = crate::BitReader;
7#[doc = "Field `ASC0` writer - Port analog switch control"]
8pub type Asc0W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ASC1` reader - Port analog switch control"]
10pub type Asc1R = crate::BitReader;
11#[doc = "Field `ASC1` writer - Port analog switch control"]
12pub type Asc1W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `ASC2` reader - Port analog switch control"]
14pub type Asc2R = crate::BitReader;
15#[doc = "Field `ASC2` writer - Port analog switch control"]
16pub type Asc2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ASC3` reader - Port analog switch control"]
18pub type Asc3R = crate::BitReader;
19#[doc = "Field `ASC3` writer - Port analog switch control"]
20pub type Asc3W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `ASC4` reader - Port analog switch control"]
22pub type Asc4R = crate::BitReader;
23#[doc = "Field `ASC4` writer - Port analog switch control"]
24pub type Asc4W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ASC5` reader - Port analog switch control"]
26pub type Asc5R = crate::BitReader;
27#[doc = "Field `ASC5` writer - Port analog switch control"]
28pub type Asc5W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `ASC6` reader - Port analog switch control"]
30pub type Asc6R = crate::BitReader;
31#[doc = "Field `ASC6` writer - Port analog switch control"]
32pub type Asc6W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `ASC7` reader - Port analog switch control"]
34pub type Asc7R = crate::BitReader;
35#[doc = "Field `ASC7` writer - Port analog switch control"]
36pub type Asc7W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `ASC8` reader - Port analog switch control"]
38pub type Asc8R = crate::BitReader;
39#[doc = "Field `ASC8` writer - Port analog switch control"]
40pub type Asc8W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `ASC9` reader - Port analog switch control"]
42pub type Asc9R = crate::BitReader;
43#[doc = "Field `ASC9` writer - Port analog switch control"]
44pub type Asc9W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `ASC10` reader - Port analog switch control"]
46pub type Asc10R = crate::BitReader;
47#[doc = "Field `ASC10` writer - Port analog switch control"]
48pub type Asc10W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `ASC11` reader - Port analog switch control"]
50pub type Asc11R = crate::BitReader;
51#[doc = "Field `ASC11` writer - Port analog switch control"]
52pub type Asc11W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `ASC12` reader - Port analog switch control"]
54pub type Asc12R = crate::BitReader;
55#[doc = "Field `ASC12` writer - Port analog switch control"]
56pub type Asc12W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `ASC13` reader - Port analog switch control"]
58pub type Asc13R = crate::BitReader;
59#[doc = "Field `ASC13` writer - Port analog switch control"]
60pub type Asc13W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `ASC14` reader - Port analog switch control"]
62pub type Asc14R = crate::BitReader;
63#[doc = "Field `ASC14` writer - Port analog switch control"]
64pub type Asc14W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `ASC15` reader - Port analog switch control"]
66pub type Asc15R = crate::BitReader;
67#[doc = "Field `ASC15` writer - Port analog switch control"]
68pub type Asc15W<'a, REG> = crate::BitWriter<'a, REG>;
69impl R {
70 #[doc = "Bit 0 - Port analog switch control"]
71 #[inline(always)]
72 pub fn asc0(&self) -> Asc0R {
73 Asc0R::new((self.bits & 1) != 0)
74 }
75 #[doc = "Bit 1 - Port analog switch control"]
76 #[inline(always)]
77 pub fn asc1(&self) -> Asc1R {
78 Asc1R::new(((self.bits >> 1) & 1) != 0)
79 }
80 #[doc = "Bit 2 - Port analog switch control"]
81 #[inline(always)]
82 pub fn asc2(&self) -> Asc2R {
83 Asc2R::new(((self.bits >> 2) & 1) != 0)
84 }
85 #[doc = "Bit 3 - Port analog switch control"]
86 #[inline(always)]
87 pub fn asc3(&self) -> Asc3R {
88 Asc3R::new(((self.bits >> 3) & 1) != 0)
89 }
90 #[doc = "Bit 4 - Port analog switch control"]
91 #[inline(always)]
92 pub fn asc4(&self) -> Asc4R {
93 Asc4R::new(((self.bits >> 4) & 1) != 0)
94 }
95 #[doc = "Bit 5 - Port analog switch control"]
96 #[inline(always)]
97 pub fn asc5(&self) -> Asc5R {
98 Asc5R::new(((self.bits >> 5) & 1) != 0)
99 }
100 #[doc = "Bit 6 - Port analog switch control"]
101 #[inline(always)]
102 pub fn asc6(&self) -> Asc6R {
103 Asc6R::new(((self.bits >> 6) & 1) != 0)
104 }
105 #[doc = "Bit 7 - Port analog switch control"]
106 #[inline(always)]
107 pub fn asc7(&self) -> Asc7R {
108 Asc7R::new(((self.bits >> 7) & 1) != 0)
109 }
110 #[doc = "Bit 8 - Port analog switch control"]
111 #[inline(always)]
112 pub fn asc8(&self) -> Asc8R {
113 Asc8R::new(((self.bits >> 8) & 1) != 0)
114 }
115 #[doc = "Bit 9 - Port analog switch control"]
116 #[inline(always)]
117 pub fn asc9(&self) -> Asc9R {
118 Asc9R::new(((self.bits >> 9) & 1) != 0)
119 }
120 #[doc = "Bit 10 - Port analog switch control"]
121 #[inline(always)]
122 pub fn asc10(&self) -> Asc10R {
123 Asc10R::new(((self.bits >> 10) & 1) != 0)
124 }
125 #[doc = "Bit 11 - Port analog switch control"]
126 #[inline(always)]
127 pub fn asc11(&self) -> Asc11R {
128 Asc11R::new(((self.bits >> 11) & 1) != 0)
129 }
130 #[doc = "Bit 12 - Port analog switch control"]
131 #[inline(always)]
132 pub fn asc12(&self) -> Asc12R {
133 Asc12R::new(((self.bits >> 12) & 1) != 0)
134 }
135 #[doc = "Bit 13 - Port analog switch control"]
136 #[inline(always)]
137 pub fn asc13(&self) -> Asc13R {
138 Asc13R::new(((self.bits >> 13) & 1) != 0)
139 }
140 #[doc = "Bit 14 - Port analog switch control"]
141 #[inline(always)]
142 pub fn asc14(&self) -> Asc14R {
143 Asc14R::new(((self.bits >> 14) & 1) != 0)
144 }
145 #[doc = "Bit 15 - Port analog switch control"]
146 #[inline(always)]
147 pub fn asc15(&self) -> Asc15R {
148 Asc15R::new(((self.bits >> 15) & 1) != 0)
149 }
150}
151impl W {
152 #[doc = "Bit 0 - Port analog switch control"]
153 #[inline(always)]
154 pub fn asc0(&mut self) -> Asc0W<AscrSpec> {
155 Asc0W::new(self, 0)
156 }
157 #[doc = "Bit 1 - Port analog switch control"]
158 #[inline(always)]
159 pub fn asc1(&mut self) -> Asc1W<AscrSpec> {
160 Asc1W::new(self, 1)
161 }
162 #[doc = "Bit 2 - Port analog switch control"]
163 #[inline(always)]
164 pub fn asc2(&mut self) -> Asc2W<AscrSpec> {
165 Asc2W::new(self, 2)
166 }
167 #[doc = "Bit 3 - Port analog switch control"]
168 #[inline(always)]
169 pub fn asc3(&mut self) -> Asc3W<AscrSpec> {
170 Asc3W::new(self, 3)
171 }
172 #[doc = "Bit 4 - Port analog switch control"]
173 #[inline(always)]
174 pub fn asc4(&mut self) -> Asc4W<AscrSpec> {
175 Asc4W::new(self, 4)
176 }
177 #[doc = "Bit 5 - Port analog switch control"]
178 #[inline(always)]
179 pub fn asc5(&mut self) -> Asc5W<AscrSpec> {
180 Asc5W::new(self, 5)
181 }
182 #[doc = "Bit 6 - Port analog switch control"]
183 #[inline(always)]
184 pub fn asc6(&mut self) -> Asc6W<AscrSpec> {
185 Asc6W::new(self, 6)
186 }
187 #[doc = "Bit 7 - Port analog switch control"]
188 #[inline(always)]
189 pub fn asc7(&mut self) -> Asc7W<AscrSpec> {
190 Asc7W::new(self, 7)
191 }
192 #[doc = "Bit 8 - Port analog switch control"]
193 #[inline(always)]
194 pub fn asc8(&mut self) -> Asc8W<AscrSpec> {
195 Asc8W::new(self, 8)
196 }
197 #[doc = "Bit 9 - Port analog switch control"]
198 #[inline(always)]
199 pub fn asc9(&mut self) -> Asc9W<AscrSpec> {
200 Asc9W::new(self, 9)
201 }
202 #[doc = "Bit 10 - Port analog switch control"]
203 #[inline(always)]
204 pub fn asc10(&mut self) -> Asc10W<AscrSpec> {
205 Asc10W::new(self, 10)
206 }
207 #[doc = "Bit 11 - Port analog switch control"]
208 #[inline(always)]
209 pub fn asc11(&mut self) -> Asc11W<AscrSpec> {
210 Asc11W::new(self, 11)
211 }
212 #[doc = "Bit 12 - Port analog switch control"]
213 #[inline(always)]
214 pub fn asc12(&mut self) -> Asc12W<AscrSpec> {
215 Asc12W::new(self, 12)
216 }
217 #[doc = "Bit 13 - Port analog switch control"]
218 #[inline(always)]
219 pub fn asc13(&mut self) -> Asc13W<AscrSpec> {
220 Asc13W::new(self, 13)
221 }
222 #[doc = "Bit 14 - Port analog switch control"]
223 #[inline(always)]
224 pub fn asc14(&mut self) -> Asc14W<AscrSpec> {
225 Asc14W::new(self, 14)
226 }
227 #[doc = "Bit 15 - Port analog switch control"]
228 #[inline(always)]
229 pub fn asc15(&mut self) -> Asc15W<AscrSpec> {
230 Asc15W::new(self, 15)
231 }
232}
233#[doc = "GPIO port analog switch control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ascr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ascr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
234pub struct AscrSpec;
235impl crate::RegisterSpec for AscrSpec {
236 type Ux = u32;
237}
238#[doc = "`read()` method returns [`ascr::R`](R) reader structure"]
239impl crate::Readable for AscrSpec {}
240#[doc = "`write(|w| ..)` method takes [`ascr::W`](W) writer structure"]
241impl crate::Writable for AscrSpec {
242 type Safety = crate::Unsafe;
243}
244#[doc = "`reset()` method sets ASCR to value 0"]
245impl crate::Resettable for AscrSpec {}