stm32l476/lcd/
lcd_ram11.rs

1#[doc = "Register `LCD_RAM11` reader"]
2pub type R = crate::R<LcdRam11Spec>;
3#[doc = "Register `LCD_RAM11` writer"]
4pub type W = crate::W<LcdRam11Spec>;
5#[doc = "Each bit corresponds to one pixel of the LCD display.\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum SegmentData {
9    #[doc = "0: Pixel inactive"]
10    B0x0 = 0,
11    #[doc = "1: Pixel active"]
12    B0x1 = 1,
13}
14impl From<SegmentData> for u8 {
15    #[inline(always)]
16    fn from(variant: SegmentData) -> Self {
17        variant as _
18    }
19}
20impl crate::FieldSpec for SegmentData {
21    type Ux = u8;
22}
23impl crate::IsEnum for SegmentData {}
24#[doc = "Field `SEGMENT_DATA` reader - Each bit corresponds to one pixel of the LCD display."]
25pub type SegmentDataR = crate::FieldReader<SegmentData>;
26impl SegmentDataR {
27    #[doc = "Get enumerated values variant"]
28    #[inline(always)]
29    pub const fn variant(&self) -> Option<SegmentData> {
30        match self.bits {
31            0 => Some(SegmentData::B0x0),
32            1 => Some(SegmentData::B0x1),
33            _ => None,
34        }
35    }
36    #[doc = "Pixel inactive"]
37    #[inline(always)]
38    pub fn is_b_0x0(&self) -> bool {
39        *self == SegmentData::B0x0
40    }
41    #[doc = "Pixel active"]
42    #[inline(always)]
43    pub fn is_b_0x1(&self) -> bool {
44        *self == SegmentData::B0x1
45    }
46}
47#[doc = "Field `SEGMENT_DATA` writer - Each bit corresponds to one pixel of the LCD display."]
48pub type SegmentDataW<'a, REG> = crate::FieldWriter<'a, REG, 8, SegmentData>;
49impl<'a, REG> SegmentDataW<'a, REG>
50where
51    REG: crate::Writable + crate::RegisterSpec,
52    REG::Ux: From<u8>,
53{
54    #[doc = "Pixel inactive"]
55    #[inline(always)]
56    pub fn b_0x0(self) -> &'a mut crate::W<REG> {
57        self.variant(SegmentData::B0x0)
58    }
59    #[doc = "Pixel active"]
60    #[inline(always)]
61    pub fn b_0x1(self) -> &'a mut crate::W<REG> {
62        self.variant(SegmentData::B0x1)
63    }
64}
65impl R {
66    #[doc = "Bits 0:7 - Each bit corresponds to one pixel of the LCD display."]
67    #[inline(always)]
68    pub fn segment_data(&self) -> SegmentDataR {
69        SegmentDataR::new((self.bits & 0xff) as u8)
70    }
71}
72impl W {
73    #[doc = "Bits 0:7 - Each bit corresponds to one pixel of the LCD display."]
74    #[inline(always)]
75    pub fn segment_data(&mut self) -> SegmentDataW<LcdRam11Spec> {
76        SegmentDataW::new(self, 0)
77    }
78}
79#[doc = "LCD display memory\n\nYou can [`read`](crate::Reg::read) this register and get [`lcd_ram11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcd_ram11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct LcdRam11Spec;
81impl crate::RegisterSpec for LcdRam11Spec {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`lcd_ram11::R`](R) reader structure"]
85impl crate::Readable for LcdRam11Spec {}
86#[doc = "`write(|w| ..)` method takes [`lcd_ram11::W`](W) writer structure"]
87impl crate::Writable for LcdRam11Spec {
88    type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets LCD_RAM11 to value 0"]
91impl crate::Resettable for LcdRam11Spec {}
stm32l476/lcd/lcd_ram11.rs

stm32l476/lcd/
lcd_ram11.rs
