#[doc = "Register `FIR1` writer"]
pub struct W(crate::W<FIR1_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<FIR1_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<FIR1_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<FIR1_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `FTOHSTX` writer - Force Timeout High-Speed Transmission"]
pub struct FTOHSTX_W<'a> {
w: &'a mut W,
}
impl<'a> FTOHSTX_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "Field `FTOLPRX` writer - Force Timeout Low-Power Reception"]
pub struct FTOLPRX_W<'a> {
w: &'a mut W,
}
impl<'a> FTOLPRX_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `FECCSE` writer - Force ECC Single-bit Error"]
pub struct FECCSE_W<'a> {
w: &'a mut W,
}
impl<'a> FECCSE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `FECCME` writer - Force ECC Multi-bit Error"]
pub struct FECCME_W<'a> {
w: &'a mut W,
}
impl<'a> FECCME_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `FCRCE` writer - Force CRC Error"]
pub struct FCRCE_W<'a> {
w: &'a mut W,
}
impl<'a> FCRCE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `FPSE` writer - Force Packet Size Error"]
pub struct FPSE_W<'a> {
w: &'a mut W,
}
impl<'a> FPSE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `FEOTPE` writer - Force EoTp Error"]
pub struct FEOTPE_W<'a> {
w: &'a mut W,
}
impl<'a> FEOTPE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "Field `FLPWRE` writer - Force LTDC Payload Write Error"]
pub struct FLPWRE_W<'a> {
w: &'a mut W,
}
impl<'a> FLPWRE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "Field `FGCWRE` writer - Force Generic Command Write Error"]
pub struct FGCWRE_W<'a> {
w: &'a mut W,
}
impl<'a> FGCWRE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "Field `FGPWRE` writer - Force Generic Payload Write Error"]
pub struct FGPWRE_W<'a> {
w: &'a mut W,
}
impl<'a> FGPWRE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `FGPTXE` writer - Force Generic Payload Transmit Error"]
pub struct FGPTXE_W<'a> {
w: &'a mut W,
}
impl<'a> FGPTXE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "Field `FGPRDE` writer - Force Generic Payload Read Error"]
pub struct FGPRDE_W<'a> {
w: &'a mut W,
}
impl<'a> FGPRDE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Field `FGPRXE` writer - Force Generic Payload Receive Error"]
pub struct FGPRXE_W<'a> {
w: &'a mut W,
}
impl<'a> FGPRXE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
impl W {
#[doc = "Bit 0 - Force Timeout High-Speed Transmission"]
#[inline(always)]
pub fn ftohstx(&mut self) -> FTOHSTX_W {
FTOHSTX_W { w: self }
}
#[doc = "Bit 1 - Force Timeout Low-Power Reception"]
#[inline(always)]
pub fn ftolprx(&mut self) -> FTOLPRX_W {
FTOLPRX_W { w: self }
}
#[doc = "Bit 2 - Force ECC Single-bit Error"]
#[inline(always)]
pub fn feccse(&mut self) -> FECCSE_W {
FECCSE_W { w: self }
}
#[doc = "Bit 3 - Force ECC Multi-bit Error"]
#[inline(always)]
pub fn feccme(&mut self) -> FECCME_W {
FECCME_W { w: self }
}
#[doc = "Bit 4 - Force CRC Error"]
#[inline(always)]
pub fn fcrce(&mut self) -> FCRCE_W {
FCRCE_W { w: self }
}
#[doc = "Bit 5 - Force Packet Size Error"]
#[inline(always)]
pub fn fpse(&mut self) -> FPSE_W {
FPSE_W { w: self }
}
#[doc = "Bit 6 - Force EoTp Error"]
#[inline(always)]
pub fn feotpe(&mut self) -> FEOTPE_W {
FEOTPE_W { w: self }
}
#[doc = "Bit 7 - Force LTDC Payload Write Error"]
#[inline(always)]
pub fn flpwre(&mut self) -> FLPWRE_W {
FLPWRE_W { w: self }
}
#[doc = "Bit 8 - Force Generic Command Write Error"]
#[inline(always)]
pub fn fgcwre(&mut self) -> FGCWRE_W {
FGCWRE_W { w: self }
}
#[doc = "Bit 9 - Force Generic Payload Write Error"]
#[inline(always)]
pub fn fgpwre(&mut self) -> FGPWRE_W {
FGPWRE_W { w: self }
}
#[doc = "Bit 10 - Force Generic Payload Transmit Error"]
#[inline(always)]
pub fn fgptxe(&mut self) -> FGPTXE_W {
FGPTXE_W { w: self }
}
#[doc = "Bit 11 - Force Generic Payload Read Error"]
#[inline(always)]
pub fn fgprde(&mut self) -> FGPRDE_W {
FGPRDE_W { w: self }
}
#[doc = "Bit 12 - Force Generic Payload Receive Error"]
#[inline(always)]
pub fn fgprxe(&mut self) -> FGPRXE_W {
FGPRXE_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "DSI Host Force Interrupt Register 1\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fir1](index.html) module"]
pub struct FIR1_SPEC;
impl crate::RegisterSpec for FIR1_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [fir1::W](W) writer structure"]
impl crate::Writable for FIR1_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets FIR1 to value 0"]
impl crate::Resettable for FIR1_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}