#![deny(unsafe_code)]
#![no_main]
#![no_std]
#[macro_use(entry, exception)]
extern crate cortex_m_rt as rt;
extern crate cortex_m;
extern crate panic_semihosting;
extern crate embedded_hal as ehal;
extern crate stm32l4xx_hal as hal;
use cortex_m::asm;
use crate::hal::prelude::*;
use crate::hal::spi::Spi;
use crate::rt::ExceptionFrame;
use crate::ehal::spi::{Mode, Phase, Polarity};
pub const MODE: Mode = Mode {
phase: Phase::CaptureOnFirstTransition,
polarity: Polarity::IdleLow,
};
#[entry]
fn main() -> ! {
let p = hal::stm32::Peripherals::take().unwrap();
let mut flash = p.FLASH.constrain();
let mut rcc = p.RCC.constrain();
let clocks = rcc.cfgr.sysclk(80.mhz()).pclk1(80.mhz()).pclk2(80.mhz()).freeze(&mut flash.acr);
let mut gpioa = p.GPIOA.split(&mut rcc.ahb2);
let mut gpiob = p.GPIOB.split(&mut rcc.ahb2);
let mut dc = gpiob
.pb1
.into_push_pull_output(&mut gpiob.moder, &mut gpiob.otyper);
let sck = gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl);
let miso = gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl);
let mosi = gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl);
dc.set_low();
let mut spi = Spi::spi1(
p.SPI1,
(sck, miso, mosi),
MODE,
100.khz(),
clocks,
&mut rcc.apb2,
);
let data = [0x3C];
spi.write(&data).unwrap();
spi.write(&data).unwrap();
spi.write(&data).unwrap();
asm::bkpt();
loop {}
}
#[exception]
fn HardFault(ef: &ExceptionFrame) -> ! {
panic!("{:#?}", ef);
}