Struct stm32l0x1::rcc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock { pub cr: CR, pub icscr: ICSCR, pub cfgr: CFGR, pub cier: CIER, pub cifr: CIFR, pub cicr: CICR, pub ioprstr: IOPRSTR, pub ahbrstr: AHBRSTR, pub apb2rstr: APB2RSTR, pub apb1rstr: APB1RSTR, pub iopenr: IOPENR, pub ahbenr: AHBENR, pub apb2enr: APB2ENR, pub apb1enr: APB1ENR, pub iopsmen: IOPSMEN, pub ahbsmenr: AHBSMENR, pub apb2smenr: APB2SMENR, pub apb1smenr: APB1SMENR, pub ccipr: CCIPR, pub csr: CSR, // some fields omitted }
Register block
Fields
cr: CR
0x00 - Clock control register
icscr: ICSCR
0x04 - Internal clock sources calibration register
cfgr: CFGR
0x0c - Clock configuration register
cier: CIER
0x10 - Clock interrupt enable register
cifr: CIFR
0x14 - Clock interrupt flag register
cicr: CICR
0x18 - Clock interrupt clear register
ioprstr: IOPRSTR
0x1c - GPIO reset register
ahbrstr: AHBRSTR
0x20 - AHB peripheral reset register
apb2rstr: APB2RSTR
0x24 - APB2 peripheral reset register
apb1rstr: APB1RSTR
0x28 - APB1 peripheral reset register
iopenr: IOPENR
0x2c - GPIO clock enable register
ahbenr: AHBENR
0x30 - AHB peripheral clock enable register
apb2enr: APB2ENR
0x34 - APB2 peripheral clock enable register
apb1enr: APB1ENR
0x38 - APB1 peripheral clock enable register
iopsmen: IOPSMEN
0x3c - GPIO clock enable in sleep mode register
ahbsmenr: AHBSMENR
0x40 - AHB peripheral clock enable in sleep mode register
apb2smenr: APB2SMENR
0x44 - APB2 peripheral clock enable in sleep mode register
apb1smenr: APB1SMENR
0x48 - APB1 peripheral clock enable in sleep mode register
ccipr: CCIPR
0x4c - Clock configuration register
csr: CSR
0x50 - Control and status register
Auto Trait Implementations
impl Send for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl !Sync for RegisterBlock