#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::ACR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `LATENCY`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LATENCYR {
#[doc = "Zero wait state is used to read a word in the NVM"]
WS0,
#[doc = "One wait state is used to read a word in the NVM"]
WS1,
}
impl LATENCYR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
LATENCYR::WS0 => false,
LATENCYR::WS1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> LATENCYR {
match value {
false => LATENCYR::WS0,
true => LATENCYR::WS1,
}
}
#[doc = "Checks if the value of the field is `WS0`"]
#[inline]
pub fn is_ws0(&self) -> bool {
*self == LATENCYR::WS0
}
#[doc = "Checks if the value of the field is `WS1`"]
#[inline]
pub fn is_ws1(&self) -> bool {
*self == LATENCYR::WS1
}
}
#[doc = "Possible values of the field `PRFTEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRFTENR {
#[doc = "Prefetch is disabled"]
DISABLED,
#[doc = "Prefetch is enabled"]
ENABLED,
}
impl PRFTENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
PRFTENR::DISABLED => false,
PRFTENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> PRFTENR {
match value {
false => PRFTENR::DISABLED,
true => PRFTENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == PRFTENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == PRFTENR::ENABLED
}
}
#[doc = "Possible values of the field `SLEEP_PD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SLEEP_PDR {
#[doc = "When the device is in Sleep mode, the NVM is in Idle mode"]
NVMIDLEMODE,
#[doc = "When the device is in Sleep mode, the NVM is in power-down mode"]
NVMPWRDOWNMODE,
}
impl SLEEP_PDR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SLEEP_PDR::NVMIDLEMODE => false,
SLEEP_PDR::NVMPWRDOWNMODE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SLEEP_PDR {
match value {
false => SLEEP_PDR::NVMIDLEMODE,
true => SLEEP_PDR::NVMPWRDOWNMODE,
}
}
#[doc = "Checks if the value of the field is `NVMIDLEMODE`"]
#[inline]
pub fn is_nvmidle_mode(&self) -> bool {
*self == SLEEP_PDR::NVMIDLEMODE
}
#[doc = "Checks if the value of the field is `NVMPWRDOWNMODE`"]
#[inline]
pub fn is_nvmpwr_down_mode(&self) -> bool {
*self == SLEEP_PDR::NVMPWRDOWNMODE
}
}
#[doc = "Possible values of the field `RUN_PD`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RUN_PDR {
#[doc = "When the device is in Run mode, the NVM is in Idle mode"]
NVMIDLEMODE,
#[doc = "When the device is in Run mode, the NVM is in power-down mode"]
NVMPWRDOWNMODE,
}
impl RUN_PDR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RUN_PDR::NVMIDLEMODE => false,
RUN_PDR::NVMPWRDOWNMODE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RUN_PDR {
match value {
false => RUN_PDR::NVMIDLEMODE,
true => RUN_PDR::NVMPWRDOWNMODE,
}
}
#[doc = "Checks if the value of the field is `NVMIDLEMODE`"]
#[inline]
pub fn is_nvmidle_mode(&self) -> bool {
*self == RUN_PDR::NVMIDLEMODE
}
#[doc = "Checks if the value of the field is `NVMPWRDOWNMODE`"]
#[inline]
pub fn is_nvmpwr_down_mode(&self) -> bool {
*self == RUN_PDR::NVMPWRDOWNMODE
}
}
#[doc = "Possible values of the field `DISAB_BUF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DISAB_BUFR {
#[doc = "The buffers are enabled"]
ENABLED,
#[doc = "The buffers are disabled"]
DISABLED,
}
impl DISAB_BUFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DISAB_BUFR::ENABLED => false,
DISAB_BUFR::DISABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DISAB_BUFR {
match value {
false => DISAB_BUFR::ENABLED,
true => DISAB_BUFR::DISABLED,
}
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == DISAB_BUFR::ENABLED
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == DISAB_BUFR::DISABLED
}
}
#[doc = "Possible values of the field `PRE_READ`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRE_READR {
#[doc = "The pre-read is disabled"]
DISABLED,
#[doc = "The pre-read is enabled"]
ENABLED,
}
impl PRE_READR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
PRE_READR::DISABLED => false,
PRE_READR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> PRE_READR {
match value {
false => PRE_READR::DISABLED,
true => PRE_READR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == PRE_READR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == PRE_READR::ENABLED
}
}
#[doc = "Values that can be written to the field `LATENCY`"]
pub enum LATENCYW {
#[doc = "Zero wait state is used to read a word in the NVM"]
WS0,
#[doc = "One wait state is used to read a word in the NVM"]
WS1,
}
impl LATENCYW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
LATENCYW::WS0 => false,
LATENCYW::WS1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _LATENCYW<'a> {
w: &'a mut W,
}
impl<'a> _LATENCYW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: LATENCYW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Zero wait state is used to read a word in the NVM"]
#[inline]
pub fn ws0(self) -> &'a mut W {
self.variant(LATENCYW::WS0)
}
#[doc = "One wait state is used to read a word in the NVM"]
#[inline]
pub fn ws1(self) -> &'a mut W {
self.variant(LATENCYW::WS1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PRFTEN`"]
pub enum PRFTENW {
#[doc = "Prefetch is disabled"]
DISABLED,
#[doc = "Prefetch is enabled"]
ENABLED,
}
impl PRFTENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
PRFTENW::DISABLED => false,
PRFTENW::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _PRFTENW<'a> {
w: &'a mut W,
}
impl<'a> _PRFTENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PRFTENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Prefetch is disabled"]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(PRFTENW::DISABLED)
}
#[doc = "Prefetch is enabled"]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(PRFTENW::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SLEEP_PD`"]
pub enum SLEEP_PDW {
#[doc = "When the device is in Sleep mode, the NVM is in Idle mode"]
NVMIDLEMODE,
#[doc = "When the device is in Sleep mode, the NVM is in power-down mode"]
NVMPWRDOWNMODE,
}
impl SLEEP_PDW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SLEEP_PDW::NVMIDLEMODE => false,
SLEEP_PDW::NVMPWRDOWNMODE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SLEEP_PDW<'a> {
w: &'a mut W,
}
impl<'a> _SLEEP_PDW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SLEEP_PDW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "When the device is in Sleep mode, the NVM is in Idle mode"]
#[inline]
pub fn nvmidle_mode(self) -> &'a mut W {
self.variant(SLEEP_PDW::NVMIDLEMODE)
}
#[doc = "When the device is in Sleep mode, the NVM is in power-down mode"]
#[inline]
pub fn nvmpwr_down_mode(self) -> &'a mut W {
self.variant(SLEEP_PDW::NVMPWRDOWNMODE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RUN_PD`"]
pub enum RUN_PDW {
#[doc = "When the device is in Run mode, the NVM is in Idle mode"]
NVMIDLEMODE,
#[doc = "When the device is in Run mode, the NVM is in power-down mode"]
NVMPWRDOWNMODE,
}
impl RUN_PDW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RUN_PDW::NVMIDLEMODE => false,
RUN_PDW::NVMPWRDOWNMODE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RUN_PDW<'a> {
w: &'a mut W,
}
impl<'a> _RUN_PDW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RUN_PDW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "When the device is in Run mode, the NVM is in Idle mode"]
#[inline]
pub fn nvmidle_mode(self) -> &'a mut W {
self.variant(RUN_PDW::NVMIDLEMODE)
}
#[doc = "When the device is in Run mode, the NVM is in power-down mode"]
#[inline]
pub fn nvmpwr_down_mode(self) -> &'a mut W {
self.variant(RUN_PDW::NVMPWRDOWNMODE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DISAB_BUF`"]
pub enum DISAB_BUFW {
#[doc = "The buffers are enabled"]
ENABLED,
#[doc = "The buffers are disabled"]
DISABLED,
}
impl DISAB_BUFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DISAB_BUFW::ENABLED => false,
DISAB_BUFW::DISABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DISAB_BUFW<'a> {
w: &'a mut W,
}
impl<'a> _DISAB_BUFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DISAB_BUFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The buffers are enabled"]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(DISAB_BUFW::ENABLED)
}
#[doc = "The buffers are disabled"]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(DISAB_BUFW::DISABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PRE_READ`"]
pub enum PRE_READW {
#[doc = "The pre-read is disabled"]
DISABLED,
#[doc = "The pre-read is enabled"]
ENABLED,
}
impl PRE_READW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
PRE_READW::DISABLED => false,
PRE_READW::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _PRE_READW<'a> {
w: &'a mut W,
}
impl<'a> _PRE_READW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PRE_READW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The pre-read is disabled"]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(PRE_READW::DISABLED)
}
#[doc = "The pre-read is enabled"]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(PRE_READW::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Latency"]
#[inline]
pub fn latency(&self) -> LATENCYR {
LATENCYR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Prefetch enable"]
#[inline]
pub fn prften(&self) -> PRFTENR {
PRFTENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 3 - Flash mode during Sleep"]
#[inline]
pub fn sleep_pd(&self) -> SLEEP_PDR {
SLEEP_PDR::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 4 - Flash mode during Run"]
#[inline]
pub fn run_pd(&self) -> RUN_PDR {
RUN_PDR::_from({
const MASK: bool = true;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 5 - Disable Buffer"]
#[inline]
pub fn disab_buf(&self) -> DISAB_BUFR {
DISAB_BUFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 6 - Pre-read data address"]
#[inline]
pub fn pre_read(&self) -> PRE_READR {
PRE_READR::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Latency"]
#[inline]
pub fn latency(&mut self) -> _LATENCYW {
_LATENCYW { w: self }
}
#[doc = "Bit 1 - Prefetch enable"]
#[inline]
pub fn prften(&mut self) -> _PRFTENW {
_PRFTENW { w: self }
}
#[doc = "Bit 3 - Flash mode during Sleep"]
#[inline]
pub fn sleep_pd(&mut self) -> _SLEEP_PDW {
_SLEEP_PDW { w: self }
}
#[doc = "Bit 4 - Flash mode during Run"]
#[inline]
pub fn run_pd(&mut self) -> _RUN_PDW {
_RUN_PDW { w: self }
}
#[doc = "Bit 5 - Disable Buffer"]
#[inline]
pub fn disab_buf(&mut self) -> _DISAB_BUFW {
_DISAB_BUFW { w: self }
}
#[doc = "Bit 6 - Pre-read data address"]
#[inline]
pub fn pre_read(&mut self) -> _PRE_READW {
_PRE_READW { w: self }
}
}