#[doc = r" Value read from the register"]
pub struct R {
    bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
    bits: u32,
}
impl super::CR {
    #[doc = r" Modifies the contents of the register"]
    #[inline]
    pub fn modify<F>(&self, f: F)
    where
        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
    {
        let bits = self.register.get();
        let r = R { bits: bits };
        let mut w = W { bits: bits };
        f(&r, &mut w);
        self.register.set(w.bits);
    }
    #[doc = r" Reads the contents of the register"]
    #[inline]
    pub fn read(&self) -> R {
        R {
            bits: self.register.get(),
        }
    }
    #[doc = r" Writes to the register"]
    #[inline]
    pub fn write<F>(&self, f: F)
    where
        F: FnOnce(&mut W) -> &mut W,
    {
        let mut w = W::reset_value();
        f(&mut w);
        self.register.set(w.bits);
    }
    #[doc = r" Writes the reset value to the register"]
    #[inline]
    pub fn reset(&self) {
        self.write(|w| w)
    }
}
#[doc = "Possible values of the field `ADEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADENR {
    #[doc = "ADC disabled"]
    DISABLED,
    #[doc = "ADC enabled"]
    ENABLED,
}
impl ADENR {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            ADENR::DISABLED => false,
            ADENR::ENABLED => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> ADENR {
        match value {
            false => ADENR::DISABLED,
            true => ADENR::ENABLED,
        }
    }
    #[doc = "Checks if the value of the field is `DISABLED`"]
    #[inline]
    pub fn is_disabled(&self) -> bool {
        *self == ADENR::DISABLED
    }
    #[doc = "Checks if the value of the field is `ENABLED`"]
    #[inline]
    pub fn is_enabled(&self) -> bool {
        *self == ADENR::ENABLED
    }
}
#[doc = "Possible values of the field `ADDIS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADDISR {
    #[doc = "No disable command active"]
    NOTDISABLING,
    #[doc = "ADC disabling"]
    DISABLING,
}
impl ADDISR {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            ADDISR::NOTDISABLING => false,
            ADDISR::DISABLING => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> ADDISR {
        match value {
            false => ADDISR::NOTDISABLING,
            true => ADDISR::DISABLING,
        }
    }
    #[doc = "Checks if the value of the field is `NOTDISABLING`"]
    #[inline]
    pub fn is_not_disabling(&self) -> bool {
        *self == ADDISR::NOTDISABLING
    }
    #[doc = "Checks if the value of the field is `DISABLING`"]
    #[inline]
    pub fn is_disabling(&self) -> bool {
        *self == ADDISR::DISABLING
    }
}
#[doc = "Possible values of the field `ADSTART`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADSTARTR {
    #[doc = "No conversion ongoing"]
    NOTACTIVE,
    #[doc = "ADC operating and may be converting"]
    ACTIVE,
}
impl ADSTARTR {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            ADSTARTR::NOTACTIVE => false,
            ADSTARTR::ACTIVE => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> ADSTARTR {
        match value {
            false => ADSTARTR::NOTACTIVE,
            true => ADSTARTR::ACTIVE,
        }
    }
    #[doc = "Checks if the value of the field is `NOTACTIVE`"]
    #[inline]
    pub fn is_not_active(&self) -> bool {
        *self == ADSTARTR::NOTACTIVE
    }
    #[doc = "Checks if the value of the field is `ACTIVE`"]
    #[inline]
    pub fn is_active(&self) -> bool {
        *self == ADSTARTR::ACTIVE
    }
}
#[doc = "Possible values of the field `ADSTP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADSTPR {
    #[doc = "No stop command active"]
    NOTSTOPPING,
    #[doc = "ADC stopping conversion"]
    STOPPING,
}
impl ADSTPR {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            ADSTPR::NOTSTOPPING => false,
            ADSTPR::STOPPING => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> ADSTPR {
        match value {
            false => ADSTPR::NOTSTOPPING,
            true => ADSTPR::STOPPING,
        }
    }
    #[doc = "Checks if the value of the field is `NOTSTOPPING`"]
    #[inline]
    pub fn is_not_stopping(&self) -> bool {
        *self == ADSTPR::NOTSTOPPING
    }
    #[doc = "Checks if the value of the field is `STOPPING`"]
    #[inline]
    pub fn is_stopping(&self) -> bool {
        *self == ADSTPR::STOPPING
    }
}
#[doc = "Possible values of the field `ADVREGEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADVREGENR {
    #[doc = "ADC voltage regulator disabled"]
    DISABLED,
    #[doc = "ADC voltage regulator enabled"]
    ENABLED,
}
impl ADVREGENR {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            ADVREGENR::DISABLED => false,
            ADVREGENR::ENABLED => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> ADVREGENR {
        match value {
            false => ADVREGENR::DISABLED,
            true => ADVREGENR::ENABLED,
        }
    }
    #[doc = "Checks if the value of the field is `DISABLED`"]
    #[inline]
    pub fn is_disabled(&self) -> bool {
        *self == ADVREGENR::DISABLED
    }
    #[doc = "Checks if the value of the field is `ENABLED`"]
    #[inline]
    pub fn is_enabled(&self) -> bool {
        *self == ADVREGENR::ENABLED
    }
}
#[doc = "Possible values of the field `ADCAL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCALR {
    #[doc = "ADC calibration either not yet performed or completed"]
    NOTCALIBRATING,
    #[doc = "ADC calibration in progress"]
    CALIBRATING,
}
impl ADCALR {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            ADCALR::NOTCALIBRATING => false,
            ADCALR::CALIBRATING => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> ADCALR {
        match value {
            false => ADCALR::NOTCALIBRATING,
            true => ADCALR::CALIBRATING,
        }
    }
    #[doc = "Checks if the value of the field is `NOTCALIBRATING`"]
    #[inline]
    pub fn is_not_calibrating(&self) -> bool {
        *self == ADCALR::NOTCALIBRATING
    }
    #[doc = "Checks if the value of the field is `CALIBRATING`"]
    #[inline]
    pub fn is_calibrating(&self) -> bool {
        *self == ADCALR::CALIBRATING
    }
}
#[doc = "Values that can be written to the field `ADEN`"]
pub enum ADENW {
    #[doc = "Enable the ADC"]
    ENABLED,
}
impl ADENW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            ADENW::ENABLED => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADENW<'a> {
    w: &'a mut W,
}
impl<'a> _ADENW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADENW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "Enable the ADC"]
    #[inline]
    pub fn enabled(self) -> &'a mut W {
        self.variant(ADENW::ENABLED)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 0;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `ADDIS`"]
pub enum ADDISW {
    #[doc = "Disable the ADC"]
    DISABLE,
}
impl ADDISW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            ADDISW::DISABLE => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADDISW<'a> {
    w: &'a mut W,
}
impl<'a> _ADDISW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADDISW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "Disable the ADC"]
    #[inline]
    pub fn disable(self) -> &'a mut W {
        self.variant(ADDISW::DISABLE)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 1;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `ADSTART`"]
pub enum ADSTARTW {
    #[doc = "Start the ADC conversion (may be delayed for hardware triggers)"]
    STARTCONVERSION,
}
impl ADSTARTW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            ADSTARTW::STARTCONVERSION => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADSTARTW<'a> {
    w: &'a mut W,
}
impl<'a> _ADSTARTW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADSTARTW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "Start the ADC conversion (may be delayed for hardware triggers)"]
    #[inline]
    pub fn start_conversion(self) -> &'a mut W {
        self.variant(ADSTARTW::STARTCONVERSION)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 2;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `ADSTP`"]
pub enum ADSTPW {
    #[doc = "Stop the active conversion"]
    STOPCONVERSION,
}
impl ADSTPW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            ADSTPW::STOPCONVERSION => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADSTPW<'a> {
    w: &'a mut W,
}
impl<'a> _ADSTPW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADSTPW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "Stop the active conversion"]
    #[inline]
    pub fn stop_conversion(self) -> &'a mut W {
        self.variant(ADSTPW::STOPCONVERSION)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 4;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `ADVREGEN`"]
pub enum ADVREGENW {
    #[doc = "ADC voltage regulator disabled"]
    DISABLED,
    #[doc = "ADC voltage regulator enabled"]
    ENABLED,
}
impl ADVREGENW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            ADVREGENW::DISABLED => false,
            ADVREGENW::ENABLED => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADVREGENW<'a> {
    w: &'a mut W,
}
impl<'a> _ADVREGENW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADVREGENW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "ADC voltage regulator disabled"]
    #[inline]
    pub fn disabled(self) -> &'a mut W {
        self.variant(ADVREGENW::DISABLED)
    }
    #[doc = "ADC voltage regulator enabled"]
    #[inline]
    pub fn enabled(self) -> &'a mut W {
        self.variant(ADVREGENW::ENABLED)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 28;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `ADCAL`"]
pub enum ADCALW {
    #[doc = "Start the ADC calibration sequence"]
    STARTCALIBRATION,
}
impl ADCALW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            ADCALW::STARTCALIBRATION => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADCALW<'a> {
    w: &'a mut W,
}
impl<'a> _ADCALW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADCALW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "Start the ADC calibration sequence"]
    #[inline]
    pub fn start_calibration(self) -> &'a mut W {
        self.variant(ADCALW::STARTCALIBRATION)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 31;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
impl R {
    #[doc = r" Value of the register as raw bits"]
    #[inline]
    pub fn bits(&self) -> u32 {
        self.bits
    }
    #[doc = "Bit 0 - ADC enable command"]
    #[inline]
    pub fn aden(&self) -> ADENR {
        ADENR::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 0;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bit 1 - ADC disable command"]
    #[inline]
    pub fn addis(&self) -> ADDISR {
        ADDISR::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 1;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bit 2 - ADC start conversion command"]
    #[inline]
    pub fn adstart(&self) -> ADSTARTR {
        ADSTARTR::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 2;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bit 4 - ADC stop conversion command"]
    #[inline]
    pub fn adstp(&self) -> ADSTPR {
        ADSTPR::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 4;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bit 28 - ADC Voltage Regulator Enable"]
    #[inline]
    pub fn advregen(&self) -> ADVREGENR {
        ADVREGENR::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 28;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bit 31 - ADC calibration"]
    #[inline]
    pub fn adcal(&self) -> ADCALR {
        ADCALR::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 31;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
}
impl W {
    #[doc = r" Reset value of the register"]
    #[inline]
    pub fn reset_value() -> W {
        W { bits: 0 }
    }
    #[doc = r" Writes raw bits to the register"]
    #[inline]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
    #[doc = "Bit 0 - ADC enable command"]
    #[inline]
    pub fn aden(&mut self) -> _ADENW {
        _ADENW { w: self }
    }
    #[doc = "Bit 1 - ADC disable command"]
    #[inline]
    pub fn addis(&mut self) -> _ADDISW {
        _ADDISW { w: self }
    }
    #[doc = "Bit 2 - ADC start conversion command"]
    #[inline]
    pub fn adstart(&mut self) -> _ADSTARTW {
        _ADSTARTW { w: self }
    }
    #[doc = "Bit 4 - ADC stop conversion command"]
    #[inline]
    pub fn adstp(&mut self) -> _ADSTPW {
        _ADSTPW { w: self }
    }
    #[doc = "Bit 28 - ADC Voltage Regulator Enable"]
    #[inline]
    pub fn advregen(&mut self) -> _ADVREGENW {
        _ADVREGENW { w: self }
    }
    #[doc = "Bit 31 - ADC calibration"]
    #[inline]
    pub fn adcal(&mut self) -> _ADCALW {
        _ADCALW { w: self }
    }
}