#[doc = "Register `APB1ENR` reader"]
pub struct R(crate::R<APB1ENR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<APB1ENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<APB1ENR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<APB1ENR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `APB1ENR` writer"]
pub struct W(crate::W<APB1ENR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<APB1ENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<APB1ENR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<APB1ENR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Low power timer clock enable bit"]
pub type LPTIM1EN_A = TIM2EN_A;
#[doc = "Field `LPTIM1EN` reader - Low power timer clock enable bit"]
pub type LPTIM1EN_R = TIM2EN_R;
#[doc = "Field `LPTIM1EN` writer - Low power timer clock enable bit"]
pub struct LPTIM1EN_W<'a> {
w: &'a mut W,
}
impl<'a> LPTIM1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LPTIM1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(LPTIM1EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(LPTIM1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
self.w
}
}
#[doc = "DAC interface clock enable bit"]
pub type DACEN_A = TIM2EN_A;
#[doc = "Field `DACEN` reader - DAC interface clock enable bit"]
pub type DACEN_R = TIM2EN_R;
#[doc = "Field `DACEN` writer - DAC interface clock enable bit"]
pub struct DACEN_W<'a> {
w: &'a mut W,
}
impl<'a> DACEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DACEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DACEN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DACEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
self.w
}
}
#[doc = "Power interface clock enable bit"]
pub type PWREN_A = TIM2EN_A;
#[doc = "Field `PWREN` reader - Power interface clock enable bit"]
pub type PWREN_R = TIM2EN_R;
#[doc = "Field `PWREN` writer - Power interface clock enable bit"]
pub struct PWREN_W<'a> {
w: &'a mut W,
}
impl<'a> PWREN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PWREN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(PWREN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(PWREN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
self.w
}
}
#[doc = "Clock recovery system clock enable bit"]
pub type CRSEN_A = TIM2EN_A;
#[doc = "Field `CRSEN` reader - Clock recovery system clock enable bit"]
pub type CRSEN_R = TIM2EN_R;
#[doc = "Field `CRSEN` writer - Clock recovery system clock enable bit"]
pub struct CRSEN_W<'a> {
w: &'a mut W,
}
impl<'a> CRSEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CRSEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CRSEN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CRSEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
self.w
}
}
#[doc = "USB clock enable bit"]
pub type USBEN_A = TIM2EN_A;
#[doc = "Field `USBEN` reader - USB clock enable bit"]
pub type USBEN_R = TIM2EN_R;
#[doc = "Field `USBEN` writer - USB clock enable bit"]
pub struct USBEN_W<'a> {
w: &'a mut W,
}
impl<'a> USBEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USBEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(USBEN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(USBEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
self.w
}
}
#[doc = "I2C2 clock enable bit"]
pub type I2C2EN_A = TIM2EN_A;
#[doc = "Field `I2C2EN` reader - I2C2 clock enable bit"]
pub type I2C2EN_R = TIM2EN_R;
#[doc = "Field `I2C2EN` writer - I2C2 clock enable bit"]
pub struct I2C2EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(I2C2EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(I2C2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
self.w
}
}
#[doc = "I2C1 clock enable bit"]
pub type I2C1EN_A = TIM2EN_A;
#[doc = "Field `I2C1EN` reader - I2C1 clock enable bit"]
pub type I2C1EN_R = TIM2EN_R;
#[doc = "Field `I2C1EN` writer - I2C1 clock enable bit"]
pub struct I2C1EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(I2C1EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(I2C1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
self.w
}
}
#[doc = "LPUART1 clock enable bit"]
pub type LPUART1EN_A = TIM2EN_A;
#[doc = "Field `LPUART1EN` reader - LPUART1 clock enable bit"]
pub type LPUART1EN_R = TIM2EN_R;
#[doc = "Field `LPUART1EN` writer - LPUART1 clock enable bit"]
pub struct LPUART1EN_W<'a> {
w: &'a mut W,
}
impl<'a> LPUART1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LPUART1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(LPUART1EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(LPUART1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "UART2 clock enable bit"]
pub type USART2EN_A = TIM2EN_A;
#[doc = "Field `USART2EN` reader - UART2 clock enable bit"]
pub type USART2EN_R = TIM2EN_R;
#[doc = "Field `USART2EN` writer - UART2 clock enable bit"]
pub struct USART2EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(USART2EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(USART2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
self.w
}
}
#[doc = "SPI2 clock enable bit"]
pub type SPI2EN_A = TIM2EN_A;
#[doc = "Field `SPI2EN` reader - SPI2 clock enable bit"]
pub type SPI2EN_R = TIM2EN_R;
#[doc = "Field `SPI2EN` writer - SPI2 clock enable bit"]
pub struct SPI2EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SPI2EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SPI2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
self.w
}
}
#[doc = "Window watchdog clock enable bit"]
pub type WWDGEN_A = TIM2EN_A;
#[doc = "Field `WWDGEN` reader - Window watchdog clock enable bit"]
pub type WWDGEN_R = TIM2EN_R;
#[doc = "Field `WWDGEN` writer - Window watchdog clock enable bit"]
pub struct WWDGEN_W<'a> {
w: &'a mut W,
}
impl<'a> WWDGEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WWDGEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(WWDGEN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(WWDGEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Timer 6 clock enable bit"]
pub type TIM6EN_A = TIM2EN_A;
#[doc = "Field `TIM6EN` reader - Timer 6 clock enable bit"]
pub type TIM6EN_R = TIM2EN_R;
#[doc = "Field `TIM6EN` writer - Timer 6 clock enable bit"]
pub struct TIM6EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM6EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM6EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM6EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM6EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Timer2 clock enable bit\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2EN_A {
#[doc = "0: Clock disabled"]
DISABLED = 0,
#[doc = "1: Clock enabled"]
ENABLED = 1,
}
impl From<TIM2EN_A> for bool {
#[inline(always)]
fn from(variant: TIM2EN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `TIM2EN` reader - Timer2 clock enable bit"]
pub struct TIM2EN_R(crate::FieldReader<bool, TIM2EN_A>);
impl TIM2EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM2EN_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TIM2EN_A {
match self.bits {
false => TIM2EN_A::DISABLED,
true => TIM2EN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
**self == TIM2EN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
**self == TIM2EN_A::ENABLED
}
}
impl core::ops::Deref for TIM2EN_R {
type Target = crate::FieldReader<bool, TIM2EN_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM2EN` writer - Timer2 clock enable bit"]
pub struct TIM2EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "Timer3 clock enable bit"]
pub type TIM3EN_A = TIM2EN_A;
#[doc = "Field `TIM3EN` reader - Timer3 clock enable bit"]
pub type TIM3EN_R = TIM2EN_R;
#[doc = "Field `TIM3EN` writer - Timer3 clock enable bit"]
pub struct TIM3EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM3EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM3EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM3EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Timer 7 clock enable bit"]
pub type TIM7EN_A = TIM2EN_A;
#[doc = "Field `TIM7EN` reader - Timer 7 clock enable bit"]
pub type TIM7EN_R = TIM2EN_R;
#[doc = "Field `TIM7EN` writer - Timer 7 clock enable bit"]
pub struct TIM7EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM7EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM7EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM7EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM7EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "USART4 clock enable bit"]
pub type USART4EN_A = TIM2EN_A;
#[doc = "Field `USART4EN` reader - USART4 clock enable bit"]
pub type USART4EN_R = TIM2EN_R;
#[doc = "Field `USART4EN` writer - USART4 clock enable bit"]
pub struct USART4EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART4EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART4EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(USART4EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(USART4EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
self.w
}
}
#[doc = "USART5 clock enable bit"]
pub type USART5EN_A = TIM2EN_A;
#[doc = "Field `USART5EN` reader - USART5 clock enable bit"]
pub type USART5EN_R = TIM2EN_R;
#[doc = "Field `USART5EN` writer - USART5 clock enable bit"]
pub struct USART5EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART5EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART5EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(USART5EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(USART5EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
self.w
}
}
#[doc = "I2C3 clock enable bit"]
pub type I2C3EN_A = TIM2EN_A;
#[doc = "Field `I2C3EN` reader - I2C3 clock enable bit"]
pub type I2C3EN_R = TIM2EN_R;
#[doc = "Field `I2C3EN` writer - I2C3 clock enable bit"]
pub struct I2C3EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C3EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Clock disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(I2C3EN_A::DISABLED)
}
#[doc = "Clock enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(I2C3EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
self.w
}
}
impl R {
#[doc = "Bit 31 - Low power timer clock enable bit"]
#[inline(always)]
pub fn lptim1en(&self) -> LPTIM1EN_R {
LPTIM1EN_R::new(((self.bits >> 31) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC interface clock enable bit"]
#[inline(always)]
pub fn dacen(&self) -> DACEN_R {
DACEN_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 28 - Power interface clock enable bit"]
#[inline(always)]
pub fn pwren(&self) -> PWREN_R {
PWREN_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 27 - Clock recovery system clock enable bit"]
#[inline(always)]
pub fn crsen(&self) -> CRSEN_R {
CRSEN_R::new(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 23 - USB clock enable bit"]
#[inline(always)]
pub fn usben(&self) -> USBEN_R {
USBEN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C2 clock enable bit"]
#[inline(always)]
pub fn i2c2en(&self) -> I2C2EN_R {
I2C2EN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C1 clock enable bit"]
#[inline(always)]
pub fn i2c1en(&self) -> I2C1EN_R {
I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 18 - LPUART1 clock enable bit"]
#[inline(always)]
pub fn lpuart1en(&self) -> LPUART1EN_R {
LPUART1EN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 17 - UART2 clock enable bit"]
#[inline(always)]
pub fn usart2en(&self) -> USART2EN_R {
USART2EN_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI2 clock enable bit"]
#[inline(always)]
pub fn spi2en(&self) -> SPI2EN_R {
SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 11 - Window watchdog clock enable bit"]
#[inline(always)]
pub fn wwdgen(&self) -> WWDGEN_R {
WWDGEN_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 4 - Timer 6 clock enable bit"]
#[inline(always)]
pub fn tim6en(&self) -> TIM6EN_R {
TIM6EN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 0 - Timer2 clock enable bit"]
#[inline(always)]
pub fn tim2en(&self) -> TIM2EN_R {
TIM2EN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - Timer3 clock enable bit"]
#[inline(always)]
pub fn tim3en(&self) -> TIM3EN_R {
TIM3EN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 5 - Timer 7 clock enable bit"]
#[inline(always)]
pub fn tim7en(&self) -> TIM7EN_R {
TIM7EN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 19 - USART4 clock enable bit"]
#[inline(always)]
pub fn usart4en(&self) -> USART4EN_R {
USART4EN_R::new(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - USART5 clock enable bit"]
#[inline(always)]
pub fn usart5en(&self) -> USART5EN_R {
USART5EN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 30 - I2C3 clock enable bit"]
#[inline(always)]
pub fn i2c3en(&self) -> I2C3EN_R {
I2C3EN_R::new(((self.bits >> 30) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 31 - Low power timer clock enable bit"]
#[inline(always)]
pub fn lptim1en(&mut self) -> LPTIM1EN_W {
LPTIM1EN_W { w: self }
}
#[doc = "Bit 29 - DAC interface clock enable bit"]
#[inline(always)]
pub fn dacen(&mut self) -> DACEN_W {
DACEN_W { w: self }
}
#[doc = "Bit 28 - Power interface clock enable bit"]
#[inline(always)]
pub fn pwren(&mut self) -> PWREN_W {
PWREN_W { w: self }
}
#[doc = "Bit 27 - Clock recovery system clock enable bit"]
#[inline(always)]
pub fn crsen(&mut self) -> CRSEN_W {
CRSEN_W { w: self }
}
#[doc = "Bit 23 - USB clock enable bit"]
#[inline(always)]
pub fn usben(&mut self) -> USBEN_W {
USBEN_W { w: self }
}
#[doc = "Bit 22 - I2C2 clock enable bit"]
#[inline(always)]
pub fn i2c2en(&mut self) -> I2C2EN_W {
I2C2EN_W { w: self }
}
#[doc = "Bit 21 - I2C1 clock enable bit"]
#[inline(always)]
pub fn i2c1en(&mut self) -> I2C1EN_W {
I2C1EN_W { w: self }
}
#[doc = "Bit 18 - LPUART1 clock enable bit"]
#[inline(always)]
pub fn lpuart1en(&mut self) -> LPUART1EN_W {
LPUART1EN_W { w: self }
}
#[doc = "Bit 17 - UART2 clock enable bit"]
#[inline(always)]
pub fn usart2en(&mut self) -> USART2EN_W {
USART2EN_W { w: self }
}
#[doc = "Bit 14 - SPI2 clock enable bit"]
#[inline(always)]
pub fn spi2en(&mut self) -> SPI2EN_W {
SPI2EN_W { w: self }
}
#[doc = "Bit 11 - Window watchdog clock enable bit"]
#[inline(always)]
pub fn wwdgen(&mut self) -> WWDGEN_W {
WWDGEN_W { w: self }
}
#[doc = "Bit 4 - Timer 6 clock enable bit"]
#[inline(always)]
pub fn tim6en(&mut self) -> TIM6EN_W {
TIM6EN_W { w: self }
}
#[doc = "Bit 0 - Timer2 clock enable bit"]
#[inline(always)]
pub fn tim2en(&mut self) -> TIM2EN_W {
TIM2EN_W { w: self }
}
#[doc = "Bit 1 - Timer3 clock enable bit"]
#[inline(always)]
pub fn tim3en(&mut self) -> TIM3EN_W {
TIM3EN_W { w: self }
}
#[doc = "Bit 5 - Timer 7 clock enable bit"]
#[inline(always)]
pub fn tim7en(&mut self) -> TIM7EN_W {
TIM7EN_W { w: self }
}
#[doc = "Bit 19 - USART4 clock enable bit"]
#[inline(always)]
pub fn usart4en(&mut self) -> USART4EN_W {
USART4EN_W { w: self }
}
#[doc = "Bit 20 - USART5 clock enable bit"]
#[inline(always)]
pub fn usart5en(&mut self) -> USART5EN_W {
USART5EN_W { w: self }
}
#[doc = "Bit 30 - I2C3 clock enable bit"]
#[inline(always)]
pub fn i2c3en(&mut self) -> I2C3EN_W {
I2C3EN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "APB1 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1enr](index.html) module"]
pub struct APB1ENR_SPEC;
impl crate::RegisterSpec for APB1ENR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [apb1enr::R](R) reader structure"]
impl crate::Readable for APB1ENR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [apb1enr::W](W) writer structure"]
impl crate::Writable for APB1ENR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets APB1ENR to value 0"]
impl crate::Resettable for APB1ENR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}