stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `FMT0_DR` reader
pub type R = crate::R<FMT0_DRrs>;
///Field `DR` reader - data value Contains the 24 received data bits, aligned on D\[23\]
pub type DR_R = crate::FieldReader<u32>;
///Field `PE` reader - parity error bit Contains a copy of PERR bit if PMSK = 0, otherwise it is forced to 0
pub type PE_R = crate::BitReader;
///Field `V` reader - validity bit Contains the received validity bit if VMSK = 0, otherwise it is forced to 0
pub type V_R = crate::BitReader;
///Field `U` reader - user bit Contains the received user bit, if CUMSK = 0, otherwise it is forced to 0
pub type U_R = crate::BitReader;
///Field `C` reader - channel status bit Contains the received channel status bit, if CUMSK = 0, otherwise it is forced to 0
pub type C_R = crate::BitReader;
///Field `PT` reader - preamble type These bits indicate the preamble received. Note that if PTMSK = 1, this field is forced to zero
pub type PT_R = crate::FieldReader;
impl R {
    ///Bits 0:23 - data value Contains the 24 received data bits, aligned on D\[23\]
    #[inline(always)]
    pub fn dr(&self) -> DR_R {
        DR_R::new(self.bits & 0x00ff_ffff)
    }
    ///Bit 24 - parity error bit Contains a copy of PERR bit if PMSK = 0, otherwise it is forced to 0
    #[inline(always)]
    pub fn pe(&self) -> PE_R {
        PE_R::new(((self.bits >> 24) & 1) != 0)
    }
    ///Bit 25 - validity bit Contains the received validity bit if VMSK = 0, otherwise it is forced to 0
    #[inline(always)]
    pub fn v(&self) -> V_R {
        V_R::new(((self.bits >> 25) & 1) != 0)
    }
    ///Bit 26 - user bit Contains the received user bit, if CUMSK = 0, otherwise it is forced to 0
    #[inline(always)]
    pub fn u(&self) -> U_R {
        U_R::new(((self.bits >> 26) & 1) != 0)
    }
    ///Bit 27 - channel status bit Contains the received channel status bit, if CUMSK = 0, otherwise it is forced to 0
    #[inline(always)]
    pub fn c(&self) -> C_R {
        C_R::new(((self.bits >> 27) & 1) != 0)
    }
    ///Bits 28:29 - preamble type These bits indicate the preamble received. Note that if PTMSK = 1, this field is forced to zero
    #[inline(always)]
    pub fn pt(&self) -> PT_R {
        PT_R::new(((self.bits >> 28) & 3) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("FMT0_DR")
            .field("dr", &self.dr())
            .field("pe", &self.pe())
            .field("v", &self.v())
            .field("u", &self.u())
            .field("c", &self.c())
            .field("pt", &self.pt())
            .finish()
    }
}
/**SPDIFRX data input register

You can [`read`](crate::Reg::read) this register and get [`fmt0_dr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct FMT0_DRrs;
impl crate::RegisterSpec for FMT0_DRrs {
    type Ux = u32;
}
///`read()` method returns [`fmt0_dr::R`](R) reader structure
impl crate::Readable for FMT0_DRrs {}
///`reset()` method sets FMT0_DR to value 0
impl crate::Resettable for FMT0_DRrs {}