stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29

///Register `RESPCMDR` reader
pub type R = crate::R<RESPCMDRrs>;
///Field `RESPCMD` reader - Response command index
pub type RESPCMD_R = crate::FieldReader;
impl R {
    ///Bits 0:5 - Response command index
    #[inline(always)]
    pub fn respcmd(&self) -> RESPCMD_R {
        RESPCMD_R::new((self.bits & 0x3f) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("RESPCMDR").field("respcmd", &self.respcmd()).finish()
    }
}
/**SDMMC command response register

You can [`read`](crate::Reg::read) this register and get [`respcmdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct RESPCMDRrs;
impl crate::RegisterSpec for RESPCMDRrs {
    type Ux = u32;
}
///`read()` method returns [`respcmdr::R`](R) reader structure
impl crate::Readable for RESPCMDRrs {}
///`reset()` method sets RESPCMDR to value 0xa3c5_dd01
impl crate::Resettable for RESPCMDRrs {
    const RESET_VALUE: u32 = 0xa3c5_dd01;
}