stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `DR` reader
pub type R = crate::R<DRrs>;
///Field `RNDATA` reader - Random data 32-bit random data which are valid when DRDY=1.
pub type RNDATA_R = crate::FieldReader<u32>;
impl R {
    ///Bits 0:31 - Random data 32-bit random data which are valid when DRDY=1.
    #[inline(always)]
    pub fn rndata(&self) -> RNDATA_R {
        RNDATA_R::new(self.bits)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DR").field("rndata", &self.rndata()).finish()
    }
}
/**The RNG_DR register is a read-only register that delivers a 32-bit random value when read. The content of this register is valid when DRDY= 1, even if RNGEN=0.

You can [`read`](crate::Reg::read) this register and get [`dr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct DRrs;
impl crate::RegisterSpec for DRrs {
    type Ux = u32;
}
///`read()` method returns [`dr::R`](R) reader structure
impl crate::Readable for DRrs {}
///`reset()` method sets DR to value 0
impl crate::Resettable for DRrs {}