stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `CCNR0` reader
pub type R = crate::R<CCNR0rs>;
///Register `CCNR0` writer
pub type W = crate::W<CCNR0rs>;
///Field `SCNONCE` reader - Stream cipher nonce, bits \[31:0\] This register is used by stream cipher to compute keystream. It must be correctly initialize before CCEN bit is set in MCE_CCzCFGR register. Bitfield usage is defined in Section 35.4.6: MCE stream cipher encryption mode.
pub type SCNONCE_R = crate::FieldReader<u32>;
///Field `SCNONCE` writer - Stream cipher nonce, bits \[31:0\] This register is used by stream cipher to compute keystream. It must be correctly initialize before CCEN bit is set in MCE_CCzCFGR register. Bitfield usage is defined in Section 35.4.6: MCE stream cipher encryption mode.
pub type SCNONCE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
impl R {
    ///Bits 0:31 - Stream cipher nonce, bits \[31:0\] This register is used by stream cipher to compute keystream. It must be correctly initialize before CCEN bit is set in MCE_CCzCFGR register. Bitfield usage is defined in Section 35.4.6: MCE stream cipher encryption mode.
    #[inline(always)]
    pub fn scnonce(&self) -> SCNONCE_R {
        SCNONCE_R::new(self.bits)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("CCNR0").field("scnonce", &self.scnonce()).finish()
    }
}
impl W {
    ///Bits 0:31 - Stream cipher nonce, bits \[31:0\] This register is used by stream cipher to compute keystream. It must be correctly initialize before CCEN bit is set in MCE_CCzCFGR register. Bitfield usage is defined in Section 35.4.6: MCE stream cipher encryption mode.
    #[inline(always)]
    pub fn scnonce(&mut self) -> SCNONCE_W<CCNR0rs> {
        SCNONCE_W::new(self, 0)
    }
}
/**MCE cipher context 1 nonce register 0

You can [`read`](crate::Reg::read) this register and get [`ccnr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccnr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct CCNR0rs;
impl crate::RegisterSpec for CCNR0rs {
    type Ux = u32;
}
///`read()` method returns [`ccnr0::R`](R) reader structure
impl crate::Readable for CCNR0rs {}
///`write(|w| ..)` method takes [`ccnr0::W`](W) writer structure
impl crate::Writable for CCNR0rs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets CCNR0 to value 0
impl crate::Resettable for CCNR0rs {}