1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
///Register block
/**ISR_OUTPUT (r) register accessor: LPTIM1 interrupt and status register
You can [`read`](crate::Reg::read) this register and get [`isr_output::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@isr_output`] module*/
pub type ISR_OUTPUT = crateReg;
///LPTIM1 interrupt and status register
/**ISR_INPUT (r) register accessor: LPTIM1 interrupt and status register
You can [`read`](crate::Reg::read) this register and get [`isr_input::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@isr_input`] module*/
pub type ISR_INPUT = crateReg;
///LPTIM1 interrupt and status register
/**ICR_OUTPUT (w) register accessor: LPTIM1 interrupt clear register
You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr_output::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@icr_output`] module*/
pub type ICR_OUTPUT = crateReg;
///LPTIM1 interrupt clear register
/**ICR_INPUT (w) register accessor: LPTIM1 interrupt clear register
You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr_input::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@icr_input`] module*/
pub type ICR_INPUT = crateReg;
///LPTIM1 interrupt clear register
/**DIER_OUTPUT (rw) register accessor: LPTIM1 interrupt enable register
You can [`read`](crate::Reg::read) this register and get [`dier_output::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dier_output::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@dier_output`] module*/
pub type DIER_OUTPUT = crateReg;
///LPTIM1 interrupt enable register
/**DIER_INPUT (rw) register accessor: LPTIM1 interrupt enable register
You can [`read`](crate::Reg::read) this register and get [`dier_input::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dier_input::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
For information about available fields see [`mod@dier_input`] module*/
pub type DIER_INPUT = crateReg;
///LPTIM1 interrupt enable register