stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104

///Register `APB2FZ1` reader
pub type R = crate::R<APB2FZ1rs>;
///Register `APB2FZ1` writer
pub type W = crate::W<APB2FZ1rs>;
///Field `DBG_TIM1` reader - TIM1 stop in debug
pub type DBG_TIM1_R = crate::BitReader;
///Field `DBG_TIM1` writer - TIM1 stop in debug
pub type DBG_TIM1_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_TIM8` reader - TIM8 stop in debug
pub type DBG_TIM8_R = crate::BitReader;
///Field `DBG_TIM8` writer - TIM8 stop in debug
pub type DBG_TIM8_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_TIM15` reader - TIM15 stop in debug
pub type DBG_TIM15_R = crate::BitReader;
///Field `DBG_TIM15` writer - TIM15 stop in debug
pub type DBG_TIM15_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_TIM16` reader - TIM16 stop in debug
pub type DBG_TIM16_R = crate::BitReader;
///Field `DBG_TIM16` writer - TIM16 stop in debug
pub type DBG_TIM16_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_TIM17` reader - TIM17 stop in debug
pub type DBG_TIM17_R = crate::BitReader;
///Field `DBG_TIM17` writer - TIM17 stop in debug
pub type DBG_TIM17_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    ///Bit 0 - TIM1 stop in debug
    #[inline(always)]
    pub fn dbg_tim1(&self) -> DBG_TIM1_R {
        DBG_TIM1_R::new((self.bits & 1) != 0)
    }
    ///Bit 1 - TIM8 stop in debug
    #[inline(always)]
    pub fn dbg_tim8(&self) -> DBG_TIM8_R {
        DBG_TIM8_R::new(((self.bits >> 1) & 1) != 0)
    }
    ///Bit 16 - TIM15 stop in debug
    #[inline(always)]
    pub fn dbg_tim15(&self) -> DBG_TIM15_R {
        DBG_TIM15_R::new(((self.bits >> 16) & 1) != 0)
    }
    ///Bit 17 - TIM16 stop in debug
    #[inline(always)]
    pub fn dbg_tim16(&self) -> DBG_TIM16_R {
        DBG_TIM16_R::new(((self.bits >> 17) & 1) != 0)
    }
    ///Bit 18 - TIM17 stop in debug
    #[inline(always)]
    pub fn dbg_tim17(&self) -> DBG_TIM17_R {
        DBG_TIM17_R::new(((self.bits >> 18) & 1) != 0)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("APB2FZ1")
            .field("dbg_tim1", &self.dbg_tim1())
            .field("dbg_tim8", &self.dbg_tim8())
            .field("dbg_tim15", &self.dbg_tim15())
            .field("dbg_tim16", &self.dbg_tim16())
            .field("dbg_tim17", &self.dbg_tim17())
            .finish()
    }
}
impl W {
    ///Bit 0 - TIM1 stop in debug
    #[inline(always)]
    pub fn dbg_tim1(&mut self) -> DBG_TIM1_W<APB2FZ1rs> {
        DBG_TIM1_W::new(self, 0)
    }
    ///Bit 1 - TIM8 stop in debug
    #[inline(always)]
    pub fn dbg_tim8(&mut self) -> DBG_TIM8_W<APB2FZ1rs> {
        DBG_TIM8_W::new(self, 1)
    }
    ///Bit 16 - TIM15 stop in debug
    #[inline(always)]
    pub fn dbg_tim15(&mut self) -> DBG_TIM15_W<APB2FZ1rs> {
        DBG_TIM15_W::new(self, 16)
    }
    ///Bit 17 - TIM16 stop in debug
    #[inline(always)]
    pub fn dbg_tim16(&mut self) -> DBG_TIM16_W<APB2FZ1rs> {
        DBG_TIM16_W::new(self, 17)
    }
    ///Bit 18 - TIM17 stop in debug
    #[inline(always)]
    pub fn dbg_tim17(&mut self) -> DBG_TIM17_W<APB2FZ1rs> {
        DBG_TIM17_W::new(self, 18)
    }
}
/**DBGMCU APB2 peripheral freeze register

You can [`read`](crate::Reg::read) this register and get [`apb2fz1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb2fz1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct APB2FZ1rs;
impl crate::RegisterSpec for APB2FZ1rs {
    type Ux = u32;
}
///`read()` method returns [`apb2fz1::R`](R) reader structure
impl crate::Readable for APB2FZ1rs {}
///`write(|w| ..)` method takes [`apb2fz1::W`](W) writer structure
impl crate::Writable for APB2FZ1rs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets APB2FZ1 to value 0
impl crate::Resettable for APB2FZ1rs {}