#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::D2CCIP2R {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct USART234578SRCR {
bits: u8,
}
impl USART234578SRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct USART16SRCR {
bits: u8,
}
impl USART16SRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RNGSRCR {
bits: u8,
}
impl RNGSRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct I2C123SRCR {
bits: u8,
}
impl I2C123SRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct USBSRCR {
bits: u8,
}
impl USBSRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct CECSRCR {
bits: u8,
}
impl CECSRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct LPTIM1SRCR {
bits: u8,
}
impl LPTIM1SRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _USART234578SRCW<'a> {
w: &'a mut W,
}
impl<'a> _USART234578SRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _USART16SRCW<'a> {
w: &'a mut W,
}
impl<'a> _USART16SRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RNGSRCW<'a> {
w: &'a mut W,
}
impl<'a> _RNGSRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _I2C123SRCW<'a> {
w: &'a mut W,
}
impl<'a> _I2C123SRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _USBSRCW<'a> {
w: &'a mut W,
}
impl<'a> _USBSRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 20;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _CECSRCW<'a> {
w: &'a mut W,
}
impl<'a> _CECSRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 22;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _LPTIM1SRCW<'a> {
w: &'a mut W,
}
impl<'a> _LPTIM1SRCW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 28;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:2 - USART2/3, UART4,5, 7/8 (APB1) kernel clock source selection"]
#[inline]
pub fn usart234578src(&self) -> USART234578SRCR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
USART234578SRCR { bits }
}
#[doc = "Bits 3:5 - USART1 and 6 kernel clock source selection"]
#[inline]
pub fn usart16src(&self) -> USART16SRCR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u32) as u8
};
USART16SRCR { bits }
}
#[doc = "Bits 8:9 - RNG kernel clock source selection"]
#[inline]
pub fn rngsrc(&self) -> RNGSRCR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RNGSRCR { bits }
}
#[doc = "Bits 12:13 - I2C1,2,3 kernel clock source selection"]
#[inline]
pub fn i2c123src(&self) -> I2C123SRCR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) as u8
};
I2C123SRCR { bits }
}
#[doc = "Bits 20:21 - USBOTG 1 and 2 kernel clock source selection"]
#[inline]
pub fn usbsrc(&self) -> USBSRCR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) as u8
};
USBSRCR { bits }
}
#[doc = "Bits 22:23 - HDMI-CEC kernel clock source selection"]
#[inline]
pub fn cecsrc(&self) -> CECSRCR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) as u8
};
CECSRCR { bits }
}
#[doc = "Bits 28:30 - LPTIM1 kernel clock source selection"]
#[inline]
pub fn lptim1src(&self) -> LPTIM1SRCR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 28;
((self.bits >> OFFSET) & MASK as u32) as u8
};
LPTIM1SRCR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:2 - USART2/3, UART4,5, 7/8 (APB1) kernel clock source selection"]
#[inline]
pub fn usart234578src(&mut self) -> _USART234578SRCW {
_USART234578SRCW { w: self }
}
#[doc = "Bits 3:5 - USART1 and 6 kernel clock source selection"]
#[inline]
pub fn usart16src(&mut self) -> _USART16SRCW {
_USART16SRCW { w: self }
}
#[doc = "Bits 8:9 - RNG kernel clock source selection"]
#[inline]
pub fn rngsrc(&mut self) -> _RNGSRCW {
_RNGSRCW { w: self }
}
#[doc = "Bits 12:13 - I2C1,2,3 kernel clock source selection"]
#[inline]
pub fn i2c123src(&mut self) -> _I2C123SRCW {
_I2C123SRCW { w: self }
}
#[doc = "Bits 20:21 - USBOTG 1 and 2 kernel clock source selection"]
#[inline]
pub fn usbsrc(&mut self) -> _USBSRCW {
_USBSRCW { w: self }
}
#[doc = "Bits 22:23 - HDMI-CEC kernel clock source selection"]
#[inline]
pub fn cecsrc(&mut self) -> _CECSRCW {
_CECSRCW { w: self }
}
#[doc = "Bits 28:30 - LPTIM1 kernel clock source selection"]
#[inline]
pub fn lptim1src(&mut self) -> _LPTIM1SRCW {
_LPTIM1SRCW { w: self }
}
}