stm32h7 0.5.0

Device support crates for STM32H7 devices
Documentation 
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#[doc = r" Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - QUADSPI control register"]
    pub quadspi_cr: QUADSPI_CR,
    #[doc = "0x04 - QUADSPI device configuration register"]
    pub quadspi_dcr: QUADSPI_DCR,
    #[doc = "0x08 - QUADSPI status register"]
    pub quadspi_sr: QUADSPI_SR,
    #[doc = "0x0c - QUADSPI flag clear register"]
    pub quadspi_fcr: QUADSPI_FCR,
    #[doc = "0x10 - QUADSPI data length register"]
    pub quadspi_dlr: QUADSPI_DLR,
    #[doc = "0x14 - QUADSPI communication configuration register"]
    pub quadspi_ccr: QUADSPI_CCR,
    #[doc = "0x18 - QUADSPI address register"]
    pub quadspi_ar: QUADSPI_AR,
    #[doc = "0x1c - QUADSPI alternate bytes registers"]
    pub quadspi_abr: QUADSPI_ABR,
    #[doc = "0x20 - QUADSPI data register"]
    pub quadspi_dr: QUADSPI_DR,
    #[doc = "0x24 - QUADSPI polling status mask register"]
    pub quadspi_psmkr: QUADSPI_PSMKR,
    #[doc = "0x28 - QUADSPI polling status match register"]
    pub quadspi_psmar: QUADSPI_PSMAR,
    #[doc = "0x2c - QUADSPI polling interval register"]
    pub quadspi_pir: QUADSPI_PIR,
    #[doc = "0x30 - QUADSPI low-power timeout register"]
    pub quadspi_lptr: QUADSPI_LPTR,
}
#[doc = "QUADSPI control register"]
pub struct QUADSPI_CR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI control register"]
pub mod quadspi_cr;
#[doc = "QUADSPI device configuration register"]
pub struct QUADSPI_DCR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI device configuration register"]
pub mod quadspi_dcr;
#[doc = "QUADSPI status register"]
pub struct QUADSPI_SR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI status register"]
pub mod quadspi_sr;
#[doc = "QUADSPI flag clear register"]
pub struct QUADSPI_FCR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI flag clear register"]
pub mod quadspi_fcr;
#[doc = "QUADSPI data length register"]
pub struct QUADSPI_DLR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI data length register"]
pub mod quadspi_dlr;
#[doc = "QUADSPI communication configuration register"]
pub struct QUADSPI_CCR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI communication configuration register"]
pub mod quadspi_ccr;
#[doc = "QUADSPI address register"]
pub struct QUADSPI_AR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI address register"]
pub mod quadspi_ar;
#[doc = "QUADSPI alternate bytes registers"]
pub struct QUADSPI_ABR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI alternate bytes registers"]
pub mod quadspi_abr;
#[doc = "QUADSPI data register"]
pub struct QUADSPI_DR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI data register"]
pub mod quadspi_dr;
#[doc = "QUADSPI polling status mask register"]
pub struct QUADSPI_PSMKR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI polling status mask register"]
pub mod quadspi_psmkr;
#[doc = "QUADSPI polling status match register"]
pub struct QUADSPI_PSMAR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI polling status match register"]
pub mod quadspi_psmar;
#[doc = "QUADSPI polling interval register"]
pub struct QUADSPI_PIR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI polling interval register"]
pub mod quadspi_pir;
#[doc = "QUADSPI low-power timeout register"]
pub struct QUADSPI_LPTR {
    register: ::vcell::VolatileCell<u32>,
}
#[doc = "QUADSPI low-power timeout register"]
pub mod quadspi_lptr;