stm32h7 0.5.0

Device support crates for STM32H7 devices
Documentation 
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#[doc = r" Value read from the register"]
pub struct R {
    bits: u32,
}
impl super::FDCAN_DBTP {
    #[doc = r" Reads the contents of the register"]
    #[inline]
    pub fn read(&self) -> R {
        R {
            bits: self.register.get(),
        }
    }
}
#[doc = r" Value of the field"]
pub struct DSJWR {
    bits: u8,
}
impl DSJWR {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        self.bits
    }
}
#[doc = r" Value of the field"]
pub struct DTSEG2R {
    bits: u8,
}
impl DTSEG2R {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        self.bits
    }
}
#[doc = r" Value of the field"]
pub struct DTSEG1R {
    bits: u8,
}
impl DTSEG1R {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        self.bits
    }
}
#[doc = r" Value of the field"]
pub struct DBRPR {
    bits: u8,
}
impl DBRPR {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        self.bits
    }
}
#[doc = r" Value of the field"]
pub struct TDCR {
    bits: bool,
}
impl TDCR {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        self.bits
    }
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
}
impl R {
    #[doc = r" Value of the register as raw bits"]
    #[inline]
    pub fn bits(&self) -> u32 {
        self.bits
    }
    #[doc = "Bits 0:3 - Synchronization Jump Width"]
    #[inline]
    pub fn dsjw(&self) -> DSJWR {
        let bits = {
            const MASK: u8 = 15;
            const OFFSET: u8 = 0;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        };
        DSJWR { bits }
    }
    #[doc = "Bits 4:7 - Data time segment after sample point"]
    #[inline]
    pub fn dtseg2(&self) -> DTSEG2R {
        let bits = {
            const MASK: u8 = 15;
            const OFFSET: u8 = 4;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        };
        DTSEG2R { bits }
    }
    #[doc = "Bits 8:12 - Data time segment after sample point"]
    #[inline]
    pub fn dtseg1(&self) -> DTSEG1R {
        let bits = {
            const MASK: u8 = 31;
            const OFFSET: u8 = 8;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        };
        DTSEG1R { bits }
    }
    #[doc = "Bits 16:20 - Data BIt Rate Prescaler"]
    #[inline]
    pub fn dbrp(&self) -> DBRPR {
        let bits = {
            const MASK: u8 = 31;
            const OFFSET: u8 = 16;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        };
        DBRPR { bits }
    }
    #[doc = "Bit 23 - Transceiver Delay Compensation"]
    #[inline]
    pub fn tdc(&self) -> TDCR {
        let bits = {
            const MASK: bool = true;
            const OFFSET: u8 = 23;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        };
        TDCR { bits }
    }
}