#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CFGR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct JQDISR {
bits: bool,
}
impl JQDISR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct AWDCH1CHR {
bits: u8,
}
impl AWDCH1CHR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct JAUTOR {
bits: bool,
}
impl JAUTOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct JAWD1ENR {
bits: bool,
}
impl JAWD1ENR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct AWD1ENR {
bits: bool,
}
impl AWD1ENR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct AWD1SGLR {
bits: bool,
}
impl AWD1SGLR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct JQMR {
bits: bool,
}
impl JQMR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct JDISCENR {
bits: bool,
}
impl JDISCENR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct DISCNUMR {
bits: u8,
}
impl DISCNUMR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DISCENR {
bits: bool,
}
impl DISCENR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct AUTDLYR {
bits: bool,
}
impl AUTDLYR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct CONTR {
bits: bool,
}
impl CONTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct OVRMODR {
bits: bool,
}
impl OVRMODR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct EXTENR {
bits: u8,
}
impl EXTENR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EXTSELR {
bits: u8,
}
impl EXTSELR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RESR {
bits: u8,
}
impl RESR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DMNGTR {
bits: u8,
}
impl DMNGTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _JQDISW<'a> {
w: &'a mut W,
}
impl<'a> _JQDISW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _AWDCH1CHW<'a> {
w: &'a mut W,
}
impl<'a> _AWDCH1CHW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 26;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _JAUTOW<'a> {
w: &'a mut W,
}
impl<'a> _JAUTOW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 25;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _JAWD1ENW<'a> {
w: &'a mut W,
}
impl<'a> _JAWD1ENW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _AWD1ENW<'a> {
w: &'a mut W,
}
impl<'a> _AWD1ENW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 23;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _AWD1SGLW<'a> {
w: &'a mut W,
}
impl<'a> _AWD1SGLW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 22;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _JQMW<'a> {
w: &'a mut W,
}
impl<'a> _JQMW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 21;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _JDISCENW<'a> {
w: &'a mut W,
}
impl<'a> _JDISCENW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 20;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DISCNUMW<'a> {
w: &'a mut W,
}
impl<'a> _DISCNUMW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 17;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DISCENW<'a> {
w: &'a mut W,
}
impl<'a> _DISCENW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _AUTDLYW<'a> {
w: &'a mut W,
}
impl<'a> _AUTDLYW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 14;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _CONTW<'a> {
w: &'a mut W,
}
impl<'a> _CONTW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 13;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _OVRMODW<'a> {
w: &'a mut W,
}
impl<'a> _OVRMODW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EXTENW<'a> {
w: &'a mut W,
}
impl<'a> _EXTENW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EXTSELW<'a> {
w: &'a mut W,
}
impl<'a> _EXTSELW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RESW<'a> {
w: &'a mut W,
}
impl<'a> _RESW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DMNGTW<'a> {
w: &'a mut W,
}
impl<'a> _DMNGTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 31 - ADC group injected contexts queue disable"]
#[inline]
pub fn jqdis(&self) -> JQDISR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
};
JQDISR { bits }
}
#[doc = "Bits 26:30 - ADC analog watchdog 1 monitored channel selection"]
#[inline]
pub fn awdch1ch(&self) -> AWDCH1CHR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 26;
((self.bits >> OFFSET) & MASK as u32) as u8
};
AWDCH1CHR { bits }
}
#[doc = "Bit 25 - ADC group injected automatic trigger mode"]
#[inline]
pub fn jauto(&self) -> JAUTOR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 25;
((self.bits >> OFFSET) & MASK as u32) != 0
};
JAUTOR { bits }
}
#[doc = "Bit 24 - ADC analog watchdog 1 enable on scope ADC group injected"]
#[inline]
pub fn jawd1en(&self) -> JAWD1ENR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) != 0
};
JAWD1ENR { bits }
}
#[doc = "Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular"]
#[inline]
pub fn awd1en(&self) -> AWD1ENR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 23;
((self.bits >> OFFSET) & MASK as u32) != 0
};
AWD1ENR { bits }
}
#[doc = "Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels"]
#[inline]
pub fn awd1sgl(&self) -> AWD1SGLR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
};
AWD1SGLR { bits }
}
#[doc = "Bit 21 - ADC group injected contexts queue mode"]
#[inline]
pub fn jqm(&self) -> JQMR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
};
JQMR { bits }
}
#[doc = "Bit 20 - ADC group injected sequencer discontinuous mode"]
#[inline]
pub fn jdiscen(&self) -> JDISCENR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) != 0
};
JDISCENR { bits }
}
#[doc = "Bits 17:19 - ADC group regular sequencer discontinuous number of ranks"]
#[inline]
pub fn discnum(&self) -> DISCNUMR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 17;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DISCNUMR { bits }
}
#[doc = "Bit 16 - ADC group regular sequencer discontinuous mode"]
#[inline]
pub fn discen(&self) -> DISCENR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) != 0
};
DISCENR { bits }
}
#[doc = "Bit 14 - ADC low power auto wait"]
#[inline]
pub fn autdly(&self) -> AUTDLYR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
};
AUTDLYR { bits }
}
#[doc = "Bit 13 - ADC group regular continuous conversion mode"]
#[inline]
pub fn cont(&self) -> CONTR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
};
CONTR { bits }
}
#[doc = "Bit 12 - ADC group regular overrun configuration"]
#[inline]
pub fn ovrmod(&self) -> OVRMODR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) != 0
};
OVRMODR { bits }
}
#[doc = "Bits 10:11 - ADC group regular external trigger polarity"]
#[inline]
pub fn exten(&self) -> EXTENR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EXTENR { bits }
}
#[doc = "Bits 5:9 - ADC group regular external trigger source"]
#[inline]
pub fn extsel(&self) -> EXTSELR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EXTSELR { bits }
}
#[doc = "Bits 2:3 - ADC data resolution"]
#[inline]
pub fn res(&self) -> RESR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RESR { bits }
}
#[doc = "Bits 0:1 - ADC DMA transfer enable"]
#[inline]
pub fn dmngt(&self) -> DMNGTR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DMNGTR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 31 - ADC group injected contexts queue disable"]
#[inline]
pub fn jqdis(&mut self) -> _JQDISW {
_JQDISW { w: self }
}
#[doc = "Bits 26:30 - ADC analog watchdog 1 monitored channel selection"]
#[inline]
pub fn awdch1ch(&mut self) -> _AWDCH1CHW {
_AWDCH1CHW { w: self }
}
#[doc = "Bit 25 - ADC group injected automatic trigger mode"]
#[inline]
pub fn jauto(&mut self) -> _JAUTOW {
_JAUTOW { w: self }
}
#[doc = "Bit 24 - ADC analog watchdog 1 enable on scope ADC group injected"]
#[inline]
pub fn jawd1en(&mut self) -> _JAWD1ENW {
_JAWD1ENW { w: self }
}
#[doc = "Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular"]
#[inline]
pub fn awd1en(&mut self) -> _AWD1ENW {
_AWD1ENW { w: self }
}
#[doc = "Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels"]
#[inline]
pub fn awd1sgl(&mut self) -> _AWD1SGLW {
_AWD1SGLW { w: self }
}
#[doc = "Bit 21 - ADC group injected contexts queue mode"]
#[inline]
pub fn jqm(&mut self) -> _JQMW {
_JQMW { w: self }
}
#[doc = "Bit 20 - ADC group injected sequencer discontinuous mode"]
#[inline]
pub fn jdiscen(&mut self) -> _JDISCENW {
_JDISCENW { w: self }
}
#[doc = "Bits 17:19 - ADC group regular sequencer discontinuous number of ranks"]
#[inline]
pub fn discnum(&mut self) -> _DISCNUMW {
_DISCNUMW { w: self }
}
#[doc = "Bit 16 - ADC group regular sequencer discontinuous mode"]
#[inline]
pub fn discen(&mut self) -> _DISCENW {
_DISCENW { w: self }
}
#[doc = "Bit 14 - ADC low power auto wait"]
#[inline]
pub fn autdly(&mut self) -> _AUTDLYW {
_AUTDLYW { w: self }
}
#[doc = "Bit 13 - ADC group regular continuous conversion mode"]
#[inline]
pub fn cont(&mut self) -> _CONTW {
_CONTW { w: self }
}
#[doc = "Bit 12 - ADC group regular overrun configuration"]
#[inline]
pub fn ovrmod(&mut self) -> _OVRMODW {
_OVRMODW { w: self }
}
#[doc = "Bits 10:11 - ADC group regular external trigger polarity"]
#[inline]
pub fn exten(&mut self) -> _EXTENW {
_EXTENW { w: self }
}
#[doc = "Bits 5:9 - ADC group regular external trigger source"]
#[inline]
pub fn extsel(&mut self) -> _EXTSELW {
_EXTSELW { w: self }
}
#[doc = "Bits 2:3 - ADC data resolution"]
#[inline]
pub fn res(&mut self) -> _RESW {
_RESW { w: self }
}
#[doc = "Bits 0:1 - ADC DMA transfer enable"]
#[inline]
pub fn dmngt(&mut self) -> _DMNGTW {
_DMNGTW { w: self }
}
}