#[doc = r" Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - FDCAN Core Release Register"]
pub fdcan_crel: FDCAN_CREL,
#[doc = "0x04 - FDCAN Core Release Register"]
pub fdcan_endn: FDCAN_ENDN,
_reserved0: [u8; 4usize],
#[doc = "0x0c - FDCAN Data Bit Timing and Prescaler Register"]
pub fdcan_dbtp: FDCAN_DBTP,
#[doc = "0x10 - FDCAN Test Register"]
pub fdcan_test: FDCAN_TEST,
#[doc = "0x14 - FDCAN RAM Watchdog Register"]
pub fdcan_rwd: FDCAN_RWD,
#[doc = "0x18 - FDCAN CC Control Register"]
pub fdcan_cccr: FDCAN_CCCR,
#[doc = "0x1c - FDCAN Nominal Bit Timing and Prescaler Register"]
pub fdcan_nbtp: FDCAN_NBTP,
#[doc = "0x20 - FDCAN Timestamp Counter Configuration Register"]
pub fdcan_tscc: FDCAN_TSCC,
#[doc = "0x24 - FDCAN Timestamp Counter Value Register"]
pub fdcan_tscv: FDCAN_TSCV,
#[doc = "0x28 - FDCAN Timeout Counter Configuration Register"]
pub fdcan_tocc: FDCAN_TOCC,
#[doc = "0x2c - FDCAN Timeout Counter Value Register"]
pub fdcan_tocv: FDCAN_TOCV,
_reserved1: [u8; 16usize],
#[doc = "0x40 - FDCAN Error Counter Register"]
pub fdcan_ecr: FDCAN_ECR,
#[doc = "0x44 - FDCAN Protocol Status Register"]
pub fdcan_psr: FDCAN_PSR,
#[doc = "0x48 - FDCAN Transmitter Delay Compensation Register"]
pub fdcan_tdcr: FDCAN_TDCR,
_reserved2: [u8; 4usize],
#[doc = "0x50 - FDCAN Interrupt Register"]
pub fdcan_ir: FDCAN_IR,
#[doc = "0x54 - FDCAN Interrupt Enable Register"]
pub fdcan_ie: FDCAN_IE,
#[doc = "0x58 - FDCAN Interrupt Line Select Register"]
pub fdcan_ils: FDCAN_ILS,
#[doc = "0x5c - FDCAN Interrupt Line Enable Register"]
pub fdcan_ile: FDCAN_ILE,
_reserved3: [u8; 32usize],
#[doc = "0x80 - FDCAN Global Filter Configuration Register"]
pub fdcan_gfc: FDCAN_GFC,
#[doc = "0x84 - FDCAN Standard ID Filter Configuration Register"]
pub fdcan_sidfc: FDCAN_SIDFC,
#[doc = "0x88 - FDCAN Extended ID Filter Configuration Register"]
pub fdcan_xidfc: FDCAN_XIDFC,
_reserved4: [u8; 4usize],
#[doc = "0x90 - FDCAN Extended ID and Mask Register"]
pub fdcan_xidam: FDCAN_XIDAM,
#[doc = "0x94 - FDCAN High Priority Message Status Register"]
pub fdcan_hpms: FDCAN_HPMS,
#[doc = "0x98 - FDCAN New Data 1 Register"]
pub fdcan_ndat1: FDCAN_NDAT1,
#[doc = "0x9c - FDCAN New Data 2 Register"]
pub fdcan_ndat2: FDCAN_NDAT2,
#[doc = "0xa0 - FDCAN Rx FIFO 0 Configuration Register"]
pub fdcan_rxf0c: FDCAN_RXF0C,
#[doc = "0xa4 - FDCAN Rx FIFO 0 Status Register"]
pub fdcan_rxf0s: FDCAN_RXF0S,
#[doc = "0xa8 - CAN Rx FIFO 0 Acknowledge Register"]
pub fdcan_rxf0a: FDCAN_RXF0A,
#[doc = "0xac - FDCAN Rx Buffer Configuration Register"]
pub fdcan_rxbc: FDCAN_RXBC,
#[doc = "0xb0 - FDCAN Rx FIFO 1 Configuration Register"]
pub fdcan_rxf1c: FDCAN_RXF1C,
#[doc = "0xb4 - FDCAN Rx FIFO 1 Status Register"]
pub fdcan_rxf1s: FDCAN_RXF1S,
#[doc = "0xb8 - FDCAN Rx FIFO 1 Acknowledge Register"]
pub fdcan_rxf1a: FDCAN_RXF1A,
#[doc = "0xbc - FDCAN Rx Buffer Element Size Configuration Register"]
pub fdcan_rxesc: FDCAN_RXESC,
#[doc = "0xc0 - FDCAN Tx Buffer Configuration Register"]
pub fdcan_txbc: FDCAN_TXBC,
#[doc = "0xc4 - FDCAN Tx FIFO/Queue Status Register"]
pub fdcan_txfqs: FDCAN_TXFQS,
#[doc = "0xc8 - FDCAN Tx Buffer Element Size Configuration Register"]
pub fdcan_txesc: FDCAN_TXESC,
#[doc = "0xcc - FDCAN Tx Buffer Request Pending Register"]
pub fdcan_txbrp: FDCAN_TXBRP,
#[doc = "0xd0 - FDCAN Tx Buffer Add Request Register"]
pub fdcan_txbar: FDCAN_TXBAR,
#[doc = "0xd4 - FDCAN Tx Buffer Cancellation Request Register"]
pub fdcan_txbcr: FDCAN_TXBCR,
#[doc = "0xd8 - FDCAN Tx Buffer Transmission Occurred Register"]
pub fdcan_txbto: FDCAN_TXBTO,
#[doc = "0xdc - FDCAN Tx Buffer Cancellation Finished Register"]
pub fdcan_txbcf: FDCAN_TXBCF,
#[doc = "0xe0 - FDCAN Tx Buffer Transmission Interrupt Enable Register"]
pub fdcan_txbtie: FDCAN_TXBTIE,
#[doc = "0xe4 - FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register"]
pub fdcan_txbcie: FDCAN_TXBCIE,
_reserved5: [u8; 8usize],
#[doc = "0xf0 - FDCAN Tx Event FIFO Configuration Register"]
pub fdcan_txefc: FDCAN_TXEFC,
#[doc = "0xf4 - FDCAN Tx Event FIFO Status Register"]
pub fdcan_txefs: FDCAN_TXEFS,
#[doc = "0xf8 - FDCAN Tx Event FIFO Acknowledge Register"]
pub fdcan_txefa: FDCAN_TXEFA,
_reserved6: [u8; 4usize],
#[doc = "0x100 - FDCAN TT Trigger Memory Configuration Register"]
pub fdcan_tttmc: FDCAN_TTTMC,
#[doc = "0x104 - FDCAN TT Reference Message Configuration Register"]
pub fdcan_ttrmc: FDCAN_TTRMC,
#[doc = "0x108 - FDCAN TT Operation Configuration Register"]
pub fdcan_ttocf: FDCAN_TTOCF,
#[doc = "0x10c - FDCAN TT Matrix Limits Register"]
pub fdcan_ttmlm: FDCAN_TTMLM,
#[doc = "0x110 - FDCAN TUR Configuration Register"]
pub fdcan_turcf: FDCAN_TURCF,
#[doc = "0x114 - FDCAN TT Operation Control Register"]
pub fdcan_ttocn: FDCAN_TTOCN,
#[doc = "0x118 - FDCAN TT Global Time Preset Register"]
pub can_ttgtp: CAN_TTGTP,
#[doc = "0x11c - FDCAN TT Time Mark Register"]
pub fdcan_tttmk: FDCAN_TTTMK,
#[doc = "0x120 - FDCAN TT Interrupt Register"]
pub fdcan_ttir: FDCAN_TTIR,
#[doc = "0x124 - FDCAN TT Interrupt Enable Register"]
pub fdcan_ttie: FDCAN_TTIE,
#[doc = "0x128 - FDCAN TT Interrupt Line Select Register"]
pub fdcan_ttils: FDCAN_TTILS,
#[doc = "0x12c - FDCAN TT Operation Status Register"]
pub fdcan_ttost: FDCAN_TTOST,
#[doc = "0x130 - FDCAN TUR Numerator Actual Register"]
pub fdcan_turna: FDCAN_TURNA,
#[doc = "0x134 - FDCAN TT Local and Global Time Register"]
pub fdcan_ttlgt: FDCAN_TTLGT,
#[doc = "0x138 - FDCAN TT Cycle Time and Count Register"]
pub fdcan_ttctc: FDCAN_TTCTC,
#[doc = "0x13c - FDCAN TT Capture Time Register"]
pub fdcan_ttcpt: FDCAN_TTCPT,
#[doc = "0x140 - FDCAN TT Cycle Sync Mark Register"]
pub fdcan_ttcsm: FDCAN_TTCSM,
_reserved7: [u8; 444usize],
#[doc = "0x300 - FDCAN TT Trigger Select Register"]
pub fdcan_ttts: FDCAN_TTTS,
}
#[doc = "FDCAN Core Release Register"]
pub struct FDCAN_CREL {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Core Release Register"]
pub mod fdcan_crel;
#[doc = "FDCAN Core Release Register"]
pub struct FDCAN_ENDN {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Core Release Register"]
pub mod fdcan_endn;
#[doc = "FDCAN Data Bit Timing and Prescaler Register"]
pub struct FDCAN_DBTP {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Data Bit Timing and Prescaler Register"]
pub mod fdcan_dbtp;
#[doc = "FDCAN Test Register"]
pub struct FDCAN_TEST {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Test Register"]
pub mod fdcan_test;
#[doc = "FDCAN RAM Watchdog Register"]
pub struct FDCAN_RWD {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN RAM Watchdog Register"]
pub mod fdcan_rwd;
#[doc = "FDCAN CC Control Register"]
pub struct FDCAN_CCCR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN CC Control Register"]
pub mod fdcan_cccr;
#[doc = "FDCAN Nominal Bit Timing and Prescaler Register"]
pub struct FDCAN_NBTP {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Nominal Bit Timing and Prescaler Register"]
pub mod fdcan_nbtp;
#[doc = "FDCAN Timestamp Counter Configuration Register"]
pub struct FDCAN_TSCC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timestamp Counter Configuration Register"]
pub mod fdcan_tscc;
#[doc = "FDCAN Timestamp Counter Value Register"]
pub struct FDCAN_TSCV {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timestamp Counter Value Register"]
pub mod fdcan_tscv;
#[doc = "FDCAN Timeout Counter Configuration Register"]
pub struct FDCAN_TOCC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timeout Counter Configuration Register"]
pub mod fdcan_tocc;
#[doc = "FDCAN Timeout Counter Value Register"]
pub struct FDCAN_TOCV {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timeout Counter Value Register"]
pub mod fdcan_tocv;
#[doc = "FDCAN Error Counter Register"]
pub struct FDCAN_ECR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Error Counter Register"]
pub mod fdcan_ecr;
#[doc = "FDCAN Protocol Status Register"]
pub struct FDCAN_PSR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Protocol Status Register"]
pub mod fdcan_psr;
#[doc = "FDCAN Transmitter Delay Compensation Register"]
pub struct FDCAN_TDCR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Transmitter Delay Compensation Register"]
pub mod fdcan_tdcr;
#[doc = "FDCAN Interrupt Register"]
pub struct FDCAN_IR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Register"]
pub mod fdcan_ir;
#[doc = "FDCAN Interrupt Enable Register"]
pub struct FDCAN_IE {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Enable Register"]
pub mod fdcan_ie;
#[doc = "FDCAN Interrupt Line Select Register"]
pub struct FDCAN_ILS {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Line Select Register"]
pub mod fdcan_ils;
#[doc = "FDCAN Interrupt Line Enable Register"]
pub struct FDCAN_ILE {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Line Enable Register"]
pub mod fdcan_ile;
#[doc = "FDCAN Global Filter Configuration Register"]
pub struct FDCAN_GFC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Global Filter Configuration Register"]
pub mod fdcan_gfc;
#[doc = "FDCAN Standard ID Filter Configuration Register"]
pub struct FDCAN_SIDFC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Standard ID Filter Configuration Register"]
pub mod fdcan_sidfc;
#[doc = "FDCAN Extended ID Filter Configuration Register"]
pub struct FDCAN_XIDFC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Extended ID Filter Configuration Register"]
pub mod fdcan_xidfc;
#[doc = "FDCAN Extended ID and Mask Register"]
pub struct FDCAN_XIDAM {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Extended ID and Mask Register"]
pub mod fdcan_xidam;
#[doc = "FDCAN High Priority Message Status Register"]
pub struct FDCAN_HPMS {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN High Priority Message Status Register"]
pub mod fdcan_hpms;
#[doc = "FDCAN New Data 1 Register"]
pub struct FDCAN_NDAT1 {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN New Data 1 Register"]
pub mod fdcan_ndat1;
#[doc = "FDCAN New Data 2 Register"]
pub struct FDCAN_NDAT2 {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN New Data 2 Register"]
pub mod fdcan_ndat2;
#[doc = "FDCAN Rx FIFO 0 Configuration Register"]
pub struct FDCAN_RXF0C {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 0 Configuration Register"]
pub mod fdcan_rxf0c;
#[doc = "FDCAN Rx FIFO 0 Status Register"]
pub struct FDCAN_RXF0S {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 0 Status Register"]
pub mod fdcan_rxf0s;
#[doc = "CAN Rx FIFO 0 Acknowledge Register"]
pub struct FDCAN_RXF0A {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "CAN Rx FIFO 0 Acknowledge Register"]
pub mod fdcan_rxf0a;
#[doc = "FDCAN Rx Buffer Configuration Register"]
pub struct FDCAN_RXBC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx Buffer Configuration Register"]
pub mod fdcan_rxbc;
#[doc = "FDCAN Rx FIFO 1 Configuration Register"]
pub struct FDCAN_RXF1C {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 1 Configuration Register"]
pub mod fdcan_rxf1c;
#[doc = "FDCAN Rx FIFO 1 Status Register"]
pub struct FDCAN_RXF1S {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 1 Status Register"]
pub mod fdcan_rxf1s;
#[doc = "FDCAN Rx FIFO 1 Acknowledge Register"]
pub struct FDCAN_RXF1A {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 1 Acknowledge Register"]
pub mod fdcan_rxf1a;
#[doc = "FDCAN Rx Buffer Element Size Configuration Register"]
pub struct FDCAN_RXESC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx Buffer Element Size Configuration Register"]
pub mod fdcan_rxesc;
#[doc = "FDCAN Tx Buffer Configuration Register"]
pub struct FDCAN_TXBC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Configuration Register"]
pub mod fdcan_txbc;
#[doc = "FDCAN Tx FIFO/Queue Status Register"]
pub struct FDCAN_TXFQS {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx FIFO/Queue Status Register"]
pub mod fdcan_txfqs;
#[doc = "FDCAN Tx Buffer Element Size Configuration Register"]
pub struct FDCAN_TXESC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Element Size Configuration Register"]
pub mod fdcan_txesc;
#[doc = "FDCAN Tx Buffer Request Pending Register"]
pub struct FDCAN_TXBRP {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Request Pending Register"]
pub mod fdcan_txbrp;
#[doc = "FDCAN Tx Buffer Add Request Register"]
pub struct FDCAN_TXBAR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Add Request Register"]
pub mod fdcan_txbar;
#[doc = "FDCAN Tx Buffer Cancellation Request Register"]
pub struct FDCAN_TXBCR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Cancellation Request Register"]
pub mod fdcan_txbcr;
#[doc = "FDCAN Tx Buffer Transmission Occurred Register"]
pub struct FDCAN_TXBTO {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Transmission Occurred Register"]
pub mod fdcan_txbto;
#[doc = "FDCAN Tx Buffer Cancellation Finished Register"]
pub struct FDCAN_TXBCF {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Cancellation Finished Register"]
pub mod fdcan_txbcf;
#[doc = "FDCAN Tx Buffer Transmission Interrupt Enable Register"]
pub struct FDCAN_TXBTIE {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Transmission Interrupt Enable Register"]
pub mod fdcan_txbtie;
#[doc = "FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register"]
pub struct FDCAN_TXBCIE {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register"]
pub mod fdcan_txbcie;
#[doc = "FDCAN Tx Event FIFO Configuration Register"]
pub struct FDCAN_TXEFC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Event FIFO Configuration Register"]
pub mod fdcan_txefc;
#[doc = "FDCAN Tx Event FIFO Status Register"]
pub struct FDCAN_TXEFS {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Event FIFO Status Register"]
pub mod fdcan_txefs;
#[doc = "FDCAN Tx Event FIFO Acknowledge Register"]
pub struct FDCAN_TXEFA {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Event FIFO Acknowledge Register"]
pub mod fdcan_txefa;
#[doc = "FDCAN TT Trigger Memory Configuration Register"]
pub struct FDCAN_TTTMC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Trigger Memory Configuration Register"]
pub mod fdcan_tttmc;
#[doc = "FDCAN TT Reference Message Configuration Register"]
pub struct FDCAN_TTRMC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Reference Message Configuration Register"]
pub mod fdcan_ttrmc;
#[doc = "FDCAN TT Operation Configuration Register"]
pub struct FDCAN_TTOCF {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Operation Configuration Register"]
pub mod fdcan_ttocf;
#[doc = "FDCAN TT Matrix Limits Register"]
pub struct FDCAN_TTMLM {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Matrix Limits Register"]
pub mod fdcan_ttmlm;
#[doc = "FDCAN TUR Configuration Register"]
pub struct FDCAN_TURCF {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TUR Configuration Register"]
pub mod fdcan_turcf;
#[doc = "FDCAN TT Operation Control Register"]
pub struct FDCAN_TTOCN {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Operation Control Register"]
pub mod fdcan_ttocn;
#[doc = "FDCAN TT Global Time Preset Register"]
pub struct CAN_TTGTP {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Global Time Preset Register"]
pub mod can_ttgtp;
#[doc = "FDCAN TT Time Mark Register"]
pub struct FDCAN_TTTMK {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Time Mark Register"]
pub mod fdcan_tttmk;
#[doc = "FDCAN TT Interrupt Register"]
pub struct FDCAN_TTIR {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Interrupt Register"]
pub mod fdcan_ttir;
#[doc = "FDCAN TT Interrupt Enable Register"]
pub struct FDCAN_TTIE {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Interrupt Enable Register"]
pub mod fdcan_ttie;
#[doc = "FDCAN TT Interrupt Line Select Register"]
pub struct FDCAN_TTILS {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Interrupt Line Select Register"]
pub mod fdcan_ttils;
#[doc = "FDCAN TT Operation Status Register"]
pub struct FDCAN_TTOST {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Operation Status Register"]
pub mod fdcan_ttost;
#[doc = "FDCAN TUR Numerator Actual Register"]
pub struct FDCAN_TURNA {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TUR Numerator Actual Register"]
pub mod fdcan_turna;
#[doc = "FDCAN TT Local and Global Time Register"]
pub struct FDCAN_TTLGT {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Local and Global Time Register"]
pub mod fdcan_ttlgt;
#[doc = "FDCAN TT Cycle Time and Count Register"]
pub struct FDCAN_TTCTC {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Cycle Time and Count Register"]
pub mod fdcan_ttctc;
#[doc = "FDCAN TT Capture Time Register"]
pub struct FDCAN_TTCPT {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Capture Time Register"]
pub mod fdcan_ttcpt;
#[doc = "FDCAN TT Cycle Sync Mark Register"]
pub struct FDCAN_TTCSM {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Cycle Sync Mark Register"]
pub mod fdcan_ttcsm;
#[doc = "FDCAN TT Trigger Select Register"]
pub struct FDCAN_TTTS {
register: ::vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Trigger Select Register"]
pub mod fdcan_ttts;