stm32h5/stm32h533/i2c1/
cr1.rs

1///Register `CR1` reader
2pub type R = crate::R<CR1rs>;
3///Register `CR1` writer
4pub type W = crate::W<CR1rs>;
5/**Peripheral enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum PE {
11    ///0: Peripheral disabled
12    Disabled = 0,
13    ///1: Peripheral enabled
14    Enabled = 1,
15}
16impl From<PE> for bool {
17    #[inline(always)]
18    fn from(variant: PE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `PE` reader - Peripheral enable
23pub type PE_R = crate::BitReader<PE>;
24impl PE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> PE {
28        match self.bits {
29            false => PE::Disabled,
30            true => PE::Enabled,
31        }
32    }
33    ///Peripheral disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == PE::Disabled
37    }
38    ///Peripheral enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == PE::Enabled
42    }
43}
44///Field `PE` writer - Peripheral enable
45pub type PE_W<'a, REG> = crate::BitWriter<'a, REG, PE>;
46impl<'a, REG> PE_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Peripheral disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(PE::Disabled)
54    }
55    ///Peripheral enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(PE::Enabled)
59    }
60}
61/**TX interrupt enable
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum TXIE {
67    ///0: Transmit (TXIS) interrupt disabled
68    Disabled = 0,
69    ///1: Transmit (TXIS) interrupt enabled
70    Enabled = 1,
71}
72impl From<TXIE> for bool {
73    #[inline(always)]
74    fn from(variant: TXIE) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `TXIE` reader - TX interrupt enable
79pub type TXIE_R = crate::BitReader<TXIE>;
80impl TXIE_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> TXIE {
84        match self.bits {
85            false => TXIE::Disabled,
86            true => TXIE::Enabled,
87        }
88    }
89    ///Transmit (TXIS) interrupt disabled
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == TXIE::Disabled
93    }
94    ///Transmit (TXIS) interrupt enabled
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == TXIE::Enabled
98    }
99}
100///Field `TXIE` writer - TX interrupt enable
101pub type TXIE_W<'a, REG> = crate::BitWriter<'a, REG, TXIE>;
102impl<'a, REG> TXIE_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///Transmit (TXIS) interrupt disabled
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(TXIE::Disabled)
110    }
111    ///Transmit (TXIS) interrupt enabled
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(TXIE::Enabled)
115    }
116}
117/**RX interrupt enable
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum RXIE {
123    ///0: Receive (RXNE) interrupt disabled
124    Disabled = 0,
125    ///1: Receive (RXNE) interrupt enabled
126    Enabled = 1,
127}
128impl From<RXIE> for bool {
129    #[inline(always)]
130    fn from(variant: RXIE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `RXIE` reader - RX interrupt enable
135pub type RXIE_R = crate::BitReader<RXIE>;
136impl RXIE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> RXIE {
140        match self.bits {
141            false => RXIE::Disabled,
142            true => RXIE::Enabled,
143        }
144    }
145    ///Receive (RXNE) interrupt disabled
146    #[inline(always)]
147    pub fn is_disabled(&self) -> bool {
148        *self == RXIE::Disabled
149    }
150    ///Receive (RXNE) interrupt enabled
151    #[inline(always)]
152    pub fn is_enabled(&self) -> bool {
153        *self == RXIE::Enabled
154    }
155}
156///Field `RXIE` writer - RX interrupt enable
157pub type RXIE_W<'a, REG> = crate::BitWriter<'a, REG, RXIE>;
158impl<'a, REG> RXIE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///Receive (RXNE) interrupt disabled
163    #[inline(always)]
164    pub fn disabled(self) -> &'a mut crate::W<REG> {
165        self.variant(RXIE::Disabled)
166    }
167    ///Receive (RXNE) interrupt enabled
168    #[inline(always)]
169    pub fn enabled(self) -> &'a mut crate::W<REG> {
170        self.variant(RXIE::Enabled)
171    }
172}
173/**Address match interrupt enable (slave only)
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum ADDRIE {
179    ///0: Address match (ADDR) interrupts disabled
180    Disabled = 0,
181    ///1: Address match (ADDR) interrupts enabled
182    Enabled = 1,
183}
184impl From<ADDRIE> for bool {
185    #[inline(always)]
186    fn from(variant: ADDRIE) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `ADDRIE` reader - Address match interrupt enable (slave only)
191pub type ADDRIE_R = crate::BitReader<ADDRIE>;
192impl ADDRIE_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> ADDRIE {
196        match self.bits {
197            false => ADDRIE::Disabled,
198            true => ADDRIE::Enabled,
199        }
200    }
201    ///Address match (ADDR) interrupts disabled
202    #[inline(always)]
203    pub fn is_disabled(&self) -> bool {
204        *self == ADDRIE::Disabled
205    }
206    ///Address match (ADDR) interrupts enabled
207    #[inline(always)]
208    pub fn is_enabled(&self) -> bool {
209        *self == ADDRIE::Enabled
210    }
211}
212///Field `ADDRIE` writer - Address match interrupt enable (slave only)
213pub type ADDRIE_W<'a, REG> = crate::BitWriter<'a, REG, ADDRIE>;
214impl<'a, REG> ADDRIE_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///Address match (ADDR) interrupts disabled
219    #[inline(always)]
220    pub fn disabled(self) -> &'a mut crate::W<REG> {
221        self.variant(ADDRIE::Disabled)
222    }
223    ///Address match (ADDR) interrupts enabled
224    #[inline(always)]
225    pub fn enabled(self) -> &'a mut crate::W<REG> {
226        self.variant(ADDRIE::Enabled)
227    }
228}
229/**Not acknowledge received interrupt enable
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum NACKIE {
235    ///0: Not acknowledge (NACKF) received interrupts disabled
236    Disabled = 0,
237    ///1: Not acknowledge (NACKF) received interrupts enabled
238    Enabled = 1,
239}
240impl From<NACKIE> for bool {
241    #[inline(always)]
242    fn from(variant: NACKIE) -> Self {
243        variant as u8 != 0
244    }
245}
246///Field `NACKIE` reader - Not acknowledge received interrupt enable
247pub type NACKIE_R = crate::BitReader<NACKIE>;
248impl NACKIE_R {
249    ///Get enumerated values variant
250    #[inline(always)]
251    pub const fn variant(&self) -> NACKIE {
252        match self.bits {
253            false => NACKIE::Disabled,
254            true => NACKIE::Enabled,
255        }
256    }
257    ///Not acknowledge (NACKF) received interrupts disabled
258    #[inline(always)]
259    pub fn is_disabled(&self) -> bool {
260        *self == NACKIE::Disabled
261    }
262    ///Not acknowledge (NACKF) received interrupts enabled
263    #[inline(always)]
264    pub fn is_enabled(&self) -> bool {
265        *self == NACKIE::Enabled
266    }
267}
268///Field `NACKIE` writer - Not acknowledge received interrupt enable
269pub type NACKIE_W<'a, REG> = crate::BitWriter<'a, REG, NACKIE>;
270impl<'a, REG> NACKIE_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    ///Not acknowledge (NACKF) received interrupts disabled
275    #[inline(always)]
276    pub fn disabled(self) -> &'a mut crate::W<REG> {
277        self.variant(NACKIE::Disabled)
278    }
279    ///Not acknowledge (NACKF) received interrupts enabled
280    #[inline(always)]
281    pub fn enabled(self) -> &'a mut crate::W<REG> {
282        self.variant(NACKIE::Enabled)
283    }
284}
285/**Stop detection interrupt enable
286
287Value on reset: 0*/
288#[cfg_attr(feature = "defmt", derive(defmt::Format))]
289#[derive(Clone, Copy, Debug, PartialEq, Eq)]
290pub enum STOPIE {
291    ///0: Stop detection (STOPF) interrupt disabled
292    Disabled = 0,
293    ///1: Stop detection (STOPF) interrupt enabled
294    Enabled = 1,
295}
296impl From<STOPIE> for bool {
297    #[inline(always)]
298    fn from(variant: STOPIE) -> Self {
299        variant as u8 != 0
300    }
301}
302///Field `STOPIE` reader - Stop detection interrupt enable
303pub type STOPIE_R = crate::BitReader<STOPIE>;
304impl STOPIE_R {
305    ///Get enumerated values variant
306    #[inline(always)]
307    pub const fn variant(&self) -> STOPIE {
308        match self.bits {
309            false => STOPIE::Disabled,
310            true => STOPIE::Enabled,
311        }
312    }
313    ///Stop detection (STOPF) interrupt disabled
314    #[inline(always)]
315    pub fn is_disabled(&self) -> bool {
316        *self == STOPIE::Disabled
317    }
318    ///Stop detection (STOPF) interrupt enabled
319    #[inline(always)]
320    pub fn is_enabled(&self) -> bool {
321        *self == STOPIE::Enabled
322    }
323}
324///Field `STOPIE` writer - Stop detection interrupt enable
325pub type STOPIE_W<'a, REG> = crate::BitWriter<'a, REG, STOPIE>;
326impl<'a, REG> STOPIE_W<'a, REG>
327where
328    REG: crate::Writable + crate::RegisterSpec,
329{
330    ///Stop detection (STOPF) interrupt disabled
331    #[inline(always)]
332    pub fn disabled(self) -> &'a mut crate::W<REG> {
333        self.variant(STOPIE::Disabled)
334    }
335    ///Stop detection (STOPF) interrupt enabled
336    #[inline(always)]
337    pub fn enabled(self) -> &'a mut crate::W<REG> {
338        self.variant(STOPIE::Enabled)
339    }
340}
341/**Transfer complete interrupt enable
342
343Value on reset: 0*/
344#[cfg_attr(feature = "defmt", derive(defmt::Format))]
345#[derive(Clone, Copy, Debug, PartialEq, Eq)]
346pub enum TCIE {
347    ///0: Transfer Complete interrupt disabled
348    Disabled = 0,
349    ///1: Transfer Complete interrupt enabled
350    Enabled = 1,
351}
352impl From<TCIE> for bool {
353    #[inline(always)]
354    fn from(variant: TCIE) -> Self {
355        variant as u8 != 0
356    }
357}
358///Field `TCIE` reader - Transfer complete interrupt enable
359pub type TCIE_R = crate::BitReader<TCIE>;
360impl TCIE_R {
361    ///Get enumerated values variant
362    #[inline(always)]
363    pub const fn variant(&self) -> TCIE {
364        match self.bits {
365            false => TCIE::Disabled,
366            true => TCIE::Enabled,
367        }
368    }
369    ///Transfer Complete interrupt disabled
370    #[inline(always)]
371    pub fn is_disabled(&self) -> bool {
372        *self == TCIE::Disabled
373    }
374    ///Transfer Complete interrupt enabled
375    #[inline(always)]
376    pub fn is_enabled(&self) -> bool {
377        *self == TCIE::Enabled
378    }
379}
380///Field `TCIE` writer - Transfer complete interrupt enable
381pub type TCIE_W<'a, REG> = crate::BitWriter<'a, REG, TCIE>;
382impl<'a, REG> TCIE_W<'a, REG>
383where
384    REG: crate::Writable + crate::RegisterSpec,
385{
386    ///Transfer Complete interrupt disabled
387    #[inline(always)]
388    pub fn disabled(self) -> &'a mut crate::W<REG> {
389        self.variant(TCIE::Disabled)
390    }
391    ///Transfer Complete interrupt enabled
392    #[inline(always)]
393    pub fn enabled(self) -> &'a mut crate::W<REG> {
394        self.variant(TCIE::Enabled)
395    }
396}
397/**Error interrupts enable
398
399Value on reset: 0*/
400#[cfg_attr(feature = "defmt", derive(defmt::Format))]
401#[derive(Clone, Copy, Debug, PartialEq, Eq)]
402pub enum ERRIE {
403    ///0: Error detection interrupts disabled
404    Disabled = 0,
405    ///1: Error detection interrupts enabled
406    Enabled = 1,
407}
408impl From<ERRIE> for bool {
409    #[inline(always)]
410    fn from(variant: ERRIE) -> Self {
411        variant as u8 != 0
412    }
413}
414///Field `ERRIE` reader - Error interrupts enable
415pub type ERRIE_R = crate::BitReader<ERRIE>;
416impl ERRIE_R {
417    ///Get enumerated values variant
418    #[inline(always)]
419    pub const fn variant(&self) -> ERRIE {
420        match self.bits {
421            false => ERRIE::Disabled,
422            true => ERRIE::Enabled,
423        }
424    }
425    ///Error detection interrupts disabled
426    #[inline(always)]
427    pub fn is_disabled(&self) -> bool {
428        *self == ERRIE::Disabled
429    }
430    ///Error detection interrupts enabled
431    #[inline(always)]
432    pub fn is_enabled(&self) -> bool {
433        *self == ERRIE::Enabled
434    }
435}
436///Field `ERRIE` writer - Error interrupts enable
437pub type ERRIE_W<'a, REG> = crate::BitWriter<'a, REG, ERRIE>;
438impl<'a, REG> ERRIE_W<'a, REG>
439where
440    REG: crate::Writable + crate::RegisterSpec,
441{
442    ///Error detection interrupts disabled
443    #[inline(always)]
444    pub fn disabled(self) -> &'a mut crate::W<REG> {
445        self.variant(ERRIE::Disabled)
446    }
447    ///Error detection interrupts enabled
448    #[inline(always)]
449    pub fn enabled(self) -> &'a mut crate::W<REG> {
450        self.variant(ERRIE::Enabled)
451    }
452}
453/**Digital noise filter
454
455Value on reset: 0*/
456#[cfg_attr(feature = "defmt", derive(defmt::Format))]
457#[derive(Clone, Copy, Debug, PartialEq, Eq)]
458#[repr(u8)]
459pub enum DNF {
460    ///0: Digital filter disabled
461    NoFilter = 0,
462    ///1: Digital filter enabled and filtering capability up to 1 tI2CCLK
463    Filter1 = 1,
464    ///2: Digital filter enabled and filtering capability up to 2 tI2CCLK
465    Filter2 = 2,
466    ///3: Digital filter enabled and filtering capability up to 3 tI2CCLK
467    Filter3 = 3,
468    ///4: Digital filter enabled and filtering capability up to 4 tI2CCLK
469    Filter4 = 4,
470    ///5: Digital filter enabled and filtering capability up to 5 tI2CCLK
471    Filter5 = 5,
472    ///6: Digital filter enabled and filtering capability up to 6 tI2CCLK
473    Filter6 = 6,
474    ///7: Digital filter enabled and filtering capability up to 7 tI2CCLK
475    Filter7 = 7,
476    ///8: Digital filter enabled and filtering capability up to 8 tI2CCLK
477    Filter8 = 8,
478    ///9: Digital filter enabled and filtering capability up to 9 tI2CCLK
479    Filter9 = 9,
480    ///10: Digital filter enabled and filtering capability up to 10 tI2CCLK
481    Filter10 = 10,
482    ///11: Digital filter enabled and filtering capability up to 11 tI2CCLK
483    Filter11 = 11,
484    ///12: Digital filter enabled and filtering capability up to 12 tI2CCLK
485    Filter12 = 12,
486    ///13: Digital filter enabled and filtering capability up to 13 tI2CCLK
487    Filter13 = 13,
488    ///14: Digital filter enabled and filtering capability up to 14 tI2CCLK
489    Filter14 = 14,
490    ///15: Digital filter enabled and filtering capability up to 15 tI2CCLK
491    Filter15 = 15,
492}
493impl From<DNF> for u8 {
494    #[inline(always)]
495    fn from(variant: DNF) -> Self {
496        variant as _
497    }
498}
499impl crate::FieldSpec for DNF {
500    type Ux = u8;
501}
502impl crate::IsEnum for DNF {}
503///Field `DNF` reader - Digital noise filter
504pub type DNF_R = crate::FieldReader<DNF>;
505impl DNF_R {
506    ///Get enumerated values variant
507    #[inline(always)]
508    pub const fn variant(&self) -> DNF {
509        match self.bits {
510            0 => DNF::NoFilter,
511            1 => DNF::Filter1,
512            2 => DNF::Filter2,
513            3 => DNF::Filter3,
514            4 => DNF::Filter4,
515            5 => DNF::Filter5,
516            6 => DNF::Filter6,
517            7 => DNF::Filter7,
518            8 => DNF::Filter8,
519            9 => DNF::Filter9,
520            10 => DNF::Filter10,
521            11 => DNF::Filter11,
522            12 => DNF::Filter12,
523            13 => DNF::Filter13,
524            14 => DNF::Filter14,
525            15 => DNF::Filter15,
526            _ => unreachable!(),
527        }
528    }
529    ///Digital filter disabled
530    #[inline(always)]
531    pub fn is_no_filter(&self) -> bool {
532        *self == DNF::NoFilter
533    }
534    ///Digital filter enabled and filtering capability up to 1 tI2CCLK
535    #[inline(always)]
536    pub fn is_filter1(&self) -> bool {
537        *self == DNF::Filter1
538    }
539    ///Digital filter enabled and filtering capability up to 2 tI2CCLK
540    #[inline(always)]
541    pub fn is_filter2(&self) -> bool {
542        *self == DNF::Filter2
543    }
544    ///Digital filter enabled and filtering capability up to 3 tI2CCLK
545    #[inline(always)]
546    pub fn is_filter3(&self) -> bool {
547        *self == DNF::Filter3
548    }
549    ///Digital filter enabled and filtering capability up to 4 tI2CCLK
550    #[inline(always)]
551    pub fn is_filter4(&self) -> bool {
552        *self == DNF::Filter4
553    }
554    ///Digital filter enabled and filtering capability up to 5 tI2CCLK
555    #[inline(always)]
556    pub fn is_filter5(&self) -> bool {
557        *self == DNF::Filter5
558    }
559    ///Digital filter enabled and filtering capability up to 6 tI2CCLK
560    #[inline(always)]
561    pub fn is_filter6(&self) -> bool {
562        *self == DNF::Filter6
563    }
564    ///Digital filter enabled and filtering capability up to 7 tI2CCLK
565    #[inline(always)]
566    pub fn is_filter7(&self) -> bool {
567        *self == DNF::Filter7
568    }
569    ///Digital filter enabled and filtering capability up to 8 tI2CCLK
570    #[inline(always)]
571    pub fn is_filter8(&self) -> bool {
572        *self == DNF::Filter8
573    }
574    ///Digital filter enabled and filtering capability up to 9 tI2CCLK
575    #[inline(always)]
576    pub fn is_filter9(&self) -> bool {
577        *self == DNF::Filter9
578    }
579    ///Digital filter enabled and filtering capability up to 10 tI2CCLK
580    #[inline(always)]
581    pub fn is_filter10(&self) -> bool {
582        *self == DNF::Filter10
583    }
584    ///Digital filter enabled and filtering capability up to 11 tI2CCLK
585    #[inline(always)]
586    pub fn is_filter11(&self) -> bool {
587        *self == DNF::Filter11
588    }
589    ///Digital filter enabled and filtering capability up to 12 tI2CCLK
590    #[inline(always)]
591    pub fn is_filter12(&self) -> bool {
592        *self == DNF::Filter12
593    }
594    ///Digital filter enabled and filtering capability up to 13 tI2CCLK
595    #[inline(always)]
596    pub fn is_filter13(&self) -> bool {
597        *self == DNF::Filter13
598    }
599    ///Digital filter enabled and filtering capability up to 14 tI2CCLK
600    #[inline(always)]
601    pub fn is_filter14(&self) -> bool {
602        *self == DNF::Filter14
603    }
604    ///Digital filter enabled and filtering capability up to 15 tI2CCLK
605    #[inline(always)]
606    pub fn is_filter15(&self) -> bool {
607        *self == DNF::Filter15
608    }
609}
610///Field `DNF` writer - Digital noise filter
611pub type DNF_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DNF, crate::Safe>;
612impl<'a, REG> DNF_W<'a, REG>
613where
614    REG: crate::Writable + crate::RegisterSpec,
615    REG::Ux: From<u8>,
616{
617    ///Digital filter disabled
618    #[inline(always)]
619    pub fn no_filter(self) -> &'a mut crate::W<REG> {
620        self.variant(DNF::NoFilter)
621    }
622    ///Digital filter enabled and filtering capability up to 1 tI2CCLK
623    #[inline(always)]
624    pub fn filter1(self) -> &'a mut crate::W<REG> {
625        self.variant(DNF::Filter1)
626    }
627    ///Digital filter enabled and filtering capability up to 2 tI2CCLK
628    #[inline(always)]
629    pub fn filter2(self) -> &'a mut crate::W<REG> {
630        self.variant(DNF::Filter2)
631    }
632    ///Digital filter enabled and filtering capability up to 3 tI2CCLK
633    #[inline(always)]
634    pub fn filter3(self) -> &'a mut crate::W<REG> {
635        self.variant(DNF::Filter3)
636    }
637    ///Digital filter enabled and filtering capability up to 4 tI2CCLK
638    #[inline(always)]
639    pub fn filter4(self) -> &'a mut crate::W<REG> {
640        self.variant(DNF::Filter4)
641    }
642    ///Digital filter enabled and filtering capability up to 5 tI2CCLK
643    #[inline(always)]
644    pub fn filter5(self) -> &'a mut crate::W<REG> {
645        self.variant(DNF::Filter5)
646    }
647    ///Digital filter enabled and filtering capability up to 6 tI2CCLK
648    #[inline(always)]
649    pub fn filter6(self) -> &'a mut crate::W<REG> {
650        self.variant(DNF::Filter6)
651    }
652    ///Digital filter enabled and filtering capability up to 7 tI2CCLK
653    #[inline(always)]
654    pub fn filter7(self) -> &'a mut crate::W<REG> {
655        self.variant(DNF::Filter7)
656    }
657    ///Digital filter enabled and filtering capability up to 8 tI2CCLK
658    #[inline(always)]
659    pub fn filter8(self) -> &'a mut crate::W<REG> {
660        self.variant(DNF::Filter8)
661    }
662    ///Digital filter enabled and filtering capability up to 9 tI2CCLK
663    #[inline(always)]
664    pub fn filter9(self) -> &'a mut crate::W<REG> {
665        self.variant(DNF::Filter9)
666    }
667    ///Digital filter enabled and filtering capability up to 10 tI2CCLK
668    #[inline(always)]
669    pub fn filter10(self) -> &'a mut crate::W<REG> {
670        self.variant(DNF::Filter10)
671    }
672    ///Digital filter enabled and filtering capability up to 11 tI2CCLK
673    #[inline(always)]
674    pub fn filter11(self) -> &'a mut crate::W<REG> {
675        self.variant(DNF::Filter11)
676    }
677    ///Digital filter enabled and filtering capability up to 12 tI2CCLK
678    #[inline(always)]
679    pub fn filter12(self) -> &'a mut crate::W<REG> {
680        self.variant(DNF::Filter12)
681    }
682    ///Digital filter enabled and filtering capability up to 13 tI2CCLK
683    #[inline(always)]
684    pub fn filter13(self) -> &'a mut crate::W<REG> {
685        self.variant(DNF::Filter13)
686    }
687    ///Digital filter enabled and filtering capability up to 14 tI2CCLK
688    #[inline(always)]
689    pub fn filter14(self) -> &'a mut crate::W<REG> {
690        self.variant(DNF::Filter14)
691    }
692    ///Digital filter enabled and filtering capability up to 15 tI2CCLK
693    #[inline(always)]
694    pub fn filter15(self) -> &'a mut crate::W<REG> {
695        self.variant(DNF::Filter15)
696    }
697}
698/**Analog noise filter OFF
699
700Value on reset: 0*/
701#[cfg_attr(feature = "defmt", derive(defmt::Format))]
702#[derive(Clone, Copy, Debug, PartialEq, Eq)]
703pub enum ANFOFF {
704    ///0: Analog noise filter enabled
705    Enabled = 0,
706    ///1: Analog noise filter disabled
707    Disabled = 1,
708}
709impl From<ANFOFF> for bool {
710    #[inline(always)]
711    fn from(variant: ANFOFF) -> Self {
712        variant as u8 != 0
713    }
714}
715///Field `ANFOFF` reader - Analog noise filter OFF
716pub type ANFOFF_R = crate::BitReader<ANFOFF>;
717impl ANFOFF_R {
718    ///Get enumerated values variant
719    #[inline(always)]
720    pub const fn variant(&self) -> ANFOFF {
721        match self.bits {
722            false => ANFOFF::Enabled,
723            true => ANFOFF::Disabled,
724        }
725    }
726    ///Analog noise filter enabled
727    #[inline(always)]
728    pub fn is_enabled(&self) -> bool {
729        *self == ANFOFF::Enabled
730    }
731    ///Analog noise filter disabled
732    #[inline(always)]
733    pub fn is_disabled(&self) -> bool {
734        *self == ANFOFF::Disabled
735    }
736}
737///Field `ANFOFF` writer - Analog noise filter OFF
738pub type ANFOFF_W<'a, REG> = crate::BitWriter<'a, REG, ANFOFF>;
739impl<'a, REG> ANFOFF_W<'a, REG>
740where
741    REG: crate::Writable + crate::RegisterSpec,
742{
743    ///Analog noise filter enabled
744    #[inline(always)]
745    pub fn enabled(self) -> &'a mut crate::W<REG> {
746        self.variant(ANFOFF::Enabled)
747    }
748    ///Analog noise filter disabled
749    #[inline(always)]
750    pub fn disabled(self) -> &'a mut crate::W<REG> {
751        self.variant(ANFOFF::Disabled)
752    }
753}
754/**DMA transmission requests enable
755
756Value on reset: 0*/
757#[cfg_attr(feature = "defmt", derive(defmt::Format))]
758#[derive(Clone, Copy, Debug, PartialEq, Eq)]
759pub enum TXDMAEN {
760    ///0: DMA mode disabled for transmission
761    Disabled = 0,
762    ///1: DMA mode enabled for transmission
763    Enabled = 1,
764}
765impl From<TXDMAEN> for bool {
766    #[inline(always)]
767    fn from(variant: TXDMAEN) -> Self {
768        variant as u8 != 0
769    }
770}
771///Field `TXDMAEN` reader - DMA transmission requests enable
772pub type TXDMAEN_R = crate::BitReader<TXDMAEN>;
773impl TXDMAEN_R {
774    ///Get enumerated values variant
775    #[inline(always)]
776    pub const fn variant(&self) -> TXDMAEN {
777        match self.bits {
778            false => TXDMAEN::Disabled,
779            true => TXDMAEN::Enabled,
780        }
781    }
782    ///DMA mode disabled for transmission
783    #[inline(always)]
784    pub fn is_disabled(&self) -> bool {
785        *self == TXDMAEN::Disabled
786    }
787    ///DMA mode enabled for transmission
788    #[inline(always)]
789    pub fn is_enabled(&self) -> bool {
790        *self == TXDMAEN::Enabled
791    }
792}
793///Field `TXDMAEN` writer - DMA transmission requests enable
794pub type TXDMAEN_W<'a, REG> = crate::BitWriter<'a, REG, TXDMAEN>;
795impl<'a, REG> TXDMAEN_W<'a, REG>
796where
797    REG: crate::Writable + crate::RegisterSpec,
798{
799    ///DMA mode disabled for transmission
800    #[inline(always)]
801    pub fn disabled(self) -> &'a mut crate::W<REG> {
802        self.variant(TXDMAEN::Disabled)
803    }
804    ///DMA mode enabled for transmission
805    #[inline(always)]
806    pub fn enabled(self) -> &'a mut crate::W<REG> {
807        self.variant(TXDMAEN::Enabled)
808    }
809}
810/**DMA reception requests enable
811
812Value on reset: 0*/
813#[cfg_attr(feature = "defmt", derive(defmt::Format))]
814#[derive(Clone, Copy, Debug, PartialEq, Eq)]
815pub enum RXDMAEN {
816    ///0: DMA mode disabled for reception
817    Disabled = 0,
818    ///1: DMA mode enabled for reception
819    Enabled = 1,
820}
821impl From<RXDMAEN> for bool {
822    #[inline(always)]
823    fn from(variant: RXDMAEN) -> Self {
824        variant as u8 != 0
825    }
826}
827///Field `RXDMAEN` reader - DMA reception requests enable
828pub type RXDMAEN_R = crate::BitReader<RXDMAEN>;
829impl RXDMAEN_R {
830    ///Get enumerated values variant
831    #[inline(always)]
832    pub const fn variant(&self) -> RXDMAEN {
833        match self.bits {
834            false => RXDMAEN::Disabled,
835            true => RXDMAEN::Enabled,
836        }
837    }
838    ///DMA mode disabled for reception
839    #[inline(always)]
840    pub fn is_disabled(&self) -> bool {
841        *self == RXDMAEN::Disabled
842    }
843    ///DMA mode enabled for reception
844    #[inline(always)]
845    pub fn is_enabled(&self) -> bool {
846        *self == RXDMAEN::Enabled
847    }
848}
849///Field `RXDMAEN` writer - DMA reception requests enable
850pub type RXDMAEN_W<'a, REG> = crate::BitWriter<'a, REG, RXDMAEN>;
851impl<'a, REG> RXDMAEN_W<'a, REG>
852where
853    REG: crate::Writable + crate::RegisterSpec,
854{
855    ///DMA mode disabled for reception
856    #[inline(always)]
857    pub fn disabled(self) -> &'a mut crate::W<REG> {
858        self.variant(RXDMAEN::Disabled)
859    }
860    ///DMA mode enabled for reception
861    #[inline(always)]
862    pub fn enabled(self) -> &'a mut crate::W<REG> {
863        self.variant(RXDMAEN::Enabled)
864    }
865}
866/**Slave byte control
867
868Value on reset: 0*/
869#[cfg_attr(feature = "defmt", derive(defmt::Format))]
870#[derive(Clone, Copy, Debug, PartialEq, Eq)]
871pub enum SBC {
872    ///0: Slave byte control disabled
873    Disabled = 0,
874    ///1: Slave byte control enabled
875    Enabled = 1,
876}
877impl From<SBC> for bool {
878    #[inline(always)]
879    fn from(variant: SBC) -> Self {
880        variant as u8 != 0
881    }
882}
883///Field `SBC` reader - Slave byte control
884pub type SBC_R = crate::BitReader<SBC>;
885impl SBC_R {
886    ///Get enumerated values variant
887    #[inline(always)]
888    pub const fn variant(&self) -> SBC {
889        match self.bits {
890            false => SBC::Disabled,
891            true => SBC::Enabled,
892        }
893    }
894    ///Slave byte control disabled
895    #[inline(always)]
896    pub fn is_disabled(&self) -> bool {
897        *self == SBC::Disabled
898    }
899    ///Slave byte control enabled
900    #[inline(always)]
901    pub fn is_enabled(&self) -> bool {
902        *self == SBC::Enabled
903    }
904}
905///Field `SBC` writer - Slave byte control
906pub type SBC_W<'a, REG> = crate::BitWriter<'a, REG, SBC>;
907impl<'a, REG> SBC_W<'a, REG>
908where
909    REG: crate::Writable + crate::RegisterSpec,
910{
911    ///Slave byte control disabled
912    #[inline(always)]
913    pub fn disabled(self) -> &'a mut crate::W<REG> {
914        self.variant(SBC::Disabled)
915    }
916    ///Slave byte control enabled
917    #[inline(always)]
918    pub fn enabled(self) -> &'a mut crate::W<REG> {
919        self.variant(SBC::Enabled)
920    }
921}
922/**Clock stretching disable
923
924Value on reset: 0*/
925#[cfg_attr(feature = "defmt", derive(defmt::Format))]
926#[derive(Clone, Copy, Debug, PartialEq, Eq)]
927pub enum NOSTRETCH {
928    ///0: Clock stretching enabled
929    Enabled = 0,
930    ///1: Clock stretching disabled
931    Disabled = 1,
932}
933impl From<NOSTRETCH> for bool {
934    #[inline(always)]
935    fn from(variant: NOSTRETCH) -> Self {
936        variant as u8 != 0
937    }
938}
939///Field `NOSTRETCH` reader - Clock stretching disable
940pub type NOSTRETCH_R = crate::BitReader<NOSTRETCH>;
941impl NOSTRETCH_R {
942    ///Get enumerated values variant
943    #[inline(always)]
944    pub const fn variant(&self) -> NOSTRETCH {
945        match self.bits {
946            false => NOSTRETCH::Enabled,
947            true => NOSTRETCH::Disabled,
948        }
949    }
950    ///Clock stretching enabled
951    #[inline(always)]
952    pub fn is_enabled(&self) -> bool {
953        *self == NOSTRETCH::Enabled
954    }
955    ///Clock stretching disabled
956    #[inline(always)]
957    pub fn is_disabled(&self) -> bool {
958        *self == NOSTRETCH::Disabled
959    }
960}
961///Field `NOSTRETCH` writer - Clock stretching disable
962pub type NOSTRETCH_W<'a, REG> = crate::BitWriter<'a, REG, NOSTRETCH>;
963impl<'a, REG> NOSTRETCH_W<'a, REG>
964where
965    REG: crate::Writable + crate::RegisterSpec,
966{
967    ///Clock stretching enabled
968    #[inline(always)]
969    pub fn enabled(self) -> &'a mut crate::W<REG> {
970        self.variant(NOSTRETCH::Enabled)
971    }
972    ///Clock stretching disabled
973    #[inline(always)]
974    pub fn disabled(self) -> &'a mut crate::W<REG> {
975        self.variant(NOSTRETCH::Disabled)
976    }
977}
978/**Wake-up from Stop mode enable
979
980Value on reset: 0*/
981#[cfg_attr(feature = "defmt", derive(defmt::Format))]
982#[derive(Clone, Copy, Debug, PartialEq, Eq)]
983pub enum WUPEN {
984    ///0: Wakeup from Stop mode disabled
985    Disabled = 0,
986    ///1: Wakeup from Stop mode enabled
987    Enabled = 1,
988}
989impl From<WUPEN> for bool {
990    #[inline(always)]
991    fn from(variant: WUPEN) -> Self {
992        variant as u8 != 0
993    }
994}
995///Field `WUPEN` reader - Wake-up from Stop mode enable
996pub type WUPEN_R = crate::BitReader<WUPEN>;
997impl WUPEN_R {
998    ///Get enumerated values variant
999    #[inline(always)]
1000    pub const fn variant(&self) -> WUPEN {
1001        match self.bits {
1002            false => WUPEN::Disabled,
1003            true => WUPEN::Enabled,
1004        }
1005    }
1006    ///Wakeup from Stop mode disabled
1007    #[inline(always)]
1008    pub fn is_disabled(&self) -> bool {
1009        *self == WUPEN::Disabled
1010    }
1011    ///Wakeup from Stop mode enabled
1012    #[inline(always)]
1013    pub fn is_enabled(&self) -> bool {
1014        *self == WUPEN::Enabled
1015    }
1016}
1017///Field `WUPEN` writer - Wake-up from Stop mode enable
1018pub type WUPEN_W<'a, REG> = crate::BitWriter<'a, REG, WUPEN>;
1019impl<'a, REG> WUPEN_W<'a, REG>
1020where
1021    REG: crate::Writable + crate::RegisterSpec,
1022{
1023    ///Wakeup from Stop mode disabled
1024    #[inline(always)]
1025    pub fn disabled(self) -> &'a mut crate::W<REG> {
1026        self.variant(WUPEN::Disabled)
1027    }
1028    ///Wakeup from Stop mode enabled
1029    #[inline(always)]
1030    pub fn enabled(self) -> &'a mut crate::W<REG> {
1031        self.variant(WUPEN::Enabled)
1032    }
1033}
1034/**General call enable
1035
1036Value on reset: 0*/
1037#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1038#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1039pub enum GCEN {
1040    ///0: General call disabled. Address 0b00000000 is NACKed
1041    Disabled = 0,
1042    ///1: General call enabled. Address 0b00000000 is ACKed
1043    Enabled = 1,
1044}
1045impl From<GCEN> for bool {
1046    #[inline(always)]
1047    fn from(variant: GCEN) -> Self {
1048        variant as u8 != 0
1049    }
1050}
1051///Field `GCEN` reader - General call enable
1052pub type GCEN_R = crate::BitReader<GCEN>;
1053impl GCEN_R {
1054    ///Get enumerated values variant
1055    #[inline(always)]
1056    pub const fn variant(&self) -> GCEN {
1057        match self.bits {
1058            false => GCEN::Disabled,
1059            true => GCEN::Enabled,
1060        }
1061    }
1062    ///General call disabled. Address 0b00000000 is NACKed
1063    #[inline(always)]
1064    pub fn is_disabled(&self) -> bool {
1065        *self == GCEN::Disabled
1066    }
1067    ///General call enabled. Address 0b00000000 is ACKed
1068    #[inline(always)]
1069    pub fn is_enabled(&self) -> bool {
1070        *self == GCEN::Enabled
1071    }
1072}
1073///Field `GCEN` writer - General call enable
1074pub type GCEN_W<'a, REG> = crate::BitWriter<'a, REG, GCEN>;
1075impl<'a, REG> GCEN_W<'a, REG>
1076where
1077    REG: crate::Writable + crate::RegisterSpec,
1078{
1079    ///General call disabled. Address 0b00000000 is NACKed
1080    #[inline(always)]
1081    pub fn disabled(self) -> &'a mut crate::W<REG> {
1082        self.variant(GCEN::Disabled)
1083    }
1084    ///General call enabled. Address 0b00000000 is ACKed
1085    #[inline(always)]
1086    pub fn enabled(self) -> &'a mut crate::W<REG> {
1087        self.variant(GCEN::Enabled)
1088    }
1089}
1090/**SMBus host address enable
1091
1092Value on reset: 0*/
1093#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1094#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1095pub enum SMBHEN {
1096    ///0: Host address disabled. Address 0b0001000x is NACKed
1097    Disabled = 0,
1098    ///1: Host address enabled. Address 0b0001000x is ACKed
1099    Enabled = 1,
1100}
1101impl From<SMBHEN> for bool {
1102    #[inline(always)]
1103    fn from(variant: SMBHEN) -> Self {
1104        variant as u8 != 0
1105    }
1106}
1107///Field `SMBHEN` reader - SMBus host address enable
1108pub type SMBHEN_R = crate::BitReader<SMBHEN>;
1109impl SMBHEN_R {
1110    ///Get enumerated values variant
1111    #[inline(always)]
1112    pub const fn variant(&self) -> SMBHEN {
1113        match self.bits {
1114            false => SMBHEN::Disabled,
1115            true => SMBHEN::Enabled,
1116        }
1117    }
1118    ///Host address disabled. Address 0b0001000x is NACKed
1119    #[inline(always)]
1120    pub fn is_disabled(&self) -> bool {
1121        *self == SMBHEN::Disabled
1122    }
1123    ///Host address enabled. Address 0b0001000x is ACKed
1124    #[inline(always)]
1125    pub fn is_enabled(&self) -> bool {
1126        *self == SMBHEN::Enabled
1127    }
1128}
1129///Field `SMBHEN` writer - SMBus host address enable
1130pub type SMBHEN_W<'a, REG> = crate::BitWriter<'a, REG, SMBHEN>;
1131impl<'a, REG> SMBHEN_W<'a, REG>
1132where
1133    REG: crate::Writable + crate::RegisterSpec,
1134{
1135    ///Host address disabled. Address 0b0001000x is NACKed
1136    #[inline(always)]
1137    pub fn disabled(self) -> &'a mut crate::W<REG> {
1138        self.variant(SMBHEN::Disabled)
1139    }
1140    ///Host address enabled. Address 0b0001000x is ACKed
1141    #[inline(always)]
1142    pub fn enabled(self) -> &'a mut crate::W<REG> {
1143        self.variant(SMBHEN::Enabled)
1144    }
1145}
1146/**SMBus device default address enable
1147
1148Value on reset: 0*/
1149#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1150#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1151pub enum SMBDEN {
1152    ///0: Device default address disabled. Address 0b1100001x is NACKed
1153    Disabled = 0,
1154    ///1: Device default address enabled. Address 0b1100001x is ACKed
1155    Enabled = 1,
1156}
1157impl From<SMBDEN> for bool {
1158    #[inline(always)]
1159    fn from(variant: SMBDEN) -> Self {
1160        variant as u8 != 0
1161    }
1162}
1163///Field `SMBDEN` reader - SMBus device default address enable
1164pub type SMBDEN_R = crate::BitReader<SMBDEN>;
1165impl SMBDEN_R {
1166    ///Get enumerated values variant
1167    #[inline(always)]
1168    pub const fn variant(&self) -> SMBDEN {
1169        match self.bits {
1170            false => SMBDEN::Disabled,
1171            true => SMBDEN::Enabled,
1172        }
1173    }
1174    ///Device default address disabled. Address 0b1100001x is NACKed
1175    #[inline(always)]
1176    pub fn is_disabled(&self) -> bool {
1177        *self == SMBDEN::Disabled
1178    }
1179    ///Device default address enabled. Address 0b1100001x is ACKed
1180    #[inline(always)]
1181    pub fn is_enabled(&self) -> bool {
1182        *self == SMBDEN::Enabled
1183    }
1184}
1185///Field `SMBDEN` writer - SMBus device default address enable
1186pub type SMBDEN_W<'a, REG> = crate::BitWriter<'a, REG, SMBDEN>;
1187impl<'a, REG> SMBDEN_W<'a, REG>
1188where
1189    REG: crate::Writable + crate::RegisterSpec,
1190{
1191    ///Device default address disabled. Address 0b1100001x is NACKed
1192    #[inline(always)]
1193    pub fn disabled(self) -> &'a mut crate::W<REG> {
1194        self.variant(SMBDEN::Disabled)
1195    }
1196    ///Device default address enabled. Address 0b1100001x is ACKed
1197    #[inline(always)]
1198    pub fn enabled(self) -> &'a mut crate::W<REG> {
1199        self.variant(SMBDEN::Enabled)
1200    }
1201}
1202/**SMBus alert enable
1203
1204Value on reset: 0*/
1205#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1206#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1207pub enum ALERTEN {
1208    ///0: In device mode (SMBHEN=Disabled) Releases SMBA pin high and Alert Response Address Header disabled (0001100x) followed by NACK. In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) not supported
1209    Disabled = 0,
1210    ///1: In device mode (SMBHEN=Disabled) Drives SMBA pin low and Alert Response Address Header enabled (0001100x) followed by ACK.In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) supported
1211    Enabled = 1,
1212}
1213impl From<ALERTEN> for bool {
1214    #[inline(always)]
1215    fn from(variant: ALERTEN) -> Self {
1216        variant as u8 != 0
1217    }
1218}
1219///Field `ALERTEN` reader - SMBus alert enable
1220pub type ALERTEN_R = crate::BitReader<ALERTEN>;
1221impl ALERTEN_R {
1222    ///Get enumerated values variant
1223    #[inline(always)]
1224    pub const fn variant(&self) -> ALERTEN {
1225        match self.bits {
1226            false => ALERTEN::Disabled,
1227            true => ALERTEN::Enabled,
1228        }
1229    }
1230    ///In device mode (SMBHEN=Disabled) Releases SMBA pin high and Alert Response Address Header disabled (0001100x) followed by NACK. In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) not supported
1231    #[inline(always)]
1232    pub fn is_disabled(&self) -> bool {
1233        *self == ALERTEN::Disabled
1234    }
1235    ///In device mode (SMBHEN=Disabled) Drives SMBA pin low and Alert Response Address Header enabled (0001100x) followed by ACK.In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) supported
1236    #[inline(always)]
1237    pub fn is_enabled(&self) -> bool {
1238        *self == ALERTEN::Enabled
1239    }
1240}
1241///Field `ALERTEN` writer - SMBus alert enable
1242pub type ALERTEN_W<'a, REG> = crate::BitWriter<'a, REG, ALERTEN>;
1243impl<'a, REG> ALERTEN_W<'a, REG>
1244where
1245    REG: crate::Writable + crate::RegisterSpec,
1246{
1247    ///In device mode (SMBHEN=Disabled) Releases SMBA pin high and Alert Response Address Header disabled (0001100x) followed by NACK. In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) not supported
1248    #[inline(always)]
1249    pub fn disabled(self) -> &'a mut crate::W<REG> {
1250        self.variant(ALERTEN::Disabled)
1251    }
1252    ///In device mode (SMBHEN=Disabled) Drives SMBA pin low and Alert Response Address Header enabled (0001100x) followed by ACK.In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) supported
1253    #[inline(always)]
1254    pub fn enabled(self) -> &'a mut crate::W<REG> {
1255        self.variant(ALERTEN::Enabled)
1256    }
1257}
1258/**PEC enable
1259
1260Value on reset: 0*/
1261#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1262#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1263pub enum PECEN {
1264    ///0: PEC calculation disabled
1265    Disabled = 0,
1266    ///1: PEC calculation enabled
1267    Enabled = 1,
1268}
1269impl From<PECEN> for bool {
1270    #[inline(always)]
1271    fn from(variant: PECEN) -> Self {
1272        variant as u8 != 0
1273    }
1274}
1275///Field `PECEN` reader - PEC enable
1276pub type PECEN_R = crate::BitReader<PECEN>;
1277impl PECEN_R {
1278    ///Get enumerated values variant
1279    #[inline(always)]
1280    pub const fn variant(&self) -> PECEN {
1281        match self.bits {
1282            false => PECEN::Disabled,
1283            true => PECEN::Enabled,
1284        }
1285    }
1286    ///PEC calculation disabled
1287    #[inline(always)]
1288    pub fn is_disabled(&self) -> bool {
1289        *self == PECEN::Disabled
1290    }
1291    ///PEC calculation enabled
1292    #[inline(always)]
1293    pub fn is_enabled(&self) -> bool {
1294        *self == PECEN::Enabled
1295    }
1296}
1297///Field `PECEN` writer - PEC enable
1298pub type PECEN_W<'a, REG> = crate::BitWriter<'a, REG, PECEN>;
1299impl<'a, REG> PECEN_W<'a, REG>
1300where
1301    REG: crate::Writable + crate::RegisterSpec,
1302{
1303    ///PEC calculation disabled
1304    #[inline(always)]
1305    pub fn disabled(self) -> &'a mut crate::W<REG> {
1306        self.variant(PECEN::Disabled)
1307    }
1308    ///PEC calculation enabled
1309    #[inline(always)]
1310    pub fn enabled(self) -> &'a mut crate::W<REG> {
1311        self.variant(PECEN::Enabled)
1312    }
1313}
1314/**Fast-mode Plus 20 mA drive enable
1315
1316Value on reset: 0*/
1317#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1318#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1319pub enum FMP {
1320    ///0: 20 mA I/O drive disabled
1321    Disabled = 0,
1322    ///1: 20 mA I/O drive enabled
1323    Enabled = 1,
1324}
1325impl From<FMP> for bool {
1326    #[inline(always)]
1327    fn from(variant: FMP) -> Self {
1328        variant as u8 != 0
1329    }
1330}
1331///Field `FMP` reader - Fast-mode Plus 20 mA drive enable
1332pub type FMP_R = crate::BitReader<FMP>;
1333impl FMP_R {
1334    ///Get enumerated values variant
1335    #[inline(always)]
1336    pub const fn variant(&self) -> FMP {
1337        match self.bits {
1338            false => FMP::Disabled,
1339            true => FMP::Enabled,
1340        }
1341    }
1342    ///20 mA I/O drive disabled
1343    #[inline(always)]
1344    pub fn is_disabled(&self) -> bool {
1345        *self == FMP::Disabled
1346    }
1347    ///20 mA I/O drive enabled
1348    #[inline(always)]
1349    pub fn is_enabled(&self) -> bool {
1350        *self == FMP::Enabled
1351    }
1352}
1353///Field `FMP` writer - Fast-mode Plus 20 mA drive enable
1354pub type FMP_W<'a, REG> = crate::BitWriter<'a, REG, FMP>;
1355impl<'a, REG> FMP_W<'a, REG>
1356where
1357    REG: crate::Writable + crate::RegisterSpec,
1358{
1359    ///20 mA I/O drive disabled
1360    #[inline(always)]
1361    pub fn disabled(self) -> &'a mut crate::W<REG> {
1362        self.variant(FMP::Disabled)
1363    }
1364    ///20 mA I/O drive enabled
1365    #[inline(always)]
1366    pub fn enabled(self) -> &'a mut crate::W<REG> {
1367        self.variant(FMP::Enabled)
1368    }
1369}
1370/**Address match flag (ADDR) automatic clear
1371
1372Value on reset: 0*/
1373#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1374#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1375pub enum ADDRACLR {
1376    ///0: ADDR flag is set by hardware, cleared by software
1377    Disabled = 0,
1378    ///1: ADDR flag remains cleared by hardware
1379    Enabled = 1,
1380}
1381impl From<ADDRACLR> for bool {
1382    #[inline(always)]
1383    fn from(variant: ADDRACLR) -> Self {
1384        variant as u8 != 0
1385    }
1386}
1387///Field `ADDRACLR` reader - Address match flag (ADDR) automatic clear
1388pub type ADDRACLR_R = crate::BitReader<ADDRACLR>;
1389impl ADDRACLR_R {
1390    ///Get enumerated values variant
1391    #[inline(always)]
1392    pub const fn variant(&self) -> ADDRACLR {
1393        match self.bits {
1394            false => ADDRACLR::Disabled,
1395            true => ADDRACLR::Enabled,
1396        }
1397    }
1398    ///ADDR flag is set by hardware, cleared by software
1399    #[inline(always)]
1400    pub fn is_disabled(&self) -> bool {
1401        *self == ADDRACLR::Disabled
1402    }
1403    ///ADDR flag remains cleared by hardware
1404    #[inline(always)]
1405    pub fn is_enabled(&self) -> bool {
1406        *self == ADDRACLR::Enabled
1407    }
1408}
1409///Field `ADDRACLR` writer - Address match flag (ADDR) automatic clear
1410pub type ADDRACLR_W<'a, REG> = crate::BitWriter<'a, REG, ADDRACLR>;
1411impl<'a, REG> ADDRACLR_W<'a, REG>
1412where
1413    REG: crate::Writable + crate::RegisterSpec,
1414{
1415    ///ADDR flag is set by hardware, cleared by software
1416    #[inline(always)]
1417    pub fn disabled(self) -> &'a mut crate::W<REG> {
1418        self.variant(ADDRACLR::Disabled)
1419    }
1420    ///ADDR flag remains cleared by hardware
1421    #[inline(always)]
1422    pub fn enabled(self) -> &'a mut crate::W<REG> {
1423        self.variant(ADDRACLR::Enabled)
1424    }
1425}
1426/**STOP detection flag (STOPF) automatic clear
1427
1428Value on reset: 0*/
1429#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1430#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1431pub enum STOPFACLR {
1432    ///0: STOPF flag is set by hardware, cleared by software
1433    Disabled = 0,
1434    ///1: STOPF flag remains cleared by hardware
1435    Enabled = 1,
1436}
1437impl From<STOPFACLR> for bool {
1438    #[inline(always)]
1439    fn from(variant: STOPFACLR) -> Self {
1440        variant as u8 != 0
1441    }
1442}
1443///Field `STOPFACLR` reader - STOP detection flag (STOPF) automatic clear
1444pub type STOPFACLR_R = crate::BitReader<STOPFACLR>;
1445impl STOPFACLR_R {
1446    ///Get enumerated values variant
1447    #[inline(always)]
1448    pub const fn variant(&self) -> STOPFACLR {
1449        match self.bits {
1450            false => STOPFACLR::Disabled,
1451            true => STOPFACLR::Enabled,
1452        }
1453    }
1454    ///STOPF flag is set by hardware, cleared by software
1455    #[inline(always)]
1456    pub fn is_disabled(&self) -> bool {
1457        *self == STOPFACLR::Disabled
1458    }
1459    ///STOPF flag remains cleared by hardware
1460    #[inline(always)]
1461    pub fn is_enabled(&self) -> bool {
1462        *self == STOPFACLR::Enabled
1463    }
1464}
1465///Field `STOPFACLR` writer - STOP detection flag (STOPF) automatic clear
1466pub type STOPFACLR_W<'a, REG> = crate::BitWriter<'a, REG, STOPFACLR>;
1467impl<'a, REG> STOPFACLR_W<'a, REG>
1468where
1469    REG: crate::Writable + crate::RegisterSpec,
1470{
1471    ///STOPF flag is set by hardware, cleared by software
1472    #[inline(always)]
1473    pub fn disabled(self) -> &'a mut crate::W<REG> {
1474        self.variant(STOPFACLR::Disabled)
1475    }
1476    ///STOPF flag remains cleared by hardware
1477    #[inline(always)]
1478    pub fn enabled(self) -> &'a mut crate::W<REG> {
1479        self.variant(STOPFACLR::Enabled)
1480    }
1481}
1482impl R {
1483    ///Bit 0 - Peripheral enable
1484    #[inline(always)]
1485    pub fn pe(&self) -> PE_R {
1486        PE_R::new((self.bits & 1) != 0)
1487    }
1488    ///Bit 1 - TX interrupt enable
1489    #[inline(always)]
1490    pub fn txie(&self) -> TXIE_R {
1491        TXIE_R::new(((self.bits >> 1) & 1) != 0)
1492    }
1493    ///Bit 2 - RX interrupt enable
1494    #[inline(always)]
1495    pub fn rxie(&self) -> RXIE_R {
1496        RXIE_R::new(((self.bits >> 2) & 1) != 0)
1497    }
1498    ///Bit 3 - Address match interrupt enable (slave only)
1499    #[inline(always)]
1500    pub fn addrie(&self) -> ADDRIE_R {
1501        ADDRIE_R::new(((self.bits >> 3) & 1) != 0)
1502    }
1503    ///Bit 4 - Not acknowledge received interrupt enable
1504    #[inline(always)]
1505    pub fn nackie(&self) -> NACKIE_R {
1506        NACKIE_R::new(((self.bits >> 4) & 1) != 0)
1507    }
1508    ///Bit 5 - Stop detection interrupt enable
1509    #[inline(always)]
1510    pub fn stopie(&self) -> STOPIE_R {
1511        STOPIE_R::new(((self.bits >> 5) & 1) != 0)
1512    }
1513    ///Bit 6 - Transfer complete interrupt enable
1514    #[inline(always)]
1515    pub fn tcie(&self) -> TCIE_R {
1516        TCIE_R::new(((self.bits >> 6) & 1) != 0)
1517    }
1518    ///Bit 7 - Error interrupts enable
1519    #[inline(always)]
1520    pub fn errie(&self) -> ERRIE_R {
1521        ERRIE_R::new(((self.bits >> 7) & 1) != 0)
1522    }
1523    ///Bits 8:11 - Digital noise filter
1524    #[inline(always)]
1525    pub fn dnf(&self) -> DNF_R {
1526        DNF_R::new(((self.bits >> 8) & 0x0f) as u8)
1527    }
1528    ///Bit 12 - Analog noise filter OFF
1529    #[inline(always)]
1530    pub fn anfoff(&self) -> ANFOFF_R {
1531        ANFOFF_R::new(((self.bits >> 12) & 1) != 0)
1532    }
1533    ///Bit 14 - DMA transmission requests enable
1534    #[inline(always)]
1535    pub fn txdmaen(&self) -> TXDMAEN_R {
1536        TXDMAEN_R::new(((self.bits >> 14) & 1) != 0)
1537    }
1538    ///Bit 15 - DMA reception requests enable
1539    #[inline(always)]
1540    pub fn rxdmaen(&self) -> RXDMAEN_R {
1541        RXDMAEN_R::new(((self.bits >> 15) & 1) != 0)
1542    }
1543    ///Bit 16 - Slave byte control
1544    #[inline(always)]
1545    pub fn sbc(&self) -> SBC_R {
1546        SBC_R::new(((self.bits >> 16) & 1) != 0)
1547    }
1548    ///Bit 17 - Clock stretching disable
1549    #[inline(always)]
1550    pub fn nostretch(&self) -> NOSTRETCH_R {
1551        NOSTRETCH_R::new(((self.bits >> 17) & 1) != 0)
1552    }
1553    ///Bit 18 - Wake-up from Stop mode enable
1554    #[inline(always)]
1555    pub fn wupen(&self) -> WUPEN_R {
1556        WUPEN_R::new(((self.bits >> 18) & 1) != 0)
1557    }
1558    ///Bit 19 - General call enable
1559    #[inline(always)]
1560    pub fn gcen(&self) -> GCEN_R {
1561        GCEN_R::new(((self.bits >> 19) & 1) != 0)
1562    }
1563    ///Bit 20 - SMBus host address enable
1564    #[inline(always)]
1565    pub fn smbhen(&self) -> SMBHEN_R {
1566        SMBHEN_R::new(((self.bits >> 20) & 1) != 0)
1567    }
1568    ///Bit 21 - SMBus device default address enable
1569    #[inline(always)]
1570    pub fn smbden(&self) -> SMBDEN_R {
1571        SMBDEN_R::new(((self.bits >> 21) & 1) != 0)
1572    }
1573    ///Bit 22 - SMBus alert enable
1574    #[inline(always)]
1575    pub fn alerten(&self) -> ALERTEN_R {
1576        ALERTEN_R::new(((self.bits >> 22) & 1) != 0)
1577    }
1578    ///Bit 23 - PEC enable
1579    #[inline(always)]
1580    pub fn pecen(&self) -> PECEN_R {
1581        PECEN_R::new(((self.bits >> 23) & 1) != 0)
1582    }
1583    ///Bit 24 - Fast-mode Plus 20 mA drive enable
1584    #[inline(always)]
1585    pub fn fmp(&self) -> FMP_R {
1586        FMP_R::new(((self.bits >> 24) & 1) != 0)
1587    }
1588    ///Bit 30 - Address match flag (ADDR) automatic clear
1589    #[inline(always)]
1590    pub fn addraclr(&self) -> ADDRACLR_R {
1591        ADDRACLR_R::new(((self.bits >> 30) & 1) != 0)
1592    }
1593    ///Bit 31 - STOP detection flag (STOPF) automatic clear
1594    #[inline(always)]
1595    pub fn stopfaclr(&self) -> STOPFACLR_R {
1596        STOPFACLR_R::new(((self.bits >> 31) & 1) != 0)
1597    }
1598}
1599impl core::fmt::Debug for R {
1600    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1601        f.debug_struct("CR1")
1602            .field("pe", &self.pe())
1603            .field("txie", &self.txie())
1604            .field("rxie", &self.rxie())
1605            .field("addrie", &self.addrie())
1606            .field("nackie", &self.nackie())
1607            .field("stopie", &self.stopie())
1608            .field("tcie", &self.tcie())
1609            .field("errie", &self.errie())
1610            .field("dnf", &self.dnf())
1611            .field("anfoff", &self.anfoff())
1612            .field("txdmaen", &self.txdmaen())
1613            .field("rxdmaen", &self.rxdmaen())
1614            .field("sbc", &self.sbc())
1615            .field("nostretch", &self.nostretch())
1616            .field("wupen", &self.wupen())
1617            .field("gcen", &self.gcen())
1618            .field("smbhen", &self.smbhen())
1619            .field("smbden", &self.smbden())
1620            .field("alerten", &self.alerten())
1621            .field("pecen", &self.pecen())
1622            .field("fmp", &self.fmp())
1623            .field("addraclr", &self.addraclr())
1624            .field("stopfaclr", &self.stopfaclr())
1625            .finish()
1626    }
1627}
1628impl W {
1629    ///Bit 0 - Peripheral enable
1630    #[inline(always)]
1631    pub fn pe(&mut self) -> PE_W<CR1rs> {
1632        PE_W::new(self, 0)
1633    }
1634    ///Bit 1 - TX interrupt enable
1635    #[inline(always)]
1636    pub fn txie(&mut self) -> TXIE_W<CR1rs> {
1637        TXIE_W::new(self, 1)
1638    }
1639    ///Bit 2 - RX interrupt enable
1640    #[inline(always)]
1641    pub fn rxie(&mut self) -> RXIE_W<CR1rs> {
1642        RXIE_W::new(self, 2)
1643    }
1644    ///Bit 3 - Address match interrupt enable (slave only)
1645    #[inline(always)]
1646    pub fn addrie(&mut self) -> ADDRIE_W<CR1rs> {
1647        ADDRIE_W::new(self, 3)
1648    }
1649    ///Bit 4 - Not acknowledge received interrupt enable
1650    #[inline(always)]
1651    pub fn nackie(&mut self) -> NACKIE_W<CR1rs> {
1652        NACKIE_W::new(self, 4)
1653    }
1654    ///Bit 5 - Stop detection interrupt enable
1655    #[inline(always)]
1656    pub fn stopie(&mut self) -> STOPIE_W<CR1rs> {
1657        STOPIE_W::new(self, 5)
1658    }
1659    ///Bit 6 - Transfer complete interrupt enable
1660    #[inline(always)]
1661    pub fn tcie(&mut self) -> TCIE_W<CR1rs> {
1662        TCIE_W::new(self, 6)
1663    }
1664    ///Bit 7 - Error interrupts enable
1665    #[inline(always)]
1666    pub fn errie(&mut self) -> ERRIE_W<CR1rs> {
1667        ERRIE_W::new(self, 7)
1668    }
1669    ///Bits 8:11 - Digital noise filter
1670    #[inline(always)]
1671    pub fn dnf(&mut self) -> DNF_W<CR1rs> {
1672        DNF_W::new(self, 8)
1673    }
1674    ///Bit 12 - Analog noise filter OFF
1675    #[inline(always)]
1676    pub fn anfoff(&mut self) -> ANFOFF_W<CR1rs> {
1677        ANFOFF_W::new(self, 12)
1678    }
1679    ///Bit 14 - DMA transmission requests enable
1680    #[inline(always)]
1681    pub fn txdmaen(&mut self) -> TXDMAEN_W<CR1rs> {
1682        TXDMAEN_W::new(self, 14)
1683    }
1684    ///Bit 15 - DMA reception requests enable
1685    #[inline(always)]
1686    pub fn rxdmaen(&mut self) -> RXDMAEN_W<CR1rs> {
1687        RXDMAEN_W::new(self, 15)
1688    }
1689    ///Bit 16 - Slave byte control
1690    #[inline(always)]
1691    pub fn sbc(&mut self) -> SBC_W<CR1rs> {
1692        SBC_W::new(self, 16)
1693    }
1694    ///Bit 17 - Clock stretching disable
1695    #[inline(always)]
1696    pub fn nostretch(&mut self) -> NOSTRETCH_W<CR1rs> {
1697        NOSTRETCH_W::new(self, 17)
1698    }
1699    ///Bit 18 - Wake-up from Stop mode enable
1700    #[inline(always)]
1701    pub fn wupen(&mut self) -> WUPEN_W<CR1rs> {
1702        WUPEN_W::new(self, 18)
1703    }
1704    ///Bit 19 - General call enable
1705    #[inline(always)]
1706    pub fn gcen(&mut self) -> GCEN_W<CR1rs> {
1707        GCEN_W::new(self, 19)
1708    }
1709    ///Bit 20 - SMBus host address enable
1710    #[inline(always)]
1711    pub fn smbhen(&mut self) -> SMBHEN_W<CR1rs> {
1712        SMBHEN_W::new(self, 20)
1713    }
1714    ///Bit 21 - SMBus device default address enable
1715    #[inline(always)]
1716    pub fn smbden(&mut self) -> SMBDEN_W<CR1rs> {
1717        SMBDEN_W::new(self, 21)
1718    }
1719    ///Bit 22 - SMBus alert enable
1720    #[inline(always)]
1721    pub fn alerten(&mut self) -> ALERTEN_W<CR1rs> {
1722        ALERTEN_W::new(self, 22)
1723    }
1724    ///Bit 23 - PEC enable
1725    #[inline(always)]
1726    pub fn pecen(&mut self) -> PECEN_W<CR1rs> {
1727        PECEN_W::new(self, 23)
1728    }
1729    ///Bit 24 - Fast-mode Plus 20 mA drive enable
1730    #[inline(always)]
1731    pub fn fmp(&mut self) -> FMP_W<CR1rs> {
1732        FMP_W::new(self, 24)
1733    }
1734    ///Bit 30 - Address match flag (ADDR) automatic clear
1735    #[inline(always)]
1736    pub fn addraclr(&mut self) -> ADDRACLR_W<CR1rs> {
1737        ADDRACLR_W::new(self, 30)
1738    }
1739    ///Bit 31 - STOP detection flag (STOPF) automatic clear
1740    #[inline(always)]
1741    pub fn stopfaclr(&mut self) -> STOPFACLR_W<CR1rs> {
1742        STOPFACLR_W::new(self, 31)
1743    }
1744}
1745/**I2C control register 1
1746
1747You can [`read`](crate::Reg::read) this register and get [`cr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
1748
1749See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H533.html#I2C1:CR1)*/
1750pub struct CR1rs;
1751impl crate::RegisterSpec for CR1rs {
1752    type Ux = u32;
1753}
1754///`read()` method returns [`cr1::R`](R) reader structure
1755impl crate::Readable for CR1rs {}
1756///`write(|w| ..)` method takes [`cr1::W`](W) writer structure
1757impl crate::Writable for CR1rs {
1758    type Safety = crate::Unsafe;
1759}
1760///`reset()` method sets CR1 to value 0
1761impl crate::Resettable for CR1rs {}
stm32h5/stm32h533/i2c1/cr1.rs

stm32h5/stm32h533/i2c1/
cr1.rs
