stm32h5/stm32h562/tim5/
dier.rs

1#[doc = "Register `DIER` reader"]
2pub type R = crate::R<DIERrs>;
3#[doc = "Register `DIER` writer"]
4pub type W = crate::W<DIERrs>;
5#[doc = "Field `UIE` reader - Update interrupt enable"]
6pub type UIE_R = crate::BitReader<UIE>;
7#[doc = "Update interrupt enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum UIE {
10    #[doc = "0: Update interrupt disabled"]
11    Disabled = 0,
12    #[doc = "1: Update interrupt enabled"]
13    Enabled = 1,
14}
15impl From<UIE> for bool {
16    #[inline(always)]
17    fn from(variant: UIE) -> Self {
18        variant as u8 != 0
19    }
20}
21impl UIE_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> UIE {
25        match self.bits {
26            false => UIE::Disabled,
27            true => UIE::Enabled,
28        }
29    }
30    #[doc = "Update interrupt disabled"]
31    #[inline(always)]
32    pub fn is_disabled(&self) -> bool {
33        *self == UIE::Disabled
34    }
35    #[doc = "Update interrupt enabled"]
36    #[inline(always)]
37    pub fn is_enabled(&self) -> bool {
38        *self == UIE::Enabled
39    }
40}
41#[doc = "Field `UIE` writer - Update interrupt enable"]
42pub type UIE_W<'a, REG> = crate::BitWriter<'a, REG, UIE>;
43impl<'a, REG> UIE_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Update interrupt disabled"]
48    #[inline(always)]
49    pub fn disabled(self) -> &'a mut crate::W<REG> {
50        self.variant(UIE::Disabled)
51    }
52    #[doc = "Update interrupt enabled"]
53    #[inline(always)]
54    pub fn enabled(self) -> &'a mut crate::W<REG> {
55        self.variant(UIE::Enabled)
56    }
57}
58#[doc = "Field `CC1IE` reader - Capture/Compare 1 interrupt enable"]
59pub type CC1IE_R = crate::BitReader<CC1IE>;
60#[doc = "Capture/Compare 1 interrupt enable\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum CC1IE {
63    #[doc = "0: CCx interrupt disabled"]
64    Disabled = 0,
65    #[doc = "1: CCx interrupt enabled"]
66    Enabled = 1,
67}
68impl From<CC1IE> for bool {
69    #[inline(always)]
70    fn from(variant: CC1IE) -> Self {
71        variant as u8 != 0
72    }
73}
74impl CC1IE_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> CC1IE {
78        match self.bits {
79            false => CC1IE::Disabled,
80            true => CC1IE::Enabled,
81        }
82    }
83    #[doc = "CCx interrupt disabled"]
84    #[inline(always)]
85    pub fn is_disabled(&self) -> bool {
86        *self == CC1IE::Disabled
87    }
88    #[doc = "CCx interrupt enabled"]
89    #[inline(always)]
90    pub fn is_enabled(&self) -> bool {
91        *self == CC1IE::Enabled
92    }
93}
94#[doc = "Field `CC1IE` writer - Capture/Compare 1 interrupt enable"]
95pub type CC1IE_W<'a, REG> = crate::BitWriter<'a, REG, CC1IE>;
96impl<'a, REG> CC1IE_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "CCx interrupt disabled"]
101    #[inline(always)]
102    pub fn disabled(self) -> &'a mut crate::W<REG> {
103        self.variant(CC1IE::Disabled)
104    }
105    #[doc = "CCx interrupt enabled"]
106    #[inline(always)]
107    pub fn enabled(self) -> &'a mut crate::W<REG> {
108        self.variant(CC1IE::Enabled)
109    }
110}
111#[doc = "Field `CC2IE` reader - Capture/Compare 2 interrupt enable"]
112pub use CC1IE_R as CC2IE_R;
113#[doc = "Field `CC3IE` reader - Capture/Compare 3 interrupt enable"]
114pub use CC1IE_R as CC3IE_R;
115#[doc = "Field `CC4IE` reader - Capture/Compare 4 interrupt enable"]
116pub use CC1IE_R as CC4IE_R;
117#[doc = "Field `CC2IE` writer - Capture/Compare 2 interrupt enable"]
118pub use CC1IE_W as CC2IE_W;
119#[doc = "Field `CC3IE` writer - Capture/Compare 3 interrupt enable"]
120pub use CC1IE_W as CC3IE_W;
121#[doc = "Field `CC4IE` writer - Capture/Compare 4 interrupt enable"]
122pub use CC1IE_W as CC4IE_W;
123#[doc = "Field `TIE` reader - Trigger interrupt enable"]
124pub type TIE_R = crate::BitReader<TIE>;
125#[doc = "Trigger interrupt enable\n\nValue on reset: 0"]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum TIE {
128    #[doc = "0: Trigger interrupt disabled"]
129    Disabled = 0,
130    #[doc = "1: Trigger interrupt enabled"]
131    Enabled = 1,
132}
133impl From<TIE> for bool {
134    #[inline(always)]
135    fn from(variant: TIE) -> Self {
136        variant as u8 != 0
137    }
138}
139impl TIE_R {
140    #[doc = "Get enumerated values variant"]
141    #[inline(always)]
142    pub const fn variant(&self) -> TIE {
143        match self.bits {
144            false => TIE::Disabled,
145            true => TIE::Enabled,
146        }
147    }
148    #[doc = "Trigger interrupt disabled"]
149    #[inline(always)]
150    pub fn is_disabled(&self) -> bool {
151        *self == TIE::Disabled
152    }
153    #[doc = "Trigger interrupt enabled"]
154    #[inline(always)]
155    pub fn is_enabled(&self) -> bool {
156        *self == TIE::Enabled
157    }
158}
159#[doc = "Field `TIE` writer - Trigger interrupt enable"]
160pub type TIE_W<'a, REG> = crate::BitWriter<'a, REG, TIE>;
161impl<'a, REG> TIE_W<'a, REG>
162where
163    REG: crate::Writable + crate::RegisterSpec,
164{
165    #[doc = "Trigger interrupt disabled"]
166    #[inline(always)]
167    pub fn disabled(self) -> &'a mut crate::W<REG> {
168        self.variant(TIE::Disabled)
169    }
170    #[doc = "Trigger interrupt enabled"]
171    #[inline(always)]
172    pub fn enabled(self) -> &'a mut crate::W<REG> {
173        self.variant(TIE::Enabled)
174    }
175}
176#[doc = "Field `UDE` reader - Update DMA request enable"]
177pub type UDE_R = crate::BitReader<UDE>;
178#[doc = "Update DMA request enable\n\nValue on reset: 0"]
179#[derive(Clone, Copy, Debug, PartialEq, Eq)]
180pub enum UDE {
181    #[doc = "0: Update DMA request disabled"]
182    Disabled = 0,
183    #[doc = "1: Update DMA request enabled"]
184    Enabled = 1,
185}
186impl From<UDE> for bool {
187    #[inline(always)]
188    fn from(variant: UDE) -> Self {
189        variant as u8 != 0
190    }
191}
192impl UDE_R {
193    #[doc = "Get enumerated values variant"]
194    #[inline(always)]
195    pub const fn variant(&self) -> UDE {
196        match self.bits {
197            false => UDE::Disabled,
198            true => UDE::Enabled,
199        }
200    }
201    #[doc = "Update DMA request disabled"]
202    #[inline(always)]
203    pub fn is_disabled(&self) -> bool {
204        *self == UDE::Disabled
205    }
206    #[doc = "Update DMA request enabled"]
207    #[inline(always)]
208    pub fn is_enabled(&self) -> bool {
209        *self == UDE::Enabled
210    }
211}
212#[doc = "Field `UDE` writer - Update DMA request enable"]
213pub type UDE_W<'a, REG> = crate::BitWriter<'a, REG, UDE>;
214impl<'a, REG> UDE_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    #[doc = "Update DMA request disabled"]
219    #[inline(always)]
220    pub fn disabled(self) -> &'a mut crate::W<REG> {
221        self.variant(UDE::Disabled)
222    }
223    #[doc = "Update DMA request enabled"]
224    #[inline(always)]
225    pub fn enabled(self) -> &'a mut crate::W<REG> {
226        self.variant(UDE::Enabled)
227    }
228}
229#[doc = "Field `CC1DE` reader - Capture/Compare 1 DMA request enable"]
230pub type CC1DE_R = crate::BitReader<CC1DE>;
231#[doc = "Capture/Compare 1 DMA request enable\n\nValue on reset: 0"]
232#[derive(Clone, Copy, Debug, PartialEq, Eq)]
233pub enum CC1DE {
234    #[doc = "0: CCx DMA request disabled"]
235    Disabled = 0,
236    #[doc = "1: CCx DMA request enabled"]
237    Enabled = 1,
238}
239impl From<CC1DE> for bool {
240    #[inline(always)]
241    fn from(variant: CC1DE) -> Self {
242        variant as u8 != 0
243    }
244}
245impl CC1DE_R {
246    #[doc = "Get enumerated values variant"]
247    #[inline(always)]
248    pub const fn variant(&self) -> CC1DE {
249        match self.bits {
250            false => CC1DE::Disabled,
251            true => CC1DE::Enabled,
252        }
253    }
254    #[doc = "CCx DMA request disabled"]
255    #[inline(always)]
256    pub fn is_disabled(&self) -> bool {
257        *self == CC1DE::Disabled
258    }
259    #[doc = "CCx DMA request enabled"]
260    #[inline(always)]
261    pub fn is_enabled(&self) -> bool {
262        *self == CC1DE::Enabled
263    }
264}
265#[doc = "Field `CC1DE` writer - Capture/Compare 1 DMA request enable"]
266pub type CC1DE_W<'a, REG> = crate::BitWriter<'a, REG, CC1DE>;
267impl<'a, REG> CC1DE_W<'a, REG>
268where
269    REG: crate::Writable + crate::RegisterSpec,
270{
271    #[doc = "CCx DMA request disabled"]
272    #[inline(always)]
273    pub fn disabled(self) -> &'a mut crate::W<REG> {
274        self.variant(CC1DE::Disabled)
275    }
276    #[doc = "CCx DMA request enabled"]
277    #[inline(always)]
278    pub fn enabled(self) -> &'a mut crate::W<REG> {
279        self.variant(CC1DE::Enabled)
280    }
281}
282#[doc = "Field `CC2DE` reader - Capture/Compare 2 DMA request enable"]
283pub use CC1DE_R as CC2DE_R;
284#[doc = "Field `CC3DE` reader - Capture/Compare 3 DMA request enable"]
285pub use CC1DE_R as CC3DE_R;
286#[doc = "Field `CC4DE` reader - Capture/Compare 4 DMA request enable"]
287pub use CC1DE_R as CC4DE_R;
288#[doc = "Field `CC2DE` writer - Capture/Compare 2 DMA request enable"]
289pub use CC1DE_W as CC2DE_W;
290#[doc = "Field `CC3DE` writer - Capture/Compare 3 DMA request enable"]
291pub use CC1DE_W as CC3DE_W;
292#[doc = "Field `CC4DE` writer - Capture/Compare 4 DMA request enable"]
293pub use CC1DE_W as CC4DE_W;
294#[doc = "Field `TDE` reader - Trigger DMA request enable"]
295pub type TDE_R = crate::BitReader<TDE>;
296#[doc = "Trigger DMA request enable\n\nValue on reset: 0"]
297#[derive(Clone, Copy, Debug, PartialEq, Eq)]
298pub enum TDE {
299    #[doc = "0: Trigger DMA request disabled"]
300    Disabled = 0,
301    #[doc = "1: Trigger DMA request enabled"]
302    Enabled = 1,
303}
304impl From<TDE> for bool {
305    #[inline(always)]
306    fn from(variant: TDE) -> Self {
307        variant as u8 != 0
308    }
309}
310impl TDE_R {
311    #[doc = "Get enumerated values variant"]
312    #[inline(always)]
313    pub const fn variant(&self) -> TDE {
314        match self.bits {
315            false => TDE::Disabled,
316            true => TDE::Enabled,
317        }
318    }
319    #[doc = "Trigger DMA request disabled"]
320    #[inline(always)]
321    pub fn is_disabled(&self) -> bool {
322        *self == TDE::Disabled
323    }
324    #[doc = "Trigger DMA request enabled"]
325    #[inline(always)]
326    pub fn is_enabled(&self) -> bool {
327        *self == TDE::Enabled
328    }
329}
330#[doc = "Field `TDE` writer - Trigger DMA request enable"]
331pub type TDE_W<'a, REG> = crate::BitWriter<'a, REG, TDE>;
332impl<'a, REG> TDE_W<'a, REG>
333where
334    REG: crate::Writable + crate::RegisterSpec,
335{
336    #[doc = "Trigger DMA request disabled"]
337    #[inline(always)]
338    pub fn disabled(self) -> &'a mut crate::W<REG> {
339        self.variant(TDE::Disabled)
340    }
341    #[doc = "Trigger DMA request enabled"]
342    #[inline(always)]
343    pub fn enabled(self) -> &'a mut crate::W<REG> {
344        self.variant(TDE::Enabled)
345    }
346}
347#[doc = "Field `IDXIE` reader - Index interrupt enable"]
348pub type IDXIE_R = crate::BitReader<IDXIE>;
349#[doc = "Index interrupt enable\n\nValue on reset: 0"]
350#[derive(Clone, Copy, Debug, PartialEq, Eq)]
351pub enum IDXIE {
352    #[doc = "0: Index change interrupt disabled"]
353    Disabled = 0,
354    #[doc = "1: Index change interrupt enabled"]
355    Enabled = 1,
356}
357impl From<IDXIE> for bool {
358    #[inline(always)]
359    fn from(variant: IDXIE) -> Self {
360        variant as u8 != 0
361    }
362}
363impl IDXIE_R {
364    #[doc = "Get enumerated values variant"]
365    #[inline(always)]
366    pub const fn variant(&self) -> IDXIE {
367        match self.bits {
368            false => IDXIE::Disabled,
369            true => IDXIE::Enabled,
370        }
371    }
372    #[doc = "Index change interrupt disabled"]
373    #[inline(always)]
374    pub fn is_disabled(&self) -> bool {
375        *self == IDXIE::Disabled
376    }
377    #[doc = "Index change interrupt enabled"]
378    #[inline(always)]
379    pub fn is_enabled(&self) -> bool {
380        *self == IDXIE::Enabled
381    }
382}
383#[doc = "Field `IDXIE` writer - Index interrupt enable"]
384pub type IDXIE_W<'a, REG> = crate::BitWriter<'a, REG, IDXIE>;
385impl<'a, REG> IDXIE_W<'a, REG>
386where
387    REG: crate::Writable + crate::RegisterSpec,
388{
389    #[doc = "Index change interrupt disabled"]
390    #[inline(always)]
391    pub fn disabled(self) -> &'a mut crate::W<REG> {
392        self.variant(IDXIE::Disabled)
393    }
394    #[doc = "Index change interrupt enabled"]
395    #[inline(always)]
396    pub fn enabled(self) -> &'a mut crate::W<REG> {
397        self.variant(IDXIE::Enabled)
398    }
399}
400#[doc = "Field `DIRIE` reader - Direction change interrupt enable"]
401pub type DIRIE_R = crate::BitReader<DIRIE>;
402#[doc = "Direction change interrupt enable\n\nValue on reset: 0"]
403#[derive(Clone, Copy, Debug, PartialEq, Eq)]
404pub enum DIRIE {
405    #[doc = "0: Direction change interrupt disabled"]
406    Disabled = 0,
407    #[doc = "1: Direction change interrupt enabled"]
408    Enabled = 1,
409}
410impl From<DIRIE> for bool {
411    #[inline(always)]
412    fn from(variant: DIRIE) -> Self {
413        variant as u8 != 0
414    }
415}
416impl DIRIE_R {
417    #[doc = "Get enumerated values variant"]
418    #[inline(always)]
419    pub const fn variant(&self) -> DIRIE {
420        match self.bits {
421            false => DIRIE::Disabled,
422            true => DIRIE::Enabled,
423        }
424    }
425    #[doc = "Direction change interrupt disabled"]
426    #[inline(always)]
427    pub fn is_disabled(&self) -> bool {
428        *self == DIRIE::Disabled
429    }
430    #[doc = "Direction change interrupt enabled"]
431    #[inline(always)]
432    pub fn is_enabled(&self) -> bool {
433        *self == DIRIE::Enabled
434    }
435}
436#[doc = "Field `DIRIE` writer - Direction change interrupt enable"]
437pub type DIRIE_W<'a, REG> = crate::BitWriter<'a, REG, DIRIE>;
438impl<'a, REG> DIRIE_W<'a, REG>
439where
440    REG: crate::Writable + crate::RegisterSpec,
441{
442    #[doc = "Direction change interrupt disabled"]
443    #[inline(always)]
444    pub fn disabled(self) -> &'a mut crate::W<REG> {
445        self.variant(DIRIE::Disabled)
446    }
447    #[doc = "Direction change interrupt enabled"]
448    #[inline(always)]
449    pub fn enabled(self) -> &'a mut crate::W<REG> {
450        self.variant(DIRIE::Enabled)
451    }
452}
453#[doc = "Field `IERRIE` reader - Index error interrupt enable"]
454pub type IERRIE_R = crate::BitReader<IERRIE>;
455#[doc = "Index error interrupt enable\n\nValue on reset: 0"]
456#[derive(Clone, Copy, Debug, PartialEq, Eq)]
457pub enum IERRIE {
458    #[doc = "0: Index error interrupt disabled"]
459    Disabled = 0,
460    #[doc = "1: Index error interrupt enabled"]
461    Enabled = 1,
462}
463impl From<IERRIE> for bool {
464    #[inline(always)]
465    fn from(variant: IERRIE) -> Self {
466        variant as u8 != 0
467    }
468}
469impl IERRIE_R {
470    #[doc = "Get enumerated values variant"]
471    #[inline(always)]
472    pub const fn variant(&self) -> IERRIE {
473        match self.bits {
474            false => IERRIE::Disabled,
475            true => IERRIE::Enabled,
476        }
477    }
478    #[doc = "Index error interrupt disabled"]
479    #[inline(always)]
480    pub fn is_disabled(&self) -> bool {
481        *self == IERRIE::Disabled
482    }
483    #[doc = "Index error interrupt enabled"]
484    #[inline(always)]
485    pub fn is_enabled(&self) -> bool {
486        *self == IERRIE::Enabled
487    }
488}
489#[doc = "Field `IERRIE` writer - Index error interrupt enable"]
490pub type IERRIE_W<'a, REG> = crate::BitWriter<'a, REG, IERRIE>;
491impl<'a, REG> IERRIE_W<'a, REG>
492where
493    REG: crate::Writable + crate::RegisterSpec,
494{
495    #[doc = "Index error interrupt disabled"]
496    #[inline(always)]
497    pub fn disabled(self) -> &'a mut crate::W<REG> {
498        self.variant(IERRIE::Disabled)
499    }
500    #[doc = "Index error interrupt enabled"]
501    #[inline(always)]
502    pub fn enabled(self) -> &'a mut crate::W<REG> {
503        self.variant(IERRIE::Enabled)
504    }
505}
506#[doc = "Field `TERRIE` reader - Transition error interrupt enable"]
507pub type TERRIE_R = crate::BitReader<TERRIE>;
508#[doc = "Transition error interrupt enable\n\nValue on reset: 0"]
509#[derive(Clone, Copy, Debug, PartialEq, Eq)]
510pub enum TERRIE {
511    #[doc = "0: Transition error interrupt disabled"]
512    Disabled = 0,
513    #[doc = "1: Transition error interrupt enabled"]
514    Enabled = 1,
515}
516impl From<TERRIE> for bool {
517    #[inline(always)]
518    fn from(variant: TERRIE) -> Self {
519        variant as u8 != 0
520    }
521}
522impl TERRIE_R {
523    #[doc = "Get enumerated values variant"]
524    #[inline(always)]
525    pub const fn variant(&self) -> TERRIE {
526        match self.bits {
527            false => TERRIE::Disabled,
528            true => TERRIE::Enabled,
529        }
530    }
531    #[doc = "Transition error interrupt disabled"]
532    #[inline(always)]
533    pub fn is_disabled(&self) -> bool {
534        *self == TERRIE::Disabled
535    }
536    #[doc = "Transition error interrupt enabled"]
537    #[inline(always)]
538    pub fn is_enabled(&self) -> bool {
539        *self == TERRIE::Enabled
540    }
541}
542#[doc = "Field `TERRIE` writer - Transition error interrupt enable"]
543pub type TERRIE_W<'a, REG> = crate::BitWriter<'a, REG, TERRIE>;
544impl<'a, REG> TERRIE_W<'a, REG>
545where
546    REG: crate::Writable + crate::RegisterSpec,
547{
548    #[doc = "Transition error interrupt disabled"]
549    #[inline(always)]
550    pub fn disabled(self) -> &'a mut crate::W<REG> {
551        self.variant(TERRIE::Disabled)
552    }
553    #[doc = "Transition error interrupt enabled"]
554    #[inline(always)]
555    pub fn enabled(self) -> &'a mut crate::W<REG> {
556        self.variant(TERRIE::Enabled)
557    }
558}
559impl R {
560    #[doc = "Bit 0 - Update interrupt enable"]
561    #[inline(always)]
562    pub fn uie(&self) -> UIE_R {
563        UIE_R::new((self.bits & 1) != 0)
564    }
565    #[doc = "Bit 1 - Capture/Compare 1 interrupt enable"]
566    #[inline(always)]
567    pub fn cc1ie(&self) -> CC1IE_R {
568        CC1IE_R::new(((self.bits >> 1) & 1) != 0)
569    }
570    #[doc = "Bit 2 - Capture/Compare 2 interrupt enable"]
571    #[inline(always)]
572    pub fn cc2ie(&self) -> CC2IE_R {
573        CC2IE_R::new(((self.bits >> 2) & 1) != 0)
574    }
575    #[doc = "Bit 3 - Capture/Compare 3 interrupt enable"]
576    #[inline(always)]
577    pub fn cc3ie(&self) -> CC3IE_R {
578        CC3IE_R::new(((self.bits >> 3) & 1) != 0)
579    }
580    #[doc = "Bit 4 - Capture/Compare 4 interrupt enable"]
581    #[inline(always)]
582    pub fn cc4ie(&self) -> CC4IE_R {
583        CC4IE_R::new(((self.bits >> 4) & 1) != 0)
584    }
585    #[doc = "Bit 6 - Trigger interrupt enable"]
586    #[inline(always)]
587    pub fn tie(&self) -> TIE_R {
588        TIE_R::new(((self.bits >> 6) & 1) != 0)
589    }
590    #[doc = "Bit 8 - Update DMA request enable"]
591    #[inline(always)]
592    pub fn ude(&self) -> UDE_R {
593        UDE_R::new(((self.bits >> 8) & 1) != 0)
594    }
595    #[doc = "Bit 9 - Capture/Compare 1 DMA request enable"]
596    #[inline(always)]
597    pub fn cc1de(&self) -> CC1DE_R {
598        CC1DE_R::new(((self.bits >> 9) & 1) != 0)
599    }
600    #[doc = "Bit 10 - Capture/Compare 2 DMA request enable"]
601    #[inline(always)]
602    pub fn cc2de(&self) -> CC2DE_R {
603        CC2DE_R::new(((self.bits >> 10) & 1) != 0)
604    }
605    #[doc = "Bit 11 - Capture/Compare 3 DMA request enable"]
606    #[inline(always)]
607    pub fn cc3de(&self) -> CC3DE_R {
608        CC3DE_R::new(((self.bits >> 11) & 1) != 0)
609    }
610    #[doc = "Bit 12 - Capture/Compare 4 DMA request enable"]
611    #[inline(always)]
612    pub fn cc4de(&self) -> CC4DE_R {
613        CC4DE_R::new(((self.bits >> 12) & 1) != 0)
614    }
615    #[doc = "Bit 14 - Trigger DMA request enable"]
616    #[inline(always)]
617    pub fn tde(&self) -> TDE_R {
618        TDE_R::new(((self.bits >> 14) & 1) != 0)
619    }
620    #[doc = "Bit 20 - Index interrupt enable"]
621    #[inline(always)]
622    pub fn idxie(&self) -> IDXIE_R {
623        IDXIE_R::new(((self.bits >> 20) & 1) != 0)
624    }
625    #[doc = "Bit 21 - Direction change interrupt enable"]
626    #[inline(always)]
627    pub fn dirie(&self) -> DIRIE_R {
628        DIRIE_R::new(((self.bits >> 21) & 1) != 0)
629    }
630    #[doc = "Bit 22 - Index error interrupt enable"]
631    #[inline(always)]
632    pub fn ierrie(&self) -> IERRIE_R {
633        IERRIE_R::new(((self.bits >> 22) & 1) != 0)
634    }
635    #[doc = "Bit 23 - Transition error interrupt enable"]
636    #[inline(always)]
637    pub fn terrie(&self) -> TERRIE_R {
638        TERRIE_R::new(((self.bits >> 23) & 1) != 0)
639    }
640}
641impl W {
642    #[doc = "Bit 0 - Update interrupt enable"]
643    #[inline(always)]
644    #[must_use]
645    pub fn uie(&mut self) -> UIE_W<DIERrs> {
646        UIE_W::new(self, 0)
647    }
648    #[doc = "Bit 1 - Capture/Compare 1 interrupt enable"]
649    #[inline(always)]
650    #[must_use]
651    pub fn cc1ie(&mut self) -> CC1IE_W<DIERrs> {
652        CC1IE_W::new(self, 1)
653    }
654    #[doc = "Bit 2 - Capture/Compare 2 interrupt enable"]
655    #[inline(always)]
656    #[must_use]
657    pub fn cc2ie(&mut self) -> CC2IE_W<DIERrs> {
658        CC2IE_W::new(self, 2)
659    }
660    #[doc = "Bit 3 - Capture/Compare 3 interrupt enable"]
661    #[inline(always)]
662    #[must_use]
663    pub fn cc3ie(&mut self) -> CC3IE_W<DIERrs> {
664        CC3IE_W::new(self, 3)
665    }
666    #[doc = "Bit 4 - Capture/Compare 4 interrupt enable"]
667    #[inline(always)]
668    #[must_use]
669    pub fn cc4ie(&mut self) -> CC4IE_W<DIERrs> {
670        CC4IE_W::new(self, 4)
671    }
672    #[doc = "Bit 6 - Trigger interrupt enable"]
673    #[inline(always)]
674    #[must_use]
675    pub fn tie(&mut self) -> TIE_W<DIERrs> {
676        TIE_W::new(self, 6)
677    }
678    #[doc = "Bit 8 - Update DMA request enable"]
679    #[inline(always)]
680    #[must_use]
681    pub fn ude(&mut self) -> UDE_W<DIERrs> {
682        UDE_W::new(self, 8)
683    }
684    #[doc = "Bit 9 - Capture/Compare 1 DMA request enable"]
685    #[inline(always)]
686    #[must_use]
687    pub fn cc1de(&mut self) -> CC1DE_W<DIERrs> {
688        CC1DE_W::new(self, 9)
689    }
690    #[doc = "Bit 10 - Capture/Compare 2 DMA request enable"]
691    #[inline(always)]
692    #[must_use]
693    pub fn cc2de(&mut self) -> CC2DE_W<DIERrs> {
694        CC2DE_W::new(self, 10)
695    }
696    #[doc = "Bit 11 - Capture/Compare 3 DMA request enable"]
697    #[inline(always)]
698    #[must_use]
699    pub fn cc3de(&mut self) -> CC3DE_W<DIERrs> {
700        CC3DE_W::new(self, 11)
701    }
702    #[doc = "Bit 12 - Capture/Compare 4 DMA request enable"]
703    #[inline(always)]
704    #[must_use]
705    pub fn cc4de(&mut self) -> CC4DE_W<DIERrs> {
706        CC4DE_W::new(self, 12)
707    }
708    #[doc = "Bit 14 - Trigger DMA request enable"]
709    #[inline(always)]
710    #[must_use]
711    pub fn tde(&mut self) -> TDE_W<DIERrs> {
712        TDE_W::new(self, 14)
713    }
714    #[doc = "Bit 20 - Index interrupt enable"]
715    #[inline(always)]
716    #[must_use]
717    pub fn idxie(&mut self) -> IDXIE_W<DIERrs> {
718        IDXIE_W::new(self, 20)
719    }
720    #[doc = "Bit 21 - Direction change interrupt enable"]
721    #[inline(always)]
722    #[must_use]
723    pub fn dirie(&mut self) -> DIRIE_W<DIERrs> {
724        DIRIE_W::new(self, 21)
725    }
726    #[doc = "Bit 22 - Index error interrupt enable"]
727    #[inline(always)]
728    #[must_use]
729    pub fn ierrie(&mut self) -> IERRIE_W<DIERrs> {
730        IERRIE_W::new(self, 22)
731    }
732    #[doc = "Bit 23 - Transition error interrupt enable"]
733    #[inline(always)]
734    #[must_use]
735    pub fn terrie(&mut self) -> TERRIE_W<DIERrs> {
736        TERRIE_W::new(self, 23)
737    }
738    #[doc = r" Writes raw bits to the register."]
739    #[doc = r""]
740    #[doc = r" # Safety"]
741    #[doc = r""]
742    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
743    #[inline(always)]
744    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
745        self.bits = bits;
746        self
747    }
748}
749#[doc = "TIM5 DMA/Interrupt enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dier::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dier::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
750pub struct DIERrs;
751impl crate::RegisterSpec for DIERrs {
752    type Ux = u32;
753}
754#[doc = "`read()` method returns [`dier::R`](R) reader structure"]
755impl crate::Readable for DIERrs {}
756#[doc = "`write(|w| ..)` method takes [`dier::W`](W) writer structure"]
757impl crate::Writable for DIERrs {
758    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
759    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
760}
761#[doc = "`reset()` method sets DIER to value 0"]
762impl crate::Resettable for DIERrs {
763    const RESET_VALUE: u32 = 0;
764}
stm32h5/stm32h562/tim5/dier.rs

stm32h5/stm32h562/tim5/
dier.rs
