stm32g4 0.16.0

Device support crates for STM32G4 devices
Documentation 
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///Register `PARAM` reader
pub type R = crate::R<PARAMrs>;
///Register `PARAM` writer
pub type W = crate::W<PARAMrs>;
///Field `P` reader - P
pub type P_R = crate::FieldReader;
///Field `P` writer - P
pub type P_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
///Field `Q` reader - Q
pub type Q_R = crate::FieldReader;
///Field `Q` writer - Q
pub type Q_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
///Field `R` reader - R
pub type R_R = crate::FieldReader;
///Field `R` writer - R
pub type R_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
///Field `FUNC` reader - FUNC
pub type FUNC_R = crate::FieldReader;
///Field `FUNC` writer - FUNC
pub type FUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
///Field `START` reader - START
pub type START_R = crate::BitReader;
///Field `START` writer - START
pub type START_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    ///Bits 0:7 - P
    #[inline(always)]
    pub fn p(&self) -> P_R {
        P_R::new((self.bits & 0xff) as u8)
    }
    ///Bits 8:15 - Q
    #[inline(always)]
    pub fn q(&self) -> Q_R {
        Q_R::new(((self.bits >> 8) & 0xff) as u8)
    }
    ///Bits 16:23 - R
    #[inline(always)]
    pub fn r(&self) -> R_R {
        R_R::new(((self.bits >> 16) & 0xff) as u8)
    }
    ///Bits 24:30 - FUNC
    #[inline(always)]
    pub fn func(&self) -> FUNC_R {
        FUNC_R::new(((self.bits >> 24) & 0x7f) as u8)
    }
    ///Bit 31 - START
    #[inline(always)]
    pub fn start(&self) -> START_R {
        START_R::new(((self.bits >> 31) & 1) != 0)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("PARAM")
            .field("start", &self.start())
            .field("func", &self.func())
            .field("r", &self.r())
            .field("q", &self.q())
            .field("p", &self.p())
            .finish()
    }
}
impl W {
    ///Bits 0:7 - P
    #[inline(always)]
    pub fn p(&mut self) -> P_W<PARAMrs> {
        P_W::new(self, 0)
    }
    ///Bits 8:15 - Q
    #[inline(always)]
    pub fn q(&mut self) -> Q_W<PARAMrs> {
        Q_W::new(self, 8)
    }
    ///Bits 16:23 - R
    #[inline(always)]
    pub fn r(&mut self) -> R_W<PARAMrs> {
        R_W::new(self, 16)
    }
    ///Bits 24:30 - FUNC
    #[inline(always)]
    pub fn func(&mut self) -> FUNC_W<PARAMrs> {
        FUNC_W::new(self, 24)
    }
    ///Bit 31 - START
    #[inline(always)]
    pub fn start(&mut self) -> START_W<PARAMrs> {
        START_W::new(self, 31)
    }
}
/**FMAC Parameter register

You can [`read`](crate::Reg::read) this register and get [`param::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`param::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G483.html#FMAC:PARAM)*/
pub struct PARAMrs;
impl crate::RegisterSpec for PARAMrs {
    type Ux = u32;
}
///`read()` method returns [`param::R`](R) reader structure
impl crate::Readable for PARAMrs {}
///`write(|w| ..)` method takes [`param::W`](W) writer structure
impl crate::Writable for PARAMrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets PARAM to value 0
impl crate::Resettable for PARAMrs {}