#[doc = "Register `CR2` reader"]
pub struct R(crate::R<CR2_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CR2_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CR2_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CR2_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CR2` writer"]
pub struct W(crate::W<CR2_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CR2_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CR2_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CR2_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RXDMAEN` reader - Rx buffer DMA enable"]
pub struct RXDMAEN_R(crate::FieldReader<bool, bool>);
impl RXDMAEN_R {
pub(crate) fn new(bits: bool) -> Self {
RXDMAEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for RXDMAEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `RXDMAEN` writer - Rx buffer DMA enable"]
pub struct RXDMAEN_W<'a> {
w: &'a mut W,
}
impl<'a> RXDMAEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "Field `TXDMAEN` reader - Tx buffer DMA enable"]
pub struct TXDMAEN_R(crate::FieldReader<bool, bool>);
impl TXDMAEN_R {
pub(crate) fn new(bits: bool) -> Self {
TXDMAEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TXDMAEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TXDMAEN` writer - Tx buffer DMA enable"]
pub struct TXDMAEN_W<'a> {
w: &'a mut W,
}
impl<'a> TXDMAEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `SSOE` reader - SS output enable"]
pub struct SSOE_R(crate::FieldReader<bool, bool>);
impl SSOE_R {
pub(crate) fn new(bits: bool) -> Self {
SSOE_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for SSOE_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SSOE` writer - SS output enable"]
pub struct SSOE_W<'a> {
w: &'a mut W,
}
impl<'a> SSOE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `NSSP` reader - NSS pulse management"]
pub struct NSSP_R(crate::FieldReader<bool, bool>);
impl NSSP_R {
pub(crate) fn new(bits: bool) -> Self {
NSSP_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for NSSP_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `NSSP` writer - NSS pulse management"]
pub struct NSSP_W<'a> {
w: &'a mut W,
}
impl<'a> NSSP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "Field `FRF` reader - Frame format"]
pub struct FRF_R(crate::FieldReader<bool, bool>);
impl FRF_R {
pub(crate) fn new(bits: bool) -> Self {
FRF_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for FRF_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `FRF` writer - Frame format"]
pub struct FRF_W<'a> {
w: &'a mut W,
}
impl<'a> FRF_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `ERRIE` reader - Error interrupt enable"]
pub struct ERRIE_R(crate::FieldReader<bool, bool>);
impl ERRIE_R {
pub(crate) fn new(bits: bool) -> Self {
ERRIE_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for ERRIE_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `ERRIE` writer - Error interrupt enable"]
pub struct ERRIE_W<'a> {
w: &'a mut W,
}
impl<'a> ERRIE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `RXNEIE` reader - RX buffer not empty interrupt enable"]
pub struct RXNEIE_R(crate::FieldReader<bool, bool>);
impl RXNEIE_R {
pub(crate) fn new(bits: bool) -> Self {
RXNEIE_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for RXNEIE_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `RXNEIE` writer - RX buffer not empty interrupt enable"]
pub struct RXNEIE_W<'a> {
w: &'a mut W,
}
impl<'a> RXNEIE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "Field `TXEIE` reader - Tx buffer empty interrupt enable"]
pub struct TXEIE_R(crate::FieldReader<bool, bool>);
impl TXEIE_R {
pub(crate) fn new(bits: bool) -> Self {
TXEIE_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TXEIE_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TXEIE` writer - Tx buffer empty interrupt enable"]
pub struct TXEIE_W<'a> {
w: &'a mut W,
}
impl<'a> TXEIE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "Field `DS` reader - Data size"]
pub struct DS_R(crate::FieldReader<u8, u8>);
impl DS_R {
pub(crate) fn new(bits: u8) -> Self {
DS_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DS_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DS` writer - Data size"]
pub struct DS_W<'a> {
w: &'a mut W,
}
impl<'a> DS_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8);
self.w
}
}
#[doc = "Field `FRXTH` reader - FIFO reception threshold"]
pub struct FRXTH_R(crate::FieldReader<bool, bool>);
impl FRXTH_R {
pub(crate) fn new(bits: bool) -> Self {
FRXTH_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for FRXTH_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `FRXTH` writer - FIFO reception threshold"]
pub struct FRXTH_W<'a> {
w: &'a mut W,
}
impl<'a> FRXTH_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "Field `LDMA_RX` reader - Last DMA transfer for reception"]
pub struct LDMA_RX_R(crate::FieldReader<bool, bool>);
impl LDMA_RX_R {
pub(crate) fn new(bits: bool) -> Self {
LDMA_RX_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for LDMA_RX_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `LDMA_RX` writer - Last DMA transfer for reception"]
pub struct LDMA_RX_W<'a> {
w: &'a mut W,
}
impl<'a> LDMA_RX_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
self.w
}
}
#[doc = "Field `LDMA_TX` reader - Last DMA transfer for transmission"]
pub struct LDMA_TX_R(crate::FieldReader<bool, bool>);
impl LDMA_TX_R {
pub(crate) fn new(bits: bool) -> Self {
LDMA_TX_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for LDMA_TX_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `LDMA_TX` writer - Last DMA transfer for transmission"]
pub struct LDMA_TX_W<'a> {
w: &'a mut W,
}
impl<'a> LDMA_TX_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
self.w
}
}
impl R {
#[doc = "Bit 0 - Rx buffer DMA enable"]
#[inline(always)]
pub fn rxdmaen(&self) -> RXDMAEN_R {
RXDMAEN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - Tx buffer DMA enable"]
#[inline(always)]
pub fn txdmaen(&self) -> TXDMAEN_R {
TXDMAEN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - SS output enable"]
#[inline(always)]
pub fn ssoe(&self) -> SSOE_R {
SSOE_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - NSS pulse management"]
#[inline(always)]
pub fn nssp(&self) -> NSSP_R {
NSSP_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - Frame format"]
#[inline(always)]
pub fn frf(&self) -> FRF_R {
FRF_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - Error interrupt enable"]
#[inline(always)]
pub fn errie(&self) -> ERRIE_R {
ERRIE_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - RX buffer not empty interrupt enable"]
#[inline(always)]
pub fn rxneie(&self) -> RXNEIE_R {
RXNEIE_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - Tx buffer empty interrupt enable"]
#[inline(always)]
pub fn txeie(&self) -> TXEIE_R {
TXEIE_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bits 8:11 - Data size"]
#[inline(always)]
pub fn ds(&self) -> DS_R {
DS_R::new(((self.bits >> 8) & 0x0f) as u8)
}
#[doc = "Bit 12 - FIFO reception threshold"]
#[inline(always)]
pub fn frxth(&self) -> FRXTH_R {
FRXTH_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 13 - Last DMA transfer for reception"]
#[inline(always)]
pub fn ldma_rx(&self) -> LDMA_RX_R {
LDMA_RX_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 14 - Last DMA transfer for transmission"]
#[inline(always)]
pub fn ldma_tx(&self) -> LDMA_TX_R {
LDMA_TX_R::new(((self.bits >> 14) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - Rx buffer DMA enable"]
#[inline(always)]
pub fn rxdmaen(&mut self) -> RXDMAEN_W {
RXDMAEN_W { w: self }
}
#[doc = "Bit 1 - Tx buffer DMA enable"]
#[inline(always)]
pub fn txdmaen(&mut self) -> TXDMAEN_W {
TXDMAEN_W { w: self }
}
#[doc = "Bit 2 - SS output enable"]
#[inline(always)]
pub fn ssoe(&mut self) -> SSOE_W {
SSOE_W { w: self }
}
#[doc = "Bit 3 - NSS pulse management"]
#[inline(always)]
pub fn nssp(&mut self) -> NSSP_W {
NSSP_W { w: self }
}
#[doc = "Bit 4 - Frame format"]
#[inline(always)]
pub fn frf(&mut self) -> FRF_W {
FRF_W { w: self }
}
#[doc = "Bit 5 - Error interrupt enable"]
#[inline(always)]
pub fn errie(&mut self) -> ERRIE_W {
ERRIE_W { w: self }
}
#[doc = "Bit 6 - RX buffer not empty interrupt enable"]
#[inline(always)]
pub fn rxneie(&mut self) -> RXNEIE_W {
RXNEIE_W { w: self }
}
#[doc = "Bit 7 - Tx buffer empty interrupt enable"]
#[inline(always)]
pub fn txeie(&mut self) -> TXEIE_W {
TXEIE_W { w: self }
}
#[doc = "Bits 8:11 - Data size"]
#[inline(always)]
pub fn ds(&mut self) -> DS_W {
DS_W { w: self }
}
#[doc = "Bit 12 - FIFO reception threshold"]
#[inline(always)]
pub fn frxth(&mut self) -> FRXTH_W {
FRXTH_W { w: self }
}
#[doc = "Bit 13 - Last DMA transfer for reception"]
#[inline(always)]
pub fn ldma_rx(&mut self) -> LDMA_RX_W {
LDMA_RX_W { w: self }
}
#[doc = "Bit 14 - Last DMA transfer for transmission"]
#[inline(always)]
pub fn ldma_tx(&mut self) -> LDMA_TX_W {
LDMA_TX_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](index.html) module"]
pub struct CR2_SPEC;
impl crate::RegisterSpec for CR2_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [cr2::R](R) reader structure"]
impl crate::Readable for CR2_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [cr2::W](W) writer structure"]
impl crate::Writable for CR2_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CR2 to value 0x0700"]
impl crate::Resettable for CR2_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x0700
}
}