#[doc = "Reader of register EMR1"]
pub type R = crate::R<u32, super::EMR1>;
#[doc = "Writer for register EMR1"]
pub type W = crate::W<u32, super::EMR1>;
#[doc = "Register EMR1 `reset()`'s with value 0"]
impl crate::ResetValue for super::EMR1 {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "CPU wakeup with event mask on event input\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EM0_A {
#[doc = "0: Interrupt request line is masked"]
MASKED = 0,
#[doc = "1: Interrupt request line is unmasked"]
UNMASKED = 1,
}
impl From<EM0_A> for bool {
#[inline(always)]
fn from(variant: EM0_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `EM0`"]
pub type EM0_R = crate::R<bool, EM0_A>;
impl EM0_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EM0_A {
match self.bits {
false => EM0_A::MASKED,
true => EM0_A::UNMASKED,
}
}
#[doc = "Checks if the value of the field is `MASKED`"]
#[inline(always)]
pub fn is_masked(&self) -> bool {
*self == EM0_A::MASKED
}
#[doc = "Checks if the value of the field is `UNMASKED`"]
#[inline(always)]
pub fn is_unmasked(&self) -> bool {
*self == EM0_A::UNMASKED
}
}
#[doc = "Write proxy for field `EM0`"]
pub struct EM0_W<'a> {
w: &'a mut W,
}
impl<'a> EM0_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM0_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM1_A = EM0_A;
#[doc = "Reader of field `EM1`"]
pub type EM1_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM1`"]
pub struct EM1_W<'a> {
w: &'a mut W,
}
impl<'a> EM1_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM1_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM2_A = EM0_A;
#[doc = "Reader of field `EM2`"]
pub type EM2_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM2`"]
pub struct EM2_W<'a> {
w: &'a mut W,
}
impl<'a> EM2_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM2_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM3_A = EM0_A;
#[doc = "Reader of field `EM3`"]
pub type EM3_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM3`"]
pub struct EM3_W<'a> {
w: &'a mut W,
}
impl<'a> EM3_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM3_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM4_A = EM0_A;
#[doc = "Reader of field `EM4`"]
pub type EM4_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM4`"]
pub struct EM4_W<'a> {
w: &'a mut W,
}
impl<'a> EM4_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM4_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM5_A = EM0_A;
#[doc = "Reader of field `EM5`"]
pub type EM5_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM5`"]
pub struct EM5_W<'a> {
w: &'a mut W,
}
impl<'a> EM5_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM5_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM6_A = EM0_A;
#[doc = "Reader of field `EM6`"]
pub type EM6_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM6`"]
pub struct EM6_W<'a> {
w: &'a mut W,
}
impl<'a> EM6_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM6_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM7_A = EM0_A;
#[doc = "Reader of field `EM7`"]
pub type EM7_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM7`"]
pub struct EM7_W<'a> {
w: &'a mut W,
}
impl<'a> EM7_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM7_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM8_A = EM0_A;
#[doc = "Reader of field `EM8`"]
pub type EM8_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM8`"]
pub struct EM8_W<'a> {
w: &'a mut W,
}
impl<'a> EM8_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM8_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM9_A = EM0_A;
#[doc = "Reader of field `EM9`"]
pub type EM9_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM9`"]
pub struct EM9_W<'a> {
w: &'a mut W,
}
impl<'a> EM9_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM9_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM10_A = EM0_A;
#[doc = "Reader of field `EM10`"]
pub type EM10_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM10`"]
pub struct EM10_W<'a> {
w: &'a mut W,
}
impl<'a> EM10_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM10_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM11_A = EM0_A;
#[doc = "Reader of field `EM11`"]
pub type EM11_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM11`"]
pub struct EM11_W<'a> {
w: &'a mut W,
}
impl<'a> EM11_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM11_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM12_A = EM0_A;
#[doc = "Reader of field `EM12`"]
pub type EM12_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM12`"]
pub struct EM12_W<'a> {
w: &'a mut W,
}
impl<'a> EM12_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM12_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM13_A = EM0_A;
#[doc = "Reader of field `EM13`"]
pub type EM13_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM13`"]
pub struct EM13_W<'a> {
w: &'a mut W,
}
impl<'a> EM13_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM13_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM14_A = EM0_A;
#[doc = "Reader of field `EM14`"]
pub type EM14_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM14`"]
pub struct EM14_W<'a> {
w: &'a mut W,
}
impl<'a> EM14_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM14_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM15_A = EM0_A;
#[doc = "Reader of field `EM15`"]
pub type EM15_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM15`"]
pub struct EM15_W<'a> {
w: &'a mut W,
}
impl<'a> EM15_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM15_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM16_A = EM0_A;
#[doc = "Reader of field `EM16`"]
pub type EM16_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM16`"]
pub struct EM16_W<'a> {
w: &'a mut W,
}
impl<'a> EM16_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM16_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM17_A = EM0_A;
#[doc = "Reader of field `EM17`"]
pub type EM17_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM17`"]
pub struct EM17_W<'a> {
w: &'a mut W,
}
impl<'a> EM17_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM17_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM18_A = EM0_A;
#[doc = "Reader of field `EM18`"]
pub type EM18_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM18`"]
pub struct EM18_W<'a> {
w: &'a mut W,
}
impl<'a> EM18_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM18_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM19_A = EM0_A;
#[doc = "Reader of field `EM19`"]
pub type EM19_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM19`"]
pub struct EM19_W<'a> {
w: &'a mut W,
}
impl<'a> EM19_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM19_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM21_A = EM0_A;
#[doc = "Reader of field `EM21`"]
pub type EM21_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM21`"]
pub struct EM21_W<'a> {
w: &'a mut W,
}
impl<'a> EM21_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM21_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM23_A = EM0_A;
#[doc = "Reader of field `EM23`"]
pub type EM23_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM23`"]
pub struct EM23_W<'a> {
w: &'a mut W,
}
impl<'a> EM23_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM23_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM25_A = EM0_A;
#[doc = "Reader of field `EM25`"]
pub type EM25_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM25`"]
pub struct EM25_W<'a> {
w: &'a mut W,
}
impl<'a> EM25_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM25_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM26_A = EM0_A;
#[doc = "Reader of field `EM26`"]
pub type EM26_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM26`"]
pub struct EM26_W<'a> {
w: &'a mut W,
}
impl<'a> EM26_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM26_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM27_A = EM0_A;
#[doc = "Reader of field `EM27`"]
pub type EM27_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM27`"]
pub struct EM27_W<'a> {
w: &'a mut W,
}
impl<'a> EM27_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM27_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM28_A = EM0_A;
#[doc = "Reader of field `EM28`"]
pub type EM28_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM28`"]
pub struct EM28_W<'a> {
w: &'a mut W,
}
impl<'a> EM28_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM28_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM29_A = EM0_A;
#[doc = "Reader of field `EM29`"]
pub type EM29_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM29`"]
pub struct EM29_W<'a> {
w: &'a mut W,
}
impl<'a> EM29_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM29_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM30_A = EM0_A;
#[doc = "Reader of field `EM30`"]
pub type EM30_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM30`"]
pub struct EM30_W<'a> {
w: &'a mut W,
}
impl<'a> EM30_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM30_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
self.w
}
}
#[doc = "CPU wakeup with event mask on event input"]
pub type EM31_A = EM0_A;
#[doc = "Reader of field `EM31`"]
pub type EM31_R = crate::R<bool, EM0_A>;
#[doc = "Write proxy for field `EM31`"]
pub struct EM31_W<'a> {
w: &'a mut W,
}
impl<'a> EM31_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EM31_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Interrupt request line is masked"]
#[inline(always)]
pub fn masked(self) -> &'a mut W {
self.variant(EM0_A::MASKED)
}
#[doc = "Interrupt request line is unmasked"]
#[inline(always)]
pub fn unmasked(self) -> &'a mut W {
self.variant(EM0_A::UNMASKED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
impl R {
#[doc = "Bit 0 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em0(&self) -> EM0_R {
EM0_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em1(&self) -> EM1_R {
EM1_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em2(&self) -> EM2_R {
EM2_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em3(&self) -> EM3_R {
EM3_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em4(&self) -> EM4_R {
EM4_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em5(&self) -> EM5_R {
EM5_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em6(&self) -> EM6_R {
EM6_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em7(&self) -> EM7_R {
EM7_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em8(&self) -> EM8_R {
EM8_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em9(&self) -> EM9_R {
EM9_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em10(&self) -> EM10_R {
EM10_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 11 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em11(&self) -> EM11_R {
EM11_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 12 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em12(&self) -> EM12_R {
EM12_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 13 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em13(&self) -> EM13_R {
EM13_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 14 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em14(&self) -> EM14_R {
EM14_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em15(&self) -> EM15_R {
EM15_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em16(&self) -> EM16_R {
EM16_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em17(&self) -> EM17_R {
EM17_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em18(&self) -> EM18_R {
EM18_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 19 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em19(&self) -> EM19_R {
EM19_R::new(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 21 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em21(&self) -> EM21_R {
EM21_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 23 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em23(&self) -> EM23_R {
EM23_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 25 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em25(&self) -> EM25_R {
EM25_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 26 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em26(&self) -> EM26_R {
EM26_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 27 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em27(&self) -> EM27_R {
EM27_R::new(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 28 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em28(&self) -> EM28_R {
EM28_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 29 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em29(&self) -> EM29_R {
EM29_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 30 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em30(&self) -> EM30_R {
EM30_R::new(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em31(&self) -> EM31_R {
EM31_R::new(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em0(&mut self) -> EM0_W {
EM0_W { w: self }
}
#[doc = "Bit 1 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em1(&mut self) -> EM1_W {
EM1_W { w: self }
}
#[doc = "Bit 2 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em2(&mut self) -> EM2_W {
EM2_W { w: self }
}
#[doc = "Bit 3 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em3(&mut self) -> EM3_W {
EM3_W { w: self }
}
#[doc = "Bit 4 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em4(&mut self) -> EM4_W {
EM4_W { w: self }
}
#[doc = "Bit 5 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em5(&mut self) -> EM5_W {
EM5_W { w: self }
}
#[doc = "Bit 6 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em6(&mut self) -> EM6_W {
EM6_W { w: self }
}
#[doc = "Bit 7 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em7(&mut self) -> EM7_W {
EM7_W { w: self }
}
#[doc = "Bit 8 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em8(&mut self) -> EM8_W {
EM8_W { w: self }
}
#[doc = "Bit 9 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em9(&mut self) -> EM9_W {
EM9_W { w: self }
}
#[doc = "Bit 10 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em10(&mut self) -> EM10_W {
EM10_W { w: self }
}
#[doc = "Bit 11 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em11(&mut self) -> EM11_W {
EM11_W { w: self }
}
#[doc = "Bit 12 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em12(&mut self) -> EM12_W {
EM12_W { w: self }
}
#[doc = "Bit 13 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em13(&mut self) -> EM13_W {
EM13_W { w: self }
}
#[doc = "Bit 14 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em14(&mut self) -> EM14_W {
EM14_W { w: self }
}
#[doc = "Bit 15 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em15(&mut self) -> EM15_W {
EM15_W { w: self }
}
#[doc = "Bit 16 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em16(&mut self) -> EM16_W {
EM16_W { w: self }
}
#[doc = "Bit 17 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em17(&mut self) -> EM17_W {
EM17_W { w: self }
}
#[doc = "Bit 18 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em18(&mut self) -> EM18_W {
EM18_W { w: self }
}
#[doc = "Bit 19 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em19(&mut self) -> EM19_W {
EM19_W { w: self }
}
#[doc = "Bit 21 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em21(&mut self) -> EM21_W {
EM21_W { w: self }
}
#[doc = "Bit 23 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em23(&mut self) -> EM23_W {
EM23_W { w: self }
}
#[doc = "Bit 25 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em25(&mut self) -> EM25_W {
EM25_W { w: self }
}
#[doc = "Bit 26 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em26(&mut self) -> EM26_W {
EM26_W { w: self }
}
#[doc = "Bit 27 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em27(&mut self) -> EM27_W {
EM27_W { w: self }
}
#[doc = "Bit 28 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em28(&mut self) -> EM28_W {
EM28_W { w: self }
}
#[doc = "Bit 29 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em29(&mut self) -> EM29_W {
EM29_W { w: self }
}
#[doc = "Bit 30 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em30(&mut self) -> EM30_W {
EM30_W { w: self }
}
#[doc = "Bit 31 - CPU wakeup with event mask on event input"]
#[inline(always)]
pub fn em31(&mut self) -> EM31_W {
EM31_W { w: self }
}
}