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#[doc = "Reader of register CFGR"] pub type R = crate::R<u32, super::CFGR>; #[doc = "Writer for register CFGR"] pub type W = crate::W<u32, super::CFGR>; #[doc = "Register CFGR `reset()`'s with value 0"] impl crate::ResetValue for super::CFGR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `MCOPRE`"] pub type MCOPRE_R = crate::R<u8, u8>; #[doc = "Reader of field `MCOSEL`"] pub type MCOSEL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `MCOSEL`"] pub struct MCOSEL_W<'a> { w: &'a mut W, } impl<'a> MCOSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24); self.w } } #[doc = "Reader of field `PPRE`"] pub type PPRE_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PPRE`"] pub struct PPRE_W<'a> { w: &'a mut W, } impl<'a> PPRE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12); self.w } } #[doc = "Reader of field `HPRE`"] pub type HPRE_R = crate::R<u8, u8>; #[doc = "Write proxy for field `HPRE`"] pub struct HPRE_W<'a> { w: &'a mut W, } impl<'a> HPRE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8); self.w } } #[doc = "Reader of field `SWS`"] pub type SWS_R = crate::R<u8, u8>; #[doc = "Reader of field `SW`"] pub type SW_R = crate::R<u8, u8>; #[doc = "Write proxy for field `SW`"] pub struct SW_W<'a> { w: &'a mut W, } impl<'a> SW_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07); self.w } } impl R { #[doc = "Bits 28:30 - Microcontroller clock output prescaler"] #[inline(always)] pub fn mcopre(&self) -> MCOPRE_R { MCOPRE_R::new(((self.bits >> 28) & 0x07) as u8) } #[doc = "Bits 24:26 - Microcontroller clock output"] #[inline(always)] pub fn mcosel(&self) -> MCOSEL_R { MCOSEL_R::new(((self.bits >> 24) & 0x07) as u8) } #[doc = "Bits 12:14 - APB prescaler"] #[inline(always)] pub fn ppre(&self) -> PPRE_R { PPRE_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 8:11 - AHB prescaler"] #[inline(always)] pub fn hpre(&self) -> HPRE_R { HPRE_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 3:5 - System clock switch status"] #[inline(always)] pub fn sws(&self) -> SWS_R { SWS_R::new(((self.bits >> 3) & 0x07) as u8) } #[doc = "Bits 0:2 - System clock switch"] #[inline(always)] pub fn sw(&self) -> SW_R { SW_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bits 24:26 - Microcontroller clock output"] #[inline(always)] pub fn mcosel(&mut self) -> MCOSEL_W { MCOSEL_W { w: self } } #[doc = "Bits 12:14 - APB prescaler"] #[inline(always)] pub fn ppre(&mut self) -> PPRE_W { PPRE_W { w: self } } #[doc = "Bits 8:11 - AHB prescaler"] #[inline(always)] pub fn hpre(&mut self) -> HPRE_W { HPRE_W { w: self } } #[doc = "Bits 0:2 - System clock switch"] #[inline(always)] pub fn sw(&mut self) -> SW_W { SW_W { w: self } } }