stm32f7 0.16.0

Device support crates for STM32F7 devices
Documentation 
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///Register `DTIMER` reader
pub type R = crate::R<DTIMERrs>;
///Register `DTIMER` writer
pub type W = crate::W<DTIMERrs>;
///Field `DATATIME` reader - Data timeout period
pub type DATATIME_R = crate::FieldReader<u32>;
///Field `DATATIME` writer - Data timeout period
pub type DATATIME_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32, crate::Safe>;
impl R {
    ///Bits 0:31 - Data timeout period
    #[inline(always)]
    pub fn datatime(&self) -> DATATIME_R {
        DATATIME_R::new(self.bits)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DTIMER")
            .field("datatime", &self.datatime())
            .finish()
    }
}
impl W {
    ///Bits 0:31 - Data timeout period
    #[inline(always)]
    pub fn datatime(&mut self) -> DATATIME_W<DTIMERrs> {
        DATATIME_W::new(self, 0)
    }
}
/**data timer register

You can [`read`](crate::Reg::read) this register and get [`dtimer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtimer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F745.html#SDMMC1:DTIMER)*/
pub struct DTIMERrs;
impl crate::RegisterSpec for DTIMERrs {
    type Ux = u32;
}
///`read()` method returns [`dtimer::R`](R) reader structure
impl crate::Readable for DTIMERrs {}
///`write(|w| ..)` method takes [`dtimer::W`](W) writer structure
impl crate::Writable for DTIMERrs {
    type Safety = crate::Safe;
}
///`reset()` method sets DTIMER to value 0
impl crate::Resettable for DTIMERrs {}