#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::TIMINGR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = r"Value of the field"]
pub struct SCLLR {
bits: u8,
}
impl SCLLR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _SCLLW<'a> {
w: &'a mut W,
}
impl<'a> _SCLLW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0xff << 0);
self.w.bits |= ((value as u32) & 0xff) << 0;
self.w
}
}
#[doc = r"Value of the field"]
pub struct SCLHR {
bits: u8,
}
impl SCLHR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _SCLHW<'a> {
w: &'a mut W,
}
impl<'a> _SCLHW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0xff << 8);
self.w.bits |= ((value as u32) & 0xff) << 8;
self.w
}
}
#[doc = r"Value of the field"]
pub struct SDADELR {
bits: u8,
}
impl SDADELR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _SDADELW<'a> {
w: &'a mut W,
}
impl<'a> _SDADELW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 16);
self.w.bits |= ((value as u32) & 0x0f) << 16;
self.w
}
}
#[doc = r"Value of the field"]
pub struct SCLDELR {
bits: u8,
}
impl SCLDELR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _SCLDELW<'a> {
w: &'a mut W,
}
impl<'a> _SCLDELW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 20);
self.w.bits |= ((value as u32) & 0x0f) << 20;
self.w
}
}
#[doc = r"Value of the field"]
pub struct PRESCR {
bits: u8,
}
impl PRESCR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _PRESCW<'a> {
w: &'a mut W,
}
impl<'a> _PRESCW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 28);
self.w.bits |= ((value as u32) & 0x0f) << 28;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - SCL low period (master mode)"]
#[inline(always)]
pub fn scll(&self) -> SCLLR {
let bits = ((self.bits >> 0) & 0xff) as u8;
SCLLR { bits }
}
#[doc = "Bits 8:15 - SCL high period (master mode)"]
#[inline(always)]
pub fn sclh(&self) -> SCLHR {
let bits = ((self.bits >> 8) & 0xff) as u8;
SCLHR { bits }
}
#[doc = "Bits 16:19 - Data hold time"]
#[inline(always)]
pub fn sdadel(&self) -> SDADELR {
let bits = ((self.bits >> 16) & 0x0f) as u8;
SDADELR { bits }
}
#[doc = "Bits 20:23 - Data setup time"]
#[inline(always)]
pub fn scldel(&self) -> SCLDELR {
let bits = ((self.bits >> 20) & 0x0f) as u8;
SCLDELR { bits }
}
#[doc = "Bits 28:31 - Timing prescaler"]
#[inline(always)]
pub fn presc(&self) -> PRESCR {
let bits = ((self.bits >> 28) & 0x0f) as u8;
PRESCR { bits }
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - SCL low period (master mode)"]
#[inline(always)]
pub fn scll(&mut self) -> _SCLLW {
_SCLLW { w: self }
}
#[doc = "Bits 8:15 - SCL high period (master mode)"]
#[inline(always)]
pub fn sclh(&mut self) -> _SCLHW {
_SCLHW { w: self }
}
#[doc = "Bits 16:19 - Data hold time"]
#[inline(always)]
pub fn sdadel(&mut self) -> _SDADELW {
_SDADELW { w: self }
}
#[doc = "Bits 20:23 - Data setup time"]
#[inline(always)]
pub fn scldel(&mut self) -> _SCLDELW {
_SCLDELW { w: self }
}
#[doc = "Bits 28:31 - Timing prescaler"]
#[inline(always)]
pub fn presc(&mut self) -> _PRESCW {
_PRESCW { w: self }
}
}