#[doc = "Reader of register OTG_HS_GRSTCTL"]
pub type R = crate::R<u32, super::OTG_HS_GRSTCTL>;
#[doc = "Writer for register OTG_HS_GRSTCTL"]
pub type W = crate::W<u32, super::OTG_HS_GRSTCTL>;
#[doc = "Register OTG_HS_GRSTCTL `reset()`'s with value 0x2000_0000"]
impl crate::ResetValue for super::OTG_HS_GRSTCTL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0x2000_0000
}
}
#[doc = "Reader of field `CSRST`"]
pub type CSRST_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `CSRST`"]
pub struct CSRST_W<'a> {
w: &'a mut W,
}
impl<'a> CSRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Reader of field `HSRST`"]
pub type HSRST_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `HSRST`"]
pub struct HSRST_W<'a> {
w: &'a mut W,
}
impl<'a> HSRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `FCRST`"]
pub type FCRST_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `FCRST`"]
pub struct FCRST_W<'a> {
w: &'a mut W,
}
impl<'a> FCRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `RXFFLSH`"]
pub type RXFFLSH_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RXFFLSH`"]
pub struct RXFFLSH_W<'a> {
w: &'a mut W,
}
impl<'a> RXFFLSH_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Reader of field `TXFFLSH`"]
pub type TXFFLSH_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TXFFLSH`"]
pub struct TXFFLSH_W<'a> {
w: &'a mut W,
}
impl<'a> TXFFLSH_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Reader of field `TXFNUM`"]
pub type TXFNUM_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `TXFNUM`"]
pub struct TXFNUM_W<'a> {
w: &'a mut W,
}
impl<'a> TXFNUM_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 6)) | (((value as u32) & 0x1f) << 6);
self.w
}
}
#[doc = "Reader of field `AHBIDL`"]
pub type AHBIDL_R = crate::R<bool, bool>;
#[doc = "Reader of field `DMAREQ`"]
pub type DMAREQ_R = crate::R<bool, bool>;
impl R {
#[doc = "Bit 0 - Core soft reset"]
#[inline(always)]
pub fn csrst(&self) -> CSRST_R {
CSRST_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - HCLK soft reset"]
#[inline(always)]
pub fn hsrst(&self) -> HSRST_R {
HSRST_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - Host frame counter reset"]
#[inline(always)]
pub fn fcrst(&self) -> FCRST_R {
FCRST_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 4 - RxFIFO flush"]
#[inline(always)]
pub fn rxfflsh(&self) -> RXFFLSH_R {
RXFFLSH_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - TxFIFO flush"]
#[inline(always)]
pub fn txfflsh(&self) -> TXFFLSH_R {
TXFFLSH_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bits 6:10 - TxFIFO number"]
#[inline(always)]
pub fn txfnum(&self) -> TXFNUM_R {
TXFNUM_R::new(((self.bits >> 6) & 0x1f) as u8)
}
#[doc = "Bit 31 - AHB master idle"]
#[inline(always)]
pub fn ahbidl(&self) -> AHBIDL_R {
AHBIDL_R::new(((self.bits >> 31) & 0x01) != 0)
}
#[doc = "Bit 30 - DMA request signal enabled for USB OTG HS"]
#[inline(always)]
pub fn dmareq(&self) -> DMAREQ_R {
DMAREQ_R::new(((self.bits >> 30) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - Core soft reset"]
#[inline(always)]
pub fn csrst(&mut self) -> CSRST_W {
CSRST_W { w: self }
}
#[doc = "Bit 1 - HCLK soft reset"]
#[inline(always)]
pub fn hsrst(&mut self) -> HSRST_W {
HSRST_W { w: self }
}
#[doc = "Bit 2 - Host frame counter reset"]
#[inline(always)]
pub fn fcrst(&mut self) -> FCRST_W {
FCRST_W { w: self }
}
#[doc = "Bit 4 - RxFIFO flush"]
#[inline(always)]
pub fn rxfflsh(&mut self) -> RXFFLSH_W {
RXFFLSH_W { w: self }
}
#[doc = "Bit 5 - TxFIFO flush"]
#[inline(always)]
pub fn txfflsh(&mut self) -> TXFFLSH_W {
TXFFLSH_W { w: self }
}
#[doc = "Bits 6:10 - TxFIFO number"]
#[inline(always)]
pub fn txfnum(&mut self) -> TXFNUM_W {
TXFNUM_W { w: self }
}
}