stm32f429/i2c3/
oar2.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::OAR2 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct ADD2R {
47    bits: u8,
48}
49impl ADD2R {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u8 {
53        self.bits
54    }
55}
56#[doc = r" Value of the field"]
57pub struct ENDUALR {
58    bits: bool,
59}
60impl ENDUALR {
61    #[doc = r" Value of the field as raw bits"]
62    #[inline]
63    pub fn bit(&self) -> bool {
64        self.bits
65    }
66    #[doc = r" Returns `true` if the bit is clear (0)"]
67    #[inline]
68    pub fn bit_is_clear(&self) -> bool {
69        !self.bit()
70    }
71    #[doc = r" Returns `true` if the bit is set (1)"]
72    #[inline]
73    pub fn bit_is_set(&self) -> bool {
74        self.bit()
75    }
76}
77#[doc = r" Proxy"]
78pub struct _ADD2W<'a> {
79    w: &'a mut W,
80}
81impl<'a> _ADD2W<'a> {
82    #[doc = r" Writes raw bits to the field"]
83    #[inline]
84    pub unsafe fn bits(self, value: u8) -> &'a mut W {
85        const MASK: u8 = 127;
86        const OFFSET: u8 = 1;
87        self.w.bits &= !((MASK as u32) << OFFSET);
88        self.w.bits |= ((value & MASK) as u32) << OFFSET;
89        self.w
90    }
91}
92#[doc = r" Proxy"]
93pub struct _ENDUALW<'a> {
94    w: &'a mut W,
95}
96impl<'a> _ENDUALW<'a> {
97    #[doc = r" Sets the field bit"]
98    pub fn set_bit(self) -> &'a mut W {
99        self.bit(true)
100    }
101    #[doc = r" Clears the field bit"]
102    pub fn clear_bit(self) -> &'a mut W {
103        self.bit(false)
104    }
105    #[doc = r" Writes raw bits to the field"]
106    #[inline]
107    pub fn bit(self, value: bool) -> &'a mut W {
108        const MASK: bool = true;
109        const OFFSET: u8 = 0;
110        self.w.bits &= !((MASK as u32) << OFFSET);
111        self.w.bits |= ((value & MASK) as u32) << OFFSET;
112        self.w
113    }
114}
115impl R {
116    #[doc = r" Value of the register as raw bits"]
117    #[inline]
118    pub fn bits(&self) -> u32 {
119        self.bits
120    }
121    #[doc = "Bits 1:7 - Interface address"]
122    #[inline]
123    pub fn add2(&self) -> ADD2R {
124        let bits = {
125            const MASK: u8 = 127;
126            const OFFSET: u8 = 1;
127            ((self.bits >> OFFSET) & MASK as u32) as u8
128        };
129        ADD2R { bits }
130    }
131    #[doc = "Bit 0 - Dual addressing mode enable"]
132    #[inline]
133    pub fn endual(&self) -> ENDUALR {
134        let bits = {
135            const MASK: bool = true;
136            const OFFSET: u8 = 0;
137            ((self.bits >> OFFSET) & MASK as u32) != 0
138        };
139        ENDUALR { bits }
140    }
141}
142impl W {
143    #[doc = r" Reset value of the register"]
144    #[inline]
145    pub fn reset_value() -> W {
146        W { bits: 0 }
147    }
148    #[doc = r" Writes raw bits to the register"]
149    #[inline]
150    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
151        self.bits = bits;
152        self
153    }
154    #[doc = "Bits 1:7 - Interface address"]
155    #[inline]
156    pub fn add2(&mut self) -> _ADD2W {
157        _ADD2W { w: self }
158    }
159    #[doc = "Bit 0 - Dual addressing mode enable"]
160    #[inline]
161    pub fn endual(&mut self) -> _ENDUALW {
162        _ENDUALW { w: self }
163    }
164}
stm32f429/i2c3/oar2.rs

stm32f429/i2c3/
oar2.rs
