1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::S6FCR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct FEIER {
47 bits: bool,
48}
49impl FEIER {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct FSR {
68 bits: u8,
69}
70impl FSR {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bits(&self) -> u8 {
74 self.bits
75 }
76}
77#[doc = r" Value of the field"]
78pub struct DMDISR {
79 bits: bool,
80}
81impl DMDISR {
82 #[doc = r" Value of the field as raw bits"]
83 #[inline]
84 pub fn bit(&self) -> bool {
85 self.bits
86 }
87 #[doc = r" Returns `true` if the bit is clear (0)"]
88 #[inline]
89 pub fn bit_is_clear(&self) -> bool {
90 !self.bit()
91 }
92 #[doc = r" Returns `true` if the bit is set (1)"]
93 #[inline]
94 pub fn bit_is_set(&self) -> bool {
95 self.bit()
96 }
97}
98#[doc = r" Value of the field"]
99pub struct FTHR {
100 bits: u8,
101}
102impl FTHR {
103 #[doc = r" Value of the field as raw bits"]
104 #[inline]
105 pub fn bits(&self) -> u8 {
106 self.bits
107 }
108}
109#[doc = r" Proxy"]
110pub struct _FEIEW<'a> {
111 w: &'a mut W,
112}
113impl<'a> _FEIEW<'a> {
114 #[doc = r" Sets the field bit"]
115 pub fn set_bit(self) -> &'a mut W {
116 self.bit(true)
117 }
118 #[doc = r" Clears the field bit"]
119 pub fn clear_bit(self) -> &'a mut W {
120 self.bit(false)
121 }
122 #[doc = r" Writes raw bits to the field"]
123 #[inline]
124 pub fn bit(self, value: bool) -> &'a mut W {
125 const MASK: bool = true;
126 const OFFSET: u8 = 7;
127 self.w.bits &= !((MASK as u32) << OFFSET);
128 self.w.bits |= ((value & MASK) as u32) << OFFSET;
129 self.w
130 }
131}
132#[doc = r" Proxy"]
133pub struct _DMDISW<'a> {
134 w: &'a mut W,
135}
136impl<'a> _DMDISW<'a> {
137 #[doc = r" Sets the field bit"]
138 pub fn set_bit(self) -> &'a mut W {
139 self.bit(true)
140 }
141 #[doc = r" Clears the field bit"]
142 pub fn clear_bit(self) -> &'a mut W {
143 self.bit(false)
144 }
145 #[doc = r" Writes raw bits to the field"]
146 #[inline]
147 pub fn bit(self, value: bool) -> &'a mut W {
148 const MASK: bool = true;
149 const OFFSET: u8 = 2;
150 self.w.bits &= !((MASK as u32) << OFFSET);
151 self.w.bits |= ((value & MASK) as u32) << OFFSET;
152 self.w
153 }
154}
155#[doc = r" Proxy"]
156pub struct _FTHW<'a> {
157 w: &'a mut W,
158}
159impl<'a> _FTHW<'a> {
160 #[doc = r" Writes raw bits to the field"]
161 #[inline]
162 pub unsafe fn bits(self, value: u8) -> &'a mut W {
163 const MASK: u8 = 3;
164 const OFFSET: u8 = 0;
165 self.w.bits &= !((MASK as u32) << OFFSET);
166 self.w.bits |= ((value & MASK) as u32) << OFFSET;
167 self.w
168 }
169}
170impl R {
171 #[doc = r" Value of the register as raw bits"]
172 #[inline]
173 pub fn bits(&self) -> u32 {
174 self.bits
175 }
176 #[doc = "Bit 7 - FIFO error interrupt enable"]
177 #[inline]
178 pub fn feie(&self) -> FEIER {
179 let bits = {
180 const MASK: bool = true;
181 const OFFSET: u8 = 7;
182 ((self.bits >> OFFSET) & MASK as u32) != 0
183 };
184 FEIER { bits }
185 }
186 #[doc = "Bits 3:5 - FIFO status"]
187 #[inline]
188 pub fn fs(&self) -> FSR {
189 let bits = {
190 const MASK: u8 = 7;
191 const OFFSET: u8 = 3;
192 ((self.bits >> OFFSET) & MASK as u32) as u8
193 };
194 FSR { bits }
195 }
196 #[doc = "Bit 2 - Direct mode disable"]
197 #[inline]
198 pub fn dmdis(&self) -> DMDISR {
199 let bits = {
200 const MASK: bool = true;
201 const OFFSET: u8 = 2;
202 ((self.bits >> OFFSET) & MASK as u32) != 0
203 };
204 DMDISR { bits }
205 }
206 #[doc = "Bits 0:1 - FIFO threshold selection"]
207 #[inline]
208 pub fn fth(&self) -> FTHR {
209 let bits = {
210 const MASK: u8 = 3;
211 const OFFSET: u8 = 0;
212 ((self.bits >> OFFSET) & MASK as u32) as u8
213 };
214 FTHR { bits }
215 }
216}
217impl W {
218 #[doc = r" Reset value of the register"]
219 #[inline]
220 pub fn reset_value() -> W {
221 W { bits: 33 }
222 }
223 #[doc = r" Writes raw bits to the register"]
224 #[inline]
225 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
226 self.bits = bits;
227 self
228 }
229 #[doc = "Bit 7 - FIFO error interrupt enable"]
230 #[inline]
231 pub fn feie(&mut self) -> _FEIEW {
232 _FEIEW { w: self }
233 }
234 #[doc = "Bit 2 - Direct mode disable"]
235 #[inline]
236 pub fn dmdis(&mut self) -> _DMDISW {
237 _DMDISW { w: self }
238 }
239 #[doc = "Bits 0:1 - FIFO threshold selection"]
240 #[inline]
241 pub fn fth(&mut self) -> _FTHW {
242 _FTHW { w: self }
243 }
244}