stm32f429/tim5/
cr2.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CR2 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct TI1SR {
47    bits: bool,
48}
49impl TI1SR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct MMSR {
68    bits: u8,
69}
70impl MMSR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bits(&self) -> u8 {
74        self.bits
75    }
76}
77#[doc = r" Value of the field"]
78pub struct CCDSR {
79    bits: bool,
80}
81impl CCDSR {
82    #[doc = r" Value of the field as raw bits"]
83    #[inline]
84    pub fn bit(&self) -> bool {
85        self.bits
86    }
87    #[doc = r" Returns `true` if the bit is clear (0)"]
88    #[inline]
89    pub fn bit_is_clear(&self) -> bool {
90        !self.bit()
91    }
92    #[doc = r" Returns `true` if the bit is set (1)"]
93    #[inline]
94    pub fn bit_is_set(&self) -> bool {
95        self.bit()
96    }
97}
98#[doc = r" Proxy"]
99pub struct _TI1SW<'a> {
100    w: &'a mut W,
101}
102impl<'a> _TI1SW<'a> {
103    #[doc = r" Sets the field bit"]
104    pub fn set_bit(self) -> &'a mut W {
105        self.bit(true)
106    }
107    #[doc = r" Clears the field bit"]
108    pub fn clear_bit(self) -> &'a mut W {
109        self.bit(false)
110    }
111    #[doc = r" Writes raw bits to the field"]
112    #[inline]
113    pub fn bit(self, value: bool) -> &'a mut W {
114        const MASK: bool = true;
115        const OFFSET: u8 = 7;
116        self.w.bits &= !((MASK as u32) << OFFSET);
117        self.w.bits |= ((value & MASK) as u32) << OFFSET;
118        self.w
119    }
120}
121#[doc = r" Proxy"]
122pub struct _MMSW<'a> {
123    w: &'a mut W,
124}
125impl<'a> _MMSW<'a> {
126    #[doc = r" Writes raw bits to the field"]
127    #[inline]
128    pub unsafe fn bits(self, value: u8) -> &'a mut W {
129        const MASK: u8 = 7;
130        const OFFSET: u8 = 4;
131        self.w.bits &= !((MASK as u32) << OFFSET);
132        self.w.bits |= ((value & MASK) as u32) << OFFSET;
133        self.w
134    }
135}
136#[doc = r" Proxy"]
137pub struct _CCDSW<'a> {
138    w: &'a mut W,
139}
140impl<'a> _CCDSW<'a> {
141    #[doc = r" Sets the field bit"]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r" Clears the field bit"]
146    pub fn clear_bit(self) -> &'a mut W {
147        self.bit(false)
148    }
149    #[doc = r" Writes raw bits to the field"]
150    #[inline]
151    pub fn bit(self, value: bool) -> &'a mut W {
152        const MASK: bool = true;
153        const OFFSET: u8 = 3;
154        self.w.bits &= !((MASK as u32) << OFFSET);
155        self.w.bits |= ((value & MASK) as u32) << OFFSET;
156        self.w
157    }
158}
159impl R {
160    #[doc = r" Value of the register as raw bits"]
161    #[inline]
162    pub fn bits(&self) -> u32 {
163        self.bits
164    }
165    #[doc = "Bit 7 - TI1 selection"]
166    #[inline]
167    pub fn ti1s(&self) -> TI1SR {
168        let bits = {
169            const MASK: bool = true;
170            const OFFSET: u8 = 7;
171            ((self.bits >> OFFSET) & MASK as u32) != 0
172        };
173        TI1SR { bits }
174    }
175    #[doc = "Bits 4:6 - Master mode selection"]
176    #[inline]
177    pub fn mms(&self) -> MMSR {
178        let bits = {
179            const MASK: u8 = 7;
180            const OFFSET: u8 = 4;
181            ((self.bits >> OFFSET) & MASK as u32) as u8
182        };
183        MMSR { bits }
184    }
185    #[doc = "Bit 3 - Capture/compare DMA selection"]
186    #[inline]
187    pub fn ccds(&self) -> CCDSR {
188        let bits = {
189            const MASK: bool = true;
190            const OFFSET: u8 = 3;
191            ((self.bits >> OFFSET) & MASK as u32) != 0
192        };
193        CCDSR { bits }
194    }
195}
196impl W {
197    #[doc = r" Reset value of the register"]
198    #[inline]
199    pub fn reset_value() -> W {
200        W { bits: 0 }
201    }
202    #[doc = r" Writes raw bits to the register"]
203    #[inline]
204    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
205        self.bits = bits;
206        self
207    }
208    #[doc = "Bit 7 - TI1 selection"]
209    #[inline]
210    pub fn ti1s(&mut self) -> _TI1SW {
211        _TI1SW { w: self }
212    }
213    #[doc = "Bits 4:6 - Master mode selection"]
214    #[inline]
215    pub fn mms(&mut self) -> _MMSW {
216        _MMSW { w: self }
217    }
218    #[doc = "Bit 3 - Capture/compare DMA selection"]
219    #[inline]
220    pub fn ccds(&mut self) -> _CCDSW {
221        _CCDSW { w: self }
222    }
223}
stm32f429/tim5/cr2.rs

stm32f429/tim5/
cr2.rs
