#[doc = r" Value read from the register"]
pub struct R {
    bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
    bits: u32,
}
impl super::CCR {
    #[doc = r" Modifies the contents of the register"]
    #[inline]
    pub fn modify<F>(&self, f: F)
    where
        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
    {
        let bits = self.register.get();
        let r = R { bits: bits };
        let mut w = W { bits: bits };
        f(&r, &mut w);
        self.register.set(w.bits);
    }
    #[doc = r" Reads the contents of the register"]
    #[inline]
    pub fn read(&self) -> R {
        R {
            bits: self.register.get(),
        }
    }
    #[doc = r" Writes to the register"]
    #[inline]
    pub fn write<F>(&self, f: F)
    where
        F: FnOnce(&mut W) -> &mut W,
    {
        let mut w = W::reset_value();
        f(&mut w);
        self.register.set(w.bits);
    }
    #[doc = r" Writes the reset value to the register"]
    #[inline]
    pub fn reset(&self) {
        self.write(|w| w)
    }
}
#[doc = "Possible values of the field `TSVREFE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TSVREFER {
    #[doc = "Temperature sensor and V_REFINT channel disabled"]
    DISABLED,
    #[doc = "Temperature sensor and V_REFINT channel enabled"]
    ENABLED,
}
impl TSVREFER {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            TSVREFER::DISABLED => false,
            TSVREFER::ENABLED => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> TSVREFER {
        match value {
            false => TSVREFER::DISABLED,
            true => TSVREFER::ENABLED,
        }
    }
    #[doc = "Checks if the value of the field is `DISABLED`"]
    #[inline]
    pub fn is_disabled(&self) -> bool {
        *self == TSVREFER::DISABLED
    }
    #[doc = "Checks if the value of the field is `ENABLED`"]
    #[inline]
    pub fn is_enabled(&self) -> bool {
        *self == TSVREFER::ENABLED
    }
}
#[doc = "Possible values of the field `VBATE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VBATER {
    #[doc = "V_BAT channel disabled"]
    DISABLED,
    #[doc = "V_BAT channel enabled"]
    ENABLED,
}
impl VBATER {
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        match *self {
            VBATER::DISABLED => false,
            VBATER::ENABLED => true,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: bool) -> VBATER {
        match value {
            false => VBATER::DISABLED,
            true => VBATER::ENABLED,
        }
    }
    #[doc = "Checks if the value of the field is `DISABLED`"]
    #[inline]
    pub fn is_disabled(&self) -> bool {
        *self == VBATER::DISABLED
    }
    #[doc = "Checks if the value of the field is `ENABLED`"]
    #[inline]
    pub fn is_enabled(&self) -> bool {
        *self == VBATER::ENABLED
    }
}
#[doc = "Possible values of the field `ADCPRE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ADCPRER {
    #[doc = "PCLK2 divided by 2"]
    DIV2,
    #[doc = "PCLK2 divided by 4"]
    DIV4,
    #[doc = "PCLK2 divided by 6"]
    DIV6,
    #[doc = "PCLK2 divided by 8"]
    DIV8,
}
impl ADCPRER {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        match *self {
            ADCPRER::DIV2 => 0,
            ADCPRER::DIV4 => 1,
            ADCPRER::DIV6 => 2,
            ADCPRER::DIV8 => 3,
        }
    }
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _from(value: u8) -> ADCPRER {
        match value {
            0 => ADCPRER::DIV2,
            1 => ADCPRER::DIV4,
            2 => ADCPRER::DIV6,
            3 => ADCPRER::DIV8,
            _ => unreachable!(),
        }
    }
    #[doc = "Checks if the value of the field is `DIV2`"]
    #[inline]
    pub fn is_div2(&self) -> bool {
        *self == ADCPRER::DIV2
    }
    #[doc = "Checks if the value of the field is `DIV4`"]
    #[inline]
    pub fn is_div4(&self) -> bool {
        *self == ADCPRER::DIV4
    }
    #[doc = "Checks if the value of the field is `DIV6`"]
    #[inline]
    pub fn is_div6(&self) -> bool {
        *self == ADCPRER::DIV6
    }
    #[doc = "Checks if the value of the field is `DIV8`"]
    #[inline]
    pub fn is_div8(&self) -> bool {
        *self == ADCPRER::DIV8
    }
}
#[doc = r" Value of the field"]
pub struct DMAR {
    bits: u8,
}
impl DMAR {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        self.bits
    }
}
#[doc = r" Value of the field"]
pub struct DDSR {
    bits: bool,
}
impl DDSR {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bit(&self) -> bool {
        self.bits
    }
    #[doc = r" Returns `true` if the bit is clear (0)"]
    #[inline]
    pub fn bit_is_clear(&self) -> bool {
        !self.bit()
    }
    #[doc = r" Returns `true` if the bit is set (1)"]
    #[inline]
    pub fn bit_is_set(&self) -> bool {
        self.bit()
    }
}
#[doc = r" Value of the field"]
pub struct DELAYR {
    bits: u8,
}
impl DELAYR {
    #[doc = r" Value of the field as raw bits"]
    #[inline]
    pub fn bits(&self) -> u8 {
        self.bits
    }
}
#[doc = "Values that can be written to the field `TSVREFE`"]
pub enum TSVREFEW {
    #[doc = "Temperature sensor and V_REFINT channel disabled"]
    DISABLED,
    #[doc = "Temperature sensor and V_REFINT channel enabled"]
    ENABLED,
}
impl TSVREFEW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            TSVREFEW::DISABLED => false,
            TSVREFEW::ENABLED => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _TSVREFEW<'a> {
    w: &'a mut W,
}
impl<'a> _TSVREFEW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: TSVREFEW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "Temperature sensor and V_REFINT channel disabled"]
    #[inline]
    pub fn disabled(self) -> &'a mut W {
        self.variant(TSVREFEW::DISABLED)
    }
    #[doc = "Temperature sensor and V_REFINT channel enabled"]
    #[inline]
    pub fn enabled(self) -> &'a mut W {
        self.variant(TSVREFEW::ENABLED)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 23;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `VBATE`"]
pub enum VBATEW {
    #[doc = "V_BAT channel disabled"]
    DISABLED,
    #[doc = "V_BAT channel enabled"]
    ENABLED,
}
impl VBATEW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            VBATEW::DISABLED => false,
            VBATEW::ENABLED => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _VBATEW<'a> {
    w: &'a mut W,
}
impl<'a> _VBATEW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: VBATEW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "V_BAT channel disabled"]
    #[inline]
    pub fn disabled(self) -> &'a mut W {
        self.variant(VBATEW::DISABLED)
    }
    #[doc = "V_BAT channel enabled"]
    #[inline]
    pub fn enabled(self) -> &'a mut W {
        self.variant(VBATEW::ENABLED)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 22;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `ADCPRE`"]
pub enum ADCPREW {
    #[doc = "PCLK2 divided by 2"]
    DIV2,
    #[doc = "PCLK2 divided by 4"]
    DIV4,
    #[doc = "PCLK2 divided by 6"]
    DIV6,
    #[doc = "PCLK2 divided by 8"]
    DIV8,
}
impl ADCPREW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> u8 {
        match *self {
            ADCPREW::DIV2 => 0,
            ADCPREW::DIV4 => 1,
            ADCPREW::DIV6 => 2,
            ADCPREW::DIV8 => 3,
        }
    }
}
#[doc = r" Proxy"]
pub struct _ADCPREW<'a> {
    w: &'a mut W,
}
impl<'a> _ADCPREW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: ADCPREW) -> &'a mut W {
        {
            self.bits(variant._bits())
        }
    }
    #[doc = "PCLK2 divided by 2"]
    #[inline]
    pub fn div2(self) -> &'a mut W {
        self.variant(ADCPREW::DIV2)
    }
    #[doc = "PCLK2 divided by 4"]
    #[inline]
    pub fn div4(self) -> &'a mut W {
        self.variant(ADCPREW::DIV4)
    }
    #[doc = "PCLK2 divided by 6"]
    #[inline]
    pub fn div6(self) -> &'a mut W {
        self.variant(ADCPREW::DIV6)
    }
    #[doc = "PCLK2 divided by 8"]
    #[inline]
    pub fn div8(self) -> &'a mut W {
        self.variant(ADCPREW::DIV8)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bits(self, value: u8) -> &'a mut W {
        const MASK: u8 = 3;
        const OFFSET: u8 = 16;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = r" Proxy"]
pub struct _DMAW<'a> {
    w: &'a mut W,
}
impl<'a> _DMAW<'a> {
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        const MASK: u8 = 3;
        const OFFSET: u8 = 14;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = r" Proxy"]
pub struct _DDSW<'a> {
    w: &'a mut W,
}
impl<'a> _DDSW<'a> {
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 13;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = r" Proxy"]
pub struct _DELAYW<'a> {
    w: &'a mut W,
}
impl<'a> _DELAYW<'a> {
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        const MASK: u8 = 15;
        const OFFSET: u8 = 8;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
impl R {
    #[doc = r" Value of the register as raw bits"]
    #[inline]
    pub fn bits(&self) -> u32 {
        self.bits
    }
    #[doc = "Bit 23 - Temperature sensor and VREFINT enable"]
    #[inline]
    pub fn tsvrefe(&self) -> TSVREFER {
        TSVREFER::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 23;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bit 22 - VBAT enable"]
    #[inline]
    pub fn vbate(&self) -> VBATER {
        VBATER::_from({
            const MASK: bool = true;
            const OFFSET: u8 = 22;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        })
    }
    #[doc = "Bits 16:17 - ADC prescaler"]
    #[inline]
    pub fn adcpre(&self) -> ADCPRER {
        ADCPRER::_from({
            const MASK: u8 = 3;
            const OFFSET: u8 = 16;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        })
    }
    #[doc = "Bits 14:15 - Direct memory access mode for multi ADC mode"]
    #[inline]
    pub fn dma(&self) -> DMAR {
        let bits = {
            const MASK: u8 = 3;
            const OFFSET: u8 = 14;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        };
        DMAR { bits }
    }
    #[doc = "Bit 13 - DMA disable selection for multi-ADC mode"]
    #[inline]
    pub fn dds(&self) -> DDSR {
        let bits = {
            const MASK: bool = true;
            const OFFSET: u8 = 13;
            ((self.bits >> OFFSET) & MASK as u32) != 0
        };
        DDSR { bits }
    }
    #[doc = "Bits 8:11 - Delay between 2 sampling phases"]
    #[inline]
    pub fn delay(&self) -> DELAYR {
        let bits = {
            const MASK: u8 = 15;
            const OFFSET: u8 = 8;
            ((self.bits >> OFFSET) & MASK as u32) as u8
        };
        DELAYR { bits }
    }
}
impl W {
    #[doc = r" Reset value of the register"]
    #[inline]
    pub fn reset_value() -> W {
        W { bits: 0 }
    }
    #[doc = r" Writes raw bits to the register"]
    #[inline]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
    #[doc = "Bit 23 - Temperature sensor and VREFINT enable"]
    #[inline]
    pub fn tsvrefe(&mut self) -> _TSVREFEW {
        _TSVREFEW { w: self }
    }
    #[doc = "Bit 22 - VBAT enable"]
    #[inline]
    pub fn vbate(&mut self) -> _VBATEW {
        _VBATEW { w: self }
    }
    #[doc = "Bits 16:17 - ADC prescaler"]
    #[inline]
    pub fn adcpre(&mut self) -> _ADCPREW {
        _ADCPREW { w: self }
    }
    #[doc = "Bits 14:15 - Direct memory access mode for multi ADC mode"]
    #[inline]
    pub fn dma(&mut self) -> _DMAW {
        _DMAW { w: self }
    }
    #[doc = "Bit 13 - DMA disable selection for multi-ADC mode"]
    #[inline]
    pub fn dds(&mut self) -> _DDSW {
        _DDSW { w: self }
    }
    #[doc = "Bits 8:11 - Delay between 2 sampling phases"]
    #[inline]
    pub fn delay(&mut self) -> _DELAYW {
        _DELAYW { w: self }
    }
}