#[doc = "Register `CR` reader"]
pub struct R(crate::R<CR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CR` writer"]
pub struct W(crate::W<CR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `MODE` reader - DMA2D mode"]
pub type MODE_R = crate::FieldReader<u8, u8>;
#[doc = "Field `MODE` writer - DMA2D mode"]
pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CR_SPEC, u8, u8, 2, O>;
#[doc = "Field `CEIE` reader - Configuration Error Interrupt Enable"]
pub type CEIE_R = crate::BitReader<bool>;
#[doc = "Field `CEIE` writer - Configuration Error Interrupt Enable"]
pub type CEIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `CTCIE` reader - CLUT transfer complete interrupt enable"]
pub type CTCIE_R = crate::BitReader<bool>;
#[doc = "Field `CTCIE` writer - CLUT transfer complete interrupt enable"]
pub type CTCIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `CAEIE` reader - CLUT access error interrupt enable"]
pub type CAEIE_R = crate::BitReader<bool>;
#[doc = "Field `CAEIE` writer - CLUT access error interrupt enable"]
pub type CAEIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `TWIE` reader - Transfer watermark interrupt enable"]
pub type TWIE_R = crate::BitReader<bool>;
#[doc = "Field `TWIE` writer - Transfer watermark interrupt enable"]
pub type TWIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `TCIE` reader - Transfer complete interrupt enable"]
pub type TCIE_R = crate::BitReader<bool>;
#[doc = "Field `TCIE` writer - Transfer complete interrupt enable"]
pub type TCIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `TEIE` reader - Transfer error interrupt enable"]
pub type TEIE_R = crate::BitReader<bool>;
#[doc = "Field `TEIE` writer - Transfer error interrupt enable"]
pub type TEIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `ABORT` reader - Abort"]
pub type ABORT_R = crate::BitReader<bool>;
#[doc = "Field `ABORT` writer - Abort"]
pub type ABORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `SUSP` reader - Suspend"]
pub type SUSP_R = crate::BitReader<bool>;
#[doc = "Field `SUSP` writer - Suspend"]
pub type SUSP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
#[doc = "Field `START` reader - Start"]
pub type START_R = crate::BitReader<bool>;
#[doc = "Field `START` writer - Start"]
pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
impl R {
#[doc = "Bits 16:17 - DMA2D mode"]
#[inline(always)]
pub fn mode(&self) -> MODE_R {
MODE_R::new(((self.bits >> 16) & 3) as u8)
}
#[doc = "Bit 13 - Configuration Error Interrupt Enable"]
#[inline(always)]
pub fn ceie(&self) -> CEIE_R {
CEIE_R::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 12 - CLUT transfer complete interrupt enable"]
#[inline(always)]
pub fn ctcie(&self) -> CTCIE_R {
CTCIE_R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 11 - CLUT access error interrupt enable"]
#[inline(always)]
pub fn caeie(&self) -> CAEIE_R {
CAEIE_R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 10 - Transfer watermark interrupt enable"]
#[inline(always)]
pub fn twie(&self) -> TWIE_R {
TWIE_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 9 - Transfer complete interrupt enable"]
#[inline(always)]
pub fn tcie(&self) -> TCIE_R {
TCIE_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 8 - Transfer error interrupt enable"]
#[inline(always)]
pub fn teie(&self) -> TEIE_R {
TEIE_R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 2 - Abort"]
#[inline(always)]
pub fn abort(&self) -> ABORT_R {
ABORT_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 1 - Suspend"]
#[inline(always)]
pub fn susp(&self) -> SUSP_R {
SUSP_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 0 - Start"]
#[inline(always)]
pub fn start(&self) -> START_R {
START_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bits 16:17 - DMA2D mode"]
#[inline(always)]
pub fn mode(&mut self) -> MODE_W<16> {
MODE_W::new(self)
}
#[doc = "Bit 13 - Configuration Error Interrupt Enable"]
#[inline(always)]
pub fn ceie(&mut self) -> CEIE_W<13> {
CEIE_W::new(self)
}
#[doc = "Bit 12 - CLUT transfer complete interrupt enable"]
#[inline(always)]
pub fn ctcie(&mut self) -> CTCIE_W<12> {
CTCIE_W::new(self)
}
#[doc = "Bit 11 - CLUT access error interrupt enable"]
#[inline(always)]
pub fn caeie(&mut self) -> CAEIE_W<11> {
CAEIE_W::new(self)
}
#[doc = "Bit 10 - Transfer watermark interrupt enable"]
#[inline(always)]
pub fn twie(&mut self) -> TWIE_W<10> {
TWIE_W::new(self)
}
#[doc = "Bit 9 - Transfer complete interrupt enable"]
#[inline(always)]
pub fn tcie(&mut self) -> TCIE_W<9> {
TCIE_W::new(self)
}
#[doc = "Bit 8 - Transfer error interrupt enable"]
#[inline(always)]
pub fn teie(&mut self) -> TEIE_W<8> {
TEIE_W::new(self)
}
#[doc = "Bit 2 - Abort"]
#[inline(always)]
pub fn abort(&mut self) -> ABORT_W<2> {
ABORT_W::new(self)
}
#[doc = "Bit 1 - Suspend"]
#[inline(always)]
pub fn susp(&mut self) -> SUSP_W<1> {
SUSP_W::new(self)
}
#[doc = "Bit 0 - Start"]
#[inline(always)]
pub fn start(&mut self) -> START_W<0> {
START_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
pub struct CR_SPEC;
impl crate::RegisterSpec for CR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [cr::R](R) reader structure"]
impl crate::Readable for CR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
impl crate::Writable for CR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CR to value 0"]
impl crate::Resettable for CR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}