#[doc = "Reader of register DCTRL"]
pub type R = crate::R<u32, super::DCTRL>;
#[doc = "Writer for register DCTRL"]
pub type W = crate::W<u32, super::DCTRL>;
#[doc = "Register DCTRL `reset()`'s with value 0"]
impl crate::ResetValue for super::DCTRL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `SDIOEN`"]
pub type SDIOEN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SDIOEN`"]
pub struct SDIOEN_W<'a> {
w: &'a mut W,
}
impl<'a> SDIOEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "Reader of field `RWMOD`"]
pub type RWMOD_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RWMOD`"]
pub struct RWMOD_W<'a> {
w: &'a mut W,
}
impl<'a> RWMOD_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "Reader of field `RWSTOP`"]
pub type RWSTOP_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RWSTOP`"]
pub struct RWSTOP_W<'a> {
w: &'a mut W,
}
impl<'a> RWSTOP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "Reader of field `RWSTART`"]
pub type RWSTART_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RWSTART`"]
pub struct RWSTART_W<'a> {
w: &'a mut W,
}
impl<'a> RWSTART_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Reader of field `DBLOCKSIZE`"]
pub type DBLOCKSIZE_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `DBLOCKSIZE`"]
pub struct DBLOCKSIZE_W<'a> {
w: &'a mut W,
}
impl<'a> DBLOCKSIZE_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
self.w
}
}
#[doc = "Reader of field `DMAEN`"]
pub type DMAEN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `DMAEN`"]
pub struct DMAEN_W<'a> {
w: &'a mut W,
}
impl<'a> DMAEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "Reader of field `DTMODE`"]
pub type DTMODE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `DTMODE`"]
pub struct DTMODE_W<'a> {
w: &'a mut W,
}
impl<'a> DTMODE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `DTDIR`"]
pub type DTDIR_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `DTDIR`"]
pub struct DTDIR_W<'a> {
w: &'a mut W,
}
impl<'a> DTDIR_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `DTEN`"]
pub type DTEN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `DTEN`"]
pub struct DTEN_W<'a> {
w: &'a mut W,
}
impl<'a> DTEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 11 - SD I/O enable functions"]
#[inline(always)]
pub fn sdioen(&self) -> SDIOEN_R {
SDIOEN_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 10 - Read wait mode"]
#[inline(always)]
pub fn rwmod(&self) -> RWMOD_R {
RWMOD_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 9 - Read wait stop"]
#[inline(always)]
pub fn rwstop(&self) -> RWSTOP_R {
RWSTOP_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - Read wait start"]
#[inline(always)]
pub fn rwstart(&self) -> RWSTART_R {
RWSTART_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bits 4:7 - Data block size"]
#[inline(always)]
pub fn dblocksize(&self) -> DBLOCKSIZE_R {
DBLOCKSIZE_R::new(((self.bits >> 4) & 0x0f) as u8)
}
#[doc = "Bit 3 - DMA enable bit"]
#[inline(always)]
pub fn dmaen(&self) -> DMAEN_R {
DMAEN_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - Data transfer mode selection 1: Stream or SDIO multibyte data transfer."]
#[inline(always)]
pub fn dtmode(&self) -> DTMODE_R {
DTMODE_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - Data transfer direction selection"]
#[inline(always)]
pub fn dtdir(&self) -> DTDIR_R {
DTDIR_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - DTEN"]
#[inline(always)]
pub fn dten(&self) -> DTEN_R {
DTEN_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 11 - SD I/O enable functions"]
#[inline(always)]
pub fn sdioen(&mut self) -> SDIOEN_W {
SDIOEN_W { w: self }
}
#[doc = "Bit 10 - Read wait mode"]
#[inline(always)]
pub fn rwmod(&mut self) -> RWMOD_W {
RWMOD_W { w: self }
}
#[doc = "Bit 9 - Read wait stop"]
#[inline(always)]
pub fn rwstop(&mut self) -> RWSTOP_W {
RWSTOP_W { w: self }
}
#[doc = "Bit 8 - Read wait start"]
#[inline(always)]
pub fn rwstart(&mut self) -> RWSTART_W {
RWSTART_W { w: self }
}
#[doc = "Bits 4:7 - Data block size"]
#[inline(always)]
pub fn dblocksize(&mut self) -> DBLOCKSIZE_W {
DBLOCKSIZE_W { w: self }
}
#[doc = "Bit 3 - DMA enable bit"]
#[inline(always)]
pub fn dmaen(&mut self) -> DMAEN_W {
DMAEN_W { w: self }
}
#[doc = "Bit 2 - Data transfer mode selection 1: Stream or SDIO multibyte data transfer."]
#[inline(always)]
pub fn dtmode(&mut self) -> DTMODE_W {
DTMODE_W { w: self }
}
#[doc = "Bit 1 - Data transfer direction selection"]
#[inline(always)]
pub fn dtdir(&mut self) -> DTDIR_W {
DTDIR_W { w: self }
}
#[doc = "Bit 0 - DTEN"]
#[inline(always)]
pub fn dten(&mut self) -> DTEN_W {
DTEN_W { w: self }
}
}