stm32f30x/dma1/ccr2/
mod.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CCR2 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct ENR {
47 bits: bool,
48}
49impl ENR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct TCIER {
68 bits: bool,
69}
70impl TCIER {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bit(&self) -> bool {
74 self.bits
75 }
76 #[doc = r" Returns `true` if the bit is clear (0)"]
77 #[inline]
78 pub fn bit_is_clear(&self) -> bool {
79 !self.bit()
80 }
81 #[doc = r" Returns `true` if the bit is set (1)"]
82 #[inline]
83 pub fn bit_is_set(&self) -> bool {
84 self.bit()
85 }
86}
87#[doc = r" Value of the field"]
88pub struct HTIER {
89 bits: bool,
90}
91impl HTIER {
92 #[doc = r" Value of the field as raw bits"]
93 #[inline]
94 pub fn bit(&self) -> bool {
95 self.bits
96 }
97 #[doc = r" Returns `true` if the bit is clear (0)"]
98 #[inline]
99 pub fn bit_is_clear(&self) -> bool {
100 !self.bit()
101 }
102 #[doc = r" Returns `true` if the bit is set (1)"]
103 #[inline]
104 pub fn bit_is_set(&self) -> bool {
105 self.bit()
106 }
107}
108#[doc = r" Value of the field"]
109pub struct TEIER {
110 bits: bool,
111}
112impl TEIER {
113 #[doc = r" Value of the field as raw bits"]
114 #[inline]
115 pub fn bit(&self) -> bool {
116 self.bits
117 }
118 #[doc = r" Returns `true` if the bit is clear (0)"]
119 #[inline]
120 pub fn bit_is_clear(&self) -> bool {
121 !self.bit()
122 }
123 #[doc = r" Returns `true` if the bit is set (1)"]
124 #[inline]
125 pub fn bit_is_set(&self) -> bool {
126 self.bit()
127 }
128}
129#[doc = r" Value of the field"]
130pub struct DIRR {
131 bits: bool,
132}
133impl DIRR {
134 #[doc = r" Value of the field as raw bits"]
135 #[inline]
136 pub fn bit(&self) -> bool {
137 self.bits
138 }
139 #[doc = r" Returns `true` if the bit is clear (0)"]
140 #[inline]
141 pub fn bit_is_clear(&self) -> bool {
142 !self.bit()
143 }
144 #[doc = r" Returns `true` if the bit is set (1)"]
145 #[inline]
146 pub fn bit_is_set(&self) -> bool {
147 self.bit()
148 }
149}
150#[doc = r" Value of the field"]
151pub struct CIRCR {
152 bits: bool,
153}
154impl CIRCR {
155 #[doc = r" Value of the field as raw bits"]
156 #[inline]
157 pub fn bit(&self) -> bool {
158 self.bits
159 }
160 #[doc = r" Returns `true` if the bit is clear (0)"]
161 #[inline]
162 pub fn bit_is_clear(&self) -> bool {
163 !self.bit()
164 }
165 #[doc = r" Returns `true` if the bit is set (1)"]
166 #[inline]
167 pub fn bit_is_set(&self) -> bool {
168 self.bit()
169 }
170}
171#[doc = r" Value of the field"]
172pub struct PINCR {
173 bits: bool,
174}
175impl PINCR {
176 #[doc = r" Value of the field as raw bits"]
177 #[inline]
178 pub fn bit(&self) -> bool {
179 self.bits
180 }
181 #[doc = r" Returns `true` if the bit is clear (0)"]
182 #[inline]
183 pub fn bit_is_clear(&self) -> bool {
184 !self.bit()
185 }
186 #[doc = r" Returns `true` if the bit is set (1)"]
187 #[inline]
188 pub fn bit_is_set(&self) -> bool {
189 self.bit()
190 }
191}
192#[doc = r" Value of the field"]
193pub struct MINCR {
194 bits: bool,
195}
196impl MINCR {
197 #[doc = r" Value of the field as raw bits"]
198 #[inline]
199 pub fn bit(&self) -> bool {
200 self.bits
201 }
202 #[doc = r" Returns `true` if the bit is clear (0)"]
203 #[inline]
204 pub fn bit_is_clear(&self) -> bool {
205 !self.bit()
206 }
207 #[doc = r" Returns `true` if the bit is set (1)"]
208 #[inline]
209 pub fn bit_is_set(&self) -> bool {
210 self.bit()
211 }
212}
213#[doc = r" Value of the field"]
214pub struct PSIZER {
215 bits: u8,
216}
217impl PSIZER {
218 #[doc = r" Value of the field as raw bits"]
219 #[inline]
220 pub fn bits(&self) -> u8 {
221 self.bits
222 }
223}
224#[doc = r" Value of the field"]
225pub struct MSIZER {
226 bits: u8,
227}
228impl MSIZER {
229 #[doc = r" Value of the field as raw bits"]
230 #[inline]
231 pub fn bits(&self) -> u8 {
232 self.bits
233 }
234}
235#[doc = r" Value of the field"]
236pub struct PLR {
237 bits: u8,
238}
239impl PLR {
240 #[doc = r" Value of the field as raw bits"]
241 #[inline]
242 pub fn bits(&self) -> u8 {
243 self.bits
244 }
245}
246#[doc = r" Value of the field"]
247pub struct MEM2MEMR {
248 bits: bool,
249}
250impl MEM2MEMR {
251 #[doc = r" Value of the field as raw bits"]
252 #[inline]
253 pub fn bit(&self) -> bool {
254 self.bits
255 }
256 #[doc = r" Returns `true` if the bit is clear (0)"]
257 #[inline]
258 pub fn bit_is_clear(&self) -> bool {
259 !self.bit()
260 }
261 #[doc = r" Returns `true` if the bit is set (1)"]
262 #[inline]
263 pub fn bit_is_set(&self) -> bool {
264 self.bit()
265 }
266}
267#[doc = r" Proxy"]
268pub struct _ENW<'a> {
269 w: &'a mut W,
270}
271impl<'a> _ENW<'a> {
272 #[doc = r" Sets the field bit"]
273 pub fn set_bit(self) -> &'a mut W {
274 self.bit(true)
275 }
276 #[doc = r" Clears the field bit"]
277 pub fn clear_bit(self) -> &'a mut W {
278 self.bit(false)
279 }
280 #[doc = r" Writes raw bits to the field"]
281 #[inline]
282 pub fn bit(self, value: bool) -> &'a mut W {
283 const MASK: bool = true;
284 const OFFSET: u8 = 0;
285 self.w.bits &= !((MASK as u32) << OFFSET);
286 self.w.bits |= ((value & MASK) as u32) << OFFSET;
287 self.w
288 }
289}
290#[doc = r" Proxy"]
291pub struct _TCIEW<'a> {
292 w: &'a mut W,
293}
294impl<'a> _TCIEW<'a> {
295 #[doc = r" Sets the field bit"]
296 pub fn set_bit(self) -> &'a mut W {
297 self.bit(true)
298 }
299 #[doc = r" Clears the field bit"]
300 pub fn clear_bit(self) -> &'a mut W {
301 self.bit(false)
302 }
303 #[doc = r" Writes raw bits to the field"]
304 #[inline]
305 pub fn bit(self, value: bool) -> &'a mut W {
306 const MASK: bool = true;
307 const OFFSET: u8 = 1;
308 self.w.bits &= !((MASK as u32) << OFFSET);
309 self.w.bits |= ((value & MASK) as u32) << OFFSET;
310 self.w
311 }
312}
313#[doc = r" Proxy"]
314pub struct _HTIEW<'a> {
315 w: &'a mut W,
316}
317impl<'a> _HTIEW<'a> {
318 #[doc = r" Sets the field bit"]
319 pub fn set_bit(self) -> &'a mut W {
320 self.bit(true)
321 }
322 #[doc = r" Clears the field bit"]
323 pub fn clear_bit(self) -> &'a mut W {
324 self.bit(false)
325 }
326 #[doc = r" Writes raw bits to the field"]
327 #[inline]
328 pub fn bit(self, value: bool) -> &'a mut W {
329 const MASK: bool = true;
330 const OFFSET: u8 = 2;
331 self.w.bits &= !((MASK as u32) << OFFSET);
332 self.w.bits |= ((value & MASK) as u32) << OFFSET;
333 self.w
334 }
335}
336#[doc = r" Proxy"]
337pub struct _TEIEW<'a> {
338 w: &'a mut W,
339}
340impl<'a> _TEIEW<'a> {
341 #[doc = r" Sets the field bit"]
342 pub fn set_bit(self) -> &'a mut W {
343 self.bit(true)
344 }
345 #[doc = r" Clears the field bit"]
346 pub fn clear_bit(self) -> &'a mut W {
347 self.bit(false)
348 }
349 #[doc = r" Writes raw bits to the field"]
350 #[inline]
351 pub fn bit(self, value: bool) -> &'a mut W {
352 const MASK: bool = true;
353 const OFFSET: u8 = 3;
354 self.w.bits &= !((MASK as u32) << OFFSET);
355 self.w.bits |= ((value & MASK) as u32) << OFFSET;
356 self.w
357 }
358}
359#[doc = r" Proxy"]
360pub struct _DIRW<'a> {
361 w: &'a mut W,
362}
363impl<'a> _DIRW<'a> {
364 #[doc = r" Sets the field bit"]
365 pub fn set_bit(self) -> &'a mut W {
366 self.bit(true)
367 }
368 #[doc = r" Clears the field bit"]
369 pub fn clear_bit(self) -> &'a mut W {
370 self.bit(false)
371 }
372 #[doc = r" Writes raw bits to the field"]
373 #[inline]
374 pub fn bit(self, value: bool) -> &'a mut W {
375 const MASK: bool = true;
376 const OFFSET: u8 = 4;
377 self.w.bits &= !((MASK as u32) << OFFSET);
378 self.w.bits |= ((value & MASK) as u32) << OFFSET;
379 self.w
380 }
381}
382#[doc = r" Proxy"]
383pub struct _CIRCW<'a> {
384 w: &'a mut W,
385}
386impl<'a> _CIRCW<'a> {
387 #[doc = r" Sets the field bit"]
388 pub fn set_bit(self) -> &'a mut W {
389 self.bit(true)
390 }
391 #[doc = r" Clears the field bit"]
392 pub fn clear_bit(self) -> &'a mut W {
393 self.bit(false)
394 }
395 #[doc = r" Writes raw bits to the field"]
396 #[inline]
397 pub fn bit(self, value: bool) -> &'a mut W {
398 const MASK: bool = true;
399 const OFFSET: u8 = 5;
400 self.w.bits &= !((MASK as u32) << OFFSET);
401 self.w.bits |= ((value & MASK) as u32) << OFFSET;
402 self.w
403 }
404}
405#[doc = r" Proxy"]
406pub struct _PINCW<'a> {
407 w: &'a mut W,
408}
409impl<'a> _PINCW<'a> {
410 #[doc = r" Sets the field bit"]
411 pub fn set_bit(self) -> &'a mut W {
412 self.bit(true)
413 }
414 #[doc = r" Clears the field bit"]
415 pub fn clear_bit(self) -> &'a mut W {
416 self.bit(false)
417 }
418 #[doc = r" Writes raw bits to the field"]
419 #[inline]
420 pub fn bit(self, value: bool) -> &'a mut W {
421 const MASK: bool = true;
422 const OFFSET: u8 = 6;
423 self.w.bits &= !((MASK as u32) << OFFSET);
424 self.w.bits |= ((value & MASK) as u32) << OFFSET;
425 self.w
426 }
427}
428#[doc = r" Proxy"]
429pub struct _MINCW<'a> {
430 w: &'a mut W,
431}
432impl<'a> _MINCW<'a> {
433 #[doc = r" Sets the field bit"]
434 pub fn set_bit(self) -> &'a mut W {
435 self.bit(true)
436 }
437 #[doc = r" Clears the field bit"]
438 pub fn clear_bit(self) -> &'a mut W {
439 self.bit(false)
440 }
441 #[doc = r" Writes raw bits to the field"]
442 #[inline]
443 pub fn bit(self, value: bool) -> &'a mut W {
444 const MASK: bool = true;
445 const OFFSET: u8 = 7;
446 self.w.bits &= !((MASK as u32) << OFFSET);
447 self.w.bits |= ((value & MASK) as u32) << OFFSET;
448 self.w
449 }
450}
451#[doc = r" Proxy"]
452pub struct _PSIZEW<'a> {
453 w: &'a mut W,
454}
455impl<'a> _PSIZEW<'a> {
456 #[doc = r" Writes raw bits to the field"]
457 #[inline]
458 pub unsafe fn bits(self, value: u8) -> &'a mut W {
459 const MASK: u8 = 3;
460 const OFFSET: u8 = 8;
461 self.w.bits &= !((MASK as u32) << OFFSET);
462 self.w.bits |= ((value & MASK) as u32) << OFFSET;
463 self.w
464 }
465}
466#[doc = r" Proxy"]
467pub struct _MSIZEW<'a> {
468 w: &'a mut W,
469}
470impl<'a> _MSIZEW<'a> {
471 #[doc = r" Writes raw bits to the field"]
472 #[inline]
473 pub unsafe fn bits(self, value: u8) -> &'a mut W {
474 const MASK: u8 = 3;
475 const OFFSET: u8 = 10;
476 self.w.bits &= !((MASK as u32) << OFFSET);
477 self.w.bits |= ((value & MASK) as u32) << OFFSET;
478 self.w
479 }
480}
481#[doc = r" Proxy"]
482pub struct _PLW<'a> {
483 w: &'a mut W,
484}
485impl<'a> _PLW<'a> {
486 #[doc = r" Writes raw bits to the field"]
487 #[inline]
488 pub unsafe fn bits(self, value: u8) -> &'a mut W {
489 const MASK: u8 = 3;
490 const OFFSET: u8 = 12;
491 self.w.bits &= !((MASK as u32) << OFFSET);
492 self.w.bits |= ((value & MASK) as u32) << OFFSET;
493 self.w
494 }
495}
496#[doc = r" Proxy"]
497pub struct _MEM2MEMW<'a> {
498 w: &'a mut W,
499}
500impl<'a> _MEM2MEMW<'a> {
501 #[doc = r" Sets the field bit"]
502 pub fn set_bit(self) -> &'a mut W {
503 self.bit(true)
504 }
505 #[doc = r" Clears the field bit"]
506 pub fn clear_bit(self) -> &'a mut W {
507 self.bit(false)
508 }
509 #[doc = r" Writes raw bits to the field"]
510 #[inline]
511 pub fn bit(self, value: bool) -> &'a mut W {
512 const MASK: bool = true;
513 const OFFSET: u8 = 14;
514 self.w.bits &= !((MASK as u32) << OFFSET);
515 self.w.bits |= ((value & MASK) as u32) << OFFSET;
516 self.w
517 }
518}
519impl R {
520 #[doc = r" Value of the register as raw bits"]
521 #[inline]
522 pub fn bits(&self) -> u32 {
523 self.bits
524 }
525 #[doc = "Bit 0 - Channel enable"]
526 #[inline]
527 pub fn en(&self) -> ENR {
528 let bits = {
529 const MASK: bool = true;
530 const OFFSET: u8 = 0;
531 ((self.bits >> OFFSET) & MASK as u32) != 0
532 };
533 ENR { bits }
534 }
535 #[doc = "Bit 1 - Transfer complete interrupt enable"]
536 #[inline]
537 pub fn tcie(&self) -> TCIER {
538 let bits = {
539 const MASK: bool = true;
540 const OFFSET: u8 = 1;
541 ((self.bits >> OFFSET) & MASK as u32) != 0
542 };
543 TCIER { bits }
544 }
545 #[doc = "Bit 2 - Half Transfer interrupt enable"]
546 #[inline]
547 pub fn htie(&self) -> HTIER {
548 let bits = {
549 const MASK: bool = true;
550 const OFFSET: u8 = 2;
551 ((self.bits >> OFFSET) & MASK as u32) != 0
552 };
553 HTIER { bits }
554 }
555 #[doc = "Bit 3 - Transfer error interrupt enable"]
556 #[inline]
557 pub fn teie(&self) -> TEIER {
558 let bits = {
559 const MASK: bool = true;
560 const OFFSET: u8 = 3;
561 ((self.bits >> OFFSET) & MASK as u32) != 0
562 };
563 TEIER { bits }
564 }
565 #[doc = "Bit 4 - Data transfer direction"]
566 #[inline]
567 pub fn dir(&self) -> DIRR {
568 let bits = {
569 const MASK: bool = true;
570 const OFFSET: u8 = 4;
571 ((self.bits >> OFFSET) & MASK as u32) != 0
572 };
573 DIRR { bits }
574 }
575 #[doc = "Bit 5 - Circular mode"]
576 #[inline]
577 pub fn circ(&self) -> CIRCR {
578 let bits = {
579 const MASK: bool = true;
580 const OFFSET: u8 = 5;
581 ((self.bits >> OFFSET) & MASK as u32) != 0
582 };
583 CIRCR { bits }
584 }
585 #[doc = "Bit 6 - Peripheral increment mode"]
586 #[inline]
587 pub fn pinc(&self) -> PINCR {
588 let bits = {
589 const MASK: bool = true;
590 const OFFSET: u8 = 6;
591 ((self.bits >> OFFSET) & MASK as u32) != 0
592 };
593 PINCR { bits }
594 }
595 #[doc = "Bit 7 - Memory increment mode"]
596 #[inline]
597 pub fn minc(&self) -> MINCR {
598 let bits = {
599 const MASK: bool = true;
600 const OFFSET: u8 = 7;
601 ((self.bits >> OFFSET) & MASK as u32) != 0
602 };
603 MINCR { bits }
604 }
605 #[doc = "Bits 8:9 - Peripheral size"]
606 #[inline]
607 pub fn psize(&self) -> PSIZER {
608 let bits = {
609 const MASK: u8 = 3;
610 const OFFSET: u8 = 8;
611 ((self.bits >> OFFSET) & MASK as u32) as u8
612 };
613 PSIZER { bits }
614 }
615 #[doc = "Bits 10:11 - Memory size"]
616 #[inline]
617 pub fn msize(&self) -> MSIZER {
618 let bits = {
619 const MASK: u8 = 3;
620 const OFFSET: u8 = 10;
621 ((self.bits >> OFFSET) & MASK as u32) as u8
622 };
623 MSIZER { bits }
624 }
625 #[doc = "Bits 12:13 - Channel Priority level"]
626 #[inline]
627 pub fn pl(&self) -> PLR {
628 let bits = {
629 const MASK: u8 = 3;
630 const OFFSET: u8 = 12;
631 ((self.bits >> OFFSET) & MASK as u32) as u8
632 };
633 PLR { bits }
634 }
635 #[doc = "Bit 14 - Memory to memory mode"]
636 #[inline]
637 pub fn mem2mem(&self) -> MEM2MEMR {
638 let bits = {
639 const MASK: bool = true;
640 const OFFSET: u8 = 14;
641 ((self.bits >> OFFSET) & MASK as u32) != 0
642 };
643 MEM2MEMR { bits }
644 }
645}
646impl W {
647 #[doc = r" Reset value of the register"]
648 #[inline]
649 pub fn reset_value() -> W {
650 W { bits: 0 }
651 }
652 #[doc = r" Writes raw bits to the register"]
653 #[inline]
654 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
655 self.bits = bits;
656 self
657 }
658 #[doc = "Bit 0 - Channel enable"]
659 #[inline]
660 pub fn en(&mut self) -> _ENW {
661 _ENW { w: self }
662 }
663 #[doc = "Bit 1 - Transfer complete interrupt enable"]
664 #[inline]
665 pub fn tcie(&mut self) -> _TCIEW {
666 _TCIEW { w: self }
667 }
668 #[doc = "Bit 2 - Half Transfer interrupt enable"]
669 #[inline]
670 pub fn htie(&mut self) -> _HTIEW {
671 _HTIEW { w: self }
672 }
673 #[doc = "Bit 3 - Transfer error interrupt enable"]
674 #[inline]
675 pub fn teie(&mut self) -> _TEIEW {
676 _TEIEW { w: self }
677 }
678 #[doc = "Bit 4 - Data transfer direction"]
679 #[inline]
680 pub fn dir(&mut self) -> _DIRW {
681 _DIRW { w: self }
682 }
683 #[doc = "Bit 5 - Circular mode"]
684 #[inline]
685 pub fn circ(&mut self) -> _CIRCW {
686 _CIRCW { w: self }
687 }
688 #[doc = "Bit 6 - Peripheral increment mode"]
689 #[inline]
690 pub fn pinc(&mut self) -> _PINCW {
691 _PINCW { w: self }
692 }
693 #[doc = "Bit 7 - Memory increment mode"]
694 #[inline]
695 pub fn minc(&mut self) -> _MINCW {
696 _MINCW { w: self }
697 }
698 #[doc = "Bits 8:9 - Peripheral size"]
699 #[inline]
700 pub fn psize(&mut self) -> _PSIZEW {
701 _PSIZEW { w: self }
702 }
703 #[doc = "Bits 10:11 - Memory size"]
704 #[inline]
705 pub fn msize(&mut self) -> _MSIZEW {
706 _MSIZEW { w: self }
707 }
708 #[doc = "Bits 12:13 - Channel Priority level"]
709 #[inline]
710 pub fn pl(&mut self) -> _PLW {
711 _PLW { w: self }
712 }
713 #[doc = "Bit 14 - Memory to memory mode"]
714 #[inline]
715 pub fn mem2mem(&mut self) -> _MEM2MEMW {
716 _MEM2MEMW { w: self }
717 }
718}