stm32f30x/tim2/cr1/
mod.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CR1 {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct CENR {
47    bits: bool,
48}
49impl CENR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct UDISR {
68    bits: bool,
69}
70impl UDISR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct URSR {
89    bits: bool,
90}
91impl URSR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bit(&self) -> bool {
95        self.bits
96    }
97    #[doc = r" Returns `true` if the bit is clear (0)"]
98    #[inline]
99    pub fn bit_is_clear(&self) -> bool {
100        !self.bit()
101    }
102    #[doc = r" Returns `true` if the bit is set (1)"]
103    #[inline]
104    pub fn bit_is_set(&self) -> bool {
105        self.bit()
106    }
107}
108#[doc = r" Value of the field"]
109pub struct OPMR {
110    bits: bool,
111}
112impl OPMR {
113    #[doc = r" Value of the field as raw bits"]
114    #[inline]
115    pub fn bit(&self) -> bool {
116        self.bits
117    }
118    #[doc = r" Returns `true` if the bit is clear (0)"]
119    #[inline]
120    pub fn bit_is_clear(&self) -> bool {
121        !self.bit()
122    }
123    #[doc = r" Returns `true` if the bit is set (1)"]
124    #[inline]
125    pub fn bit_is_set(&self) -> bool {
126        self.bit()
127    }
128}
129#[doc = r" Value of the field"]
130pub struct DIRR {
131    bits: bool,
132}
133impl DIRR {
134    #[doc = r" Value of the field as raw bits"]
135    #[inline]
136    pub fn bit(&self) -> bool {
137        self.bits
138    }
139    #[doc = r" Returns `true` if the bit is clear (0)"]
140    #[inline]
141    pub fn bit_is_clear(&self) -> bool {
142        !self.bit()
143    }
144    #[doc = r" Returns `true` if the bit is set (1)"]
145    #[inline]
146    pub fn bit_is_set(&self) -> bool {
147        self.bit()
148    }
149}
150#[doc = r" Value of the field"]
151pub struct CMSR {
152    bits: u8,
153}
154impl CMSR {
155    #[doc = r" Value of the field as raw bits"]
156    #[inline]
157    pub fn bits(&self) -> u8 {
158        self.bits
159    }
160}
161#[doc = r" Value of the field"]
162pub struct ARPER {
163    bits: bool,
164}
165impl ARPER {
166    #[doc = r" Value of the field as raw bits"]
167    #[inline]
168    pub fn bit(&self) -> bool {
169        self.bits
170    }
171    #[doc = r" Returns `true` if the bit is clear (0)"]
172    #[inline]
173    pub fn bit_is_clear(&self) -> bool {
174        !self.bit()
175    }
176    #[doc = r" Returns `true` if the bit is set (1)"]
177    #[inline]
178    pub fn bit_is_set(&self) -> bool {
179        self.bit()
180    }
181}
182#[doc = r" Value of the field"]
183pub struct CKDR {
184    bits: u8,
185}
186impl CKDR {
187    #[doc = r" Value of the field as raw bits"]
188    #[inline]
189    pub fn bits(&self) -> u8 {
190        self.bits
191    }
192}
193#[doc = r" Value of the field"]
194pub struct UIFREMAPR {
195    bits: bool,
196}
197impl UIFREMAPR {
198    #[doc = r" Value of the field as raw bits"]
199    #[inline]
200    pub fn bit(&self) -> bool {
201        self.bits
202    }
203    #[doc = r" Returns `true` if the bit is clear (0)"]
204    #[inline]
205    pub fn bit_is_clear(&self) -> bool {
206        !self.bit()
207    }
208    #[doc = r" Returns `true` if the bit is set (1)"]
209    #[inline]
210    pub fn bit_is_set(&self) -> bool {
211        self.bit()
212    }
213}
214#[doc = r" Proxy"]
215pub struct _CENW<'a> {
216    w: &'a mut W,
217}
218impl<'a> _CENW<'a> {
219    #[doc = r" Sets the field bit"]
220    pub fn set_bit(self) -> &'a mut W {
221        self.bit(true)
222    }
223    #[doc = r" Clears the field bit"]
224    pub fn clear_bit(self) -> &'a mut W {
225        self.bit(false)
226    }
227    #[doc = r" Writes raw bits to the field"]
228    #[inline]
229    pub fn bit(self, value: bool) -> &'a mut W {
230        const MASK: bool = true;
231        const OFFSET: u8 = 0;
232        self.w.bits &= !((MASK as u32) << OFFSET);
233        self.w.bits |= ((value & MASK) as u32) << OFFSET;
234        self.w
235    }
236}
237#[doc = r" Proxy"]
238pub struct _UDISW<'a> {
239    w: &'a mut W,
240}
241impl<'a> _UDISW<'a> {
242    #[doc = r" Sets the field bit"]
243    pub fn set_bit(self) -> &'a mut W {
244        self.bit(true)
245    }
246    #[doc = r" Clears the field bit"]
247    pub fn clear_bit(self) -> &'a mut W {
248        self.bit(false)
249    }
250    #[doc = r" Writes raw bits to the field"]
251    #[inline]
252    pub fn bit(self, value: bool) -> &'a mut W {
253        const MASK: bool = true;
254        const OFFSET: u8 = 1;
255        self.w.bits &= !((MASK as u32) << OFFSET);
256        self.w.bits |= ((value & MASK) as u32) << OFFSET;
257        self.w
258    }
259}
260#[doc = r" Proxy"]
261pub struct _URSW<'a> {
262    w: &'a mut W,
263}
264impl<'a> _URSW<'a> {
265    #[doc = r" Sets the field bit"]
266    pub fn set_bit(self) -> &'a mut W {
267        self.bit(true)
268    }
269    #[doc = r" Clears the field bit"]
270    pub fn clear_bit(self) -> &'a mut W {
271        self.bit(false)
272    }
273    #[doc = r" Writes raw bits to the field"]
274    #[inline]
275    pub fn bit(self, value: bool) -> &'a mut W {
276        const MASK: bool = true;
277        const OFFSET: u8 = 2;
278        self.w.bits &= !((MASK as u32) << OFFSET);
279        self.w.bits |= ((value & MASK) as u32) << OFFSET;
280        self.w
281    }
282}
283#[doc = r" Proxy"]
284pub struct _OPMW<'a> {
285    w: &'a mut W,
286}
287impl<'a> _OPMW<'a> {
288    #[doc = r" Sets the field bit"]
289    pub fn set_bit(self) -> &'a mut W {
290        self.bit(true)
291    }
292    #[doc = r" Clears the field bit"]
293    pub fn clear_bit(self) -> &'a mut W {
294        self.bit(false)
295    }
296    #[doc = r" Writes raw bits to the field"]
297    #[inline]
298    pub fn bit(self, value: bool) -> &'a mut W {
299        const MASK: bool = true;
300        const OFFSET: u8 = 3;
301        self.w.bits &= !((MASK as u32) << OFFSET);
302        self.w.bits |= ((value & MASK) as u32) << OFFSET;
303        self.w
304    }
305}
306#[doc = r" Proxy"]
307pub struct _DIRW<'a> {
308    w: &'a mut W,
309}
310impl<'a> _DIRW<'a> {
311    #[doc = r" Sets the field bit"]
312    pub fn set_bit(self) -> &'a mut W {
313        self.bit(true)
314    }
315    #[doc = r" Clears the field bit"]
316    pub fn clear_bit(self) -> &'a mut W {
317        self.bit(false)
318    }
319    #[doc = r" Writes raw bits to the field"]
320    #[inline]
321    pub fn bit(self, value: bool) -> &'a mut W {
322        const MASK: bool = true;
323        const OFFSET: u8 = 4;
324        self.w.bits &= !((MASK as u32) << OFFSET);
325        self.w.bits |= ((value & MASK) as u32) << OFFSET;
326        self.w
327    }
328}
329#[doc = r" Proxy"]
330pub struct _CMSW<'a> {
331    w: &'a mut W,
332}
333impl<'a> _CMSW<'a> {
334    #[doc = r" Writes raw bits to the field"]
335    #[inline]
336    pub unsafe fn bits(self, value: u8) -> &'a mut W {
337        const MASK: u8 = 3;
338        const OFFSET: u8 = 5;
339        self.w.bits &= !((MASK as u32) << OFFSET);
340        self.w.bits |= ((value & MASK) as u32) << OFFSET;
341        self.w
342    }
343}
344#[doc = r" Proxy"]
345pub struct _ARPEW<'a> {
346    w: &'a mut W,
347}
348impl<'a> _ARPEW<'a> {
349    #[doc = r" Sets the field bit"]
350    pub fn set_bit(self) -> &'a mut W {
351        self.bit(true)
352    }
353    #[doc = r" Clears the field bit"]
354    pub fn clear_bit(self) -> &'a mut W {
355        self.bit(false)
356    }
357    #[doc = r" Writes raw bits to the field"]
358    #[inline]
359    pub fn bit(self, value: bool) -> &'a mut W {
360        const MASK: bool = true;
361        const OFFSET: u8 = 7;
362        self.w.bits &= !((MASK as u32) << OFFSET);
363        self.w.bits |= ((value & MASK) as u32) << OFFSET;
364        self.w
365    }
366}
367#[doc = r" Proxy"]
368pub struct _CKDW<'a> {
369    w: &'a mut W,
370}
371impl<'a> _CKDW<'a> {
372    #[doc = r" Writes raw bits to the field"]
373    #[inline]
374    pub unsafe fn bits(self, value: u8) -> &'a mut W {
375        const MASK: u8 = 3;
376        const OFFSET: u8 = 8;
377        self.w.bits &= !((MASK as u32) << OFFSET);
378        self.w.bits |= ((value & MASK) as u32) << OFFSET;
379        self.w
380    }
381}
382#[doc = r" Proxy"]
383pub struct _UIFREMAPW<'a> {
384    w: &'a mut W,
385}
386impl<'a> _UIFREMAPW<'a> {
387    #[doc = r" Sets the field bit"]
388    pub fn set_bit(self) -> &'a mut W {
389        self.bit(true)
390    }
391    #[doc = r" Clears the field bit"]
392    pub fn clear_bit(self) -> &'a mut W {
393        self.bit(false)
394    }
395    #[doc = r" Writes raw bits to the field"]
396    #[inline]
397    pub fn bit(self, value: bool) -> &'a mut W {
398        const MASK: bool = true;
399        const OFFSET: u8 = 11;
400        self.w.bits &= !((MASK as u32) << OFFSET);
401        self.w.bits |= ((value & MASK) as u32) << OFFSET;
402        self.w
403    }
404}
405impl R {
406    #[doc = r" Value of the register as raw bits"]
407    #[inline]
408    pub fn bits(&self) -> u32 {
409        self.bits
410    }
411    #[doc = "Bit 0 - Counter enable"]
412    #[inline]
413    pub fn cen(&self) -> CENR {
414        let bits = {
415            const MASK: bool = true;
416            const OFFSET: u8 = 0;
417            ((self.bits >> OFFSET) & MASK as u32) != 0
418        };
419        CENR { bits }
420    }
421    #[doc = "Bit 1 - Update disable"]
422    #[inline]
423    pub fn udis(&self) -> UDISR {
424        let bits = {
425            const MASK: bool = true;
426            const OFFSET: u8 = 1;
427            ((self.bits >> OFFSET) & MASK as u32) != 0
428        };
429        UDISR { bits }
430    }
431    #[doc = "Bit 2 - Update request source"]
432    #[inline]
433    pub fn urs(&self) -> URSR {
434        let bits = {
435            const MASK: bool = true;
436            const OFFSET: u8 = 2;
437            ((self.bits >> OFFSET) & MASK as u32) != 0
438        };
439        URSR { bits }
440    }
441    #[doc = "Bit 3 - One-pulse mode"]
442    #[inline]
443    pub fn opm(&self) -> OPMR {
444        let bits = {
445            const MASK: bool = true;
446            const OFFSET: u8 = 3;
447            ((self.bits >> OFFSET) & MASK as u32) != 0
448        };
449        OPMR { bits }
450    }
451    #[doc = "Bit 4 - Direction"]
452    #[inline]
453    pub fn dir(&self) -> DIRR {
454        let bits = {
455            const MASK: bool = true;
456            const OFFSET: u8 = 4;
457            ((self.bits >> OFFSET) & MASK as u32) != 0
458        };
459        DIRR { bits }
460    }
461    #[doc = "Bits 5:6 - Center-aligned mode selection"]
462    #[inline]
463    pub fn cms(&self) -> CMSR {
464        let bits = {
465            const MASK: u8 = 3;
466            const OFFSET: u8 = 5;
467            ((self.bits >> OFFSET) & MASK as u32) as u8
468        };
469        CMSR { bits }
470    }
471    #[doc = "Bit 7 - Auto-reload preload enable"]
472    #[inline]
473    pub fn arpe(&self) -> ARPER {
474        let bits = {
475            const MASK: bool = true;
476            const OFFSET: u8 = 7;
477            ((self.bits >> OFFSET) & MASK as u32) != 0
478        };
479        ARPER { bits }
480    }
481    #[doc = "Bits 8:9 - Clock division"]
482    #[inline]
483    pub fn ckd(&self) -> CKDR {
484        let bits = {
485            const MASK: u8 = 3;
486            const OFFSET: u8 = 8;
487            ((self.bits >> OFFSET) & MASK as u32) as u8
488        };
489        CKDR { bits }
490    }
491    #[doc = "Bit 11 - UIF status bit remapping"]
492    #[inline]
493    pub fn uifremap(&self) -> UIFREMAPR {
494        let bits = {
495            const MASK: bool = true;
496            const OFFSET: u8 = 11;
497            ((self.bits >> OFFSET) & MASK as u32) != 0
498        };
499        UIFREMAPR { bits }
500    }
501}
502impl W {
503    #[doc = r" Reset value of the register"]
504    #[inline]
505    pub fn reset_value() -> W {
506        W { bits: 0 }
507    }
508    #[doc = r" Writes raw bits to the register"]
509    #[inline]
510    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
511        self.bits = bits;
512        self
513    }
514    #[doc = "Bit 0 - Counter enable"]
515    #[inline]
516    pub fn cen(&mut self) -> _CENW {
517        _CENW { w: self }
518    }
519    #[doc = "Bit 1 - Update disable"]
520    #[inline]
521    pub fn udis(&mut self) -> _UDISW {
522        _UDISW { w: self }
523    }
524    #[doc = "Bit 2 - Update request source"]
525    #[inline]
526    pub fn urs(&mut self) -> _URSW {
527        _URSW { w: self }
528    }
529    #[doc = "Bit 3 - One-pulse mode"]
530    #[inline]
531    pub fn opm(&mut self) -> _OPMW {
532        _OPMW { w: self }
533    }
534    #[doc = "Bit 4 - Direction"]
535    #[inline]
536    pub fn dir(&mut self) -> _DIRW {
537        _DIRW { w: self }
538    }
539    #[doc = "Bits 5:6 - Center-aligned mode selection"]
540    #[inline]
541    pub fn cms(&mut self) -> _CMSW {
542        _CMSW { w: self }
543    }
544    #[doc = "Bit 7 - Auto-reload preload enable"]
545    #[inline]
546    pub fn arpe(&mut self) -> _ARPEW {
547        _ARPEW { w: self }
548    }
549    #[doc = "Bits 8:9 - Clock division"]
550    #[inline]
551    pub fn ckd(&mut self) -> _CKDW {
552        _CKDW { w: self }
553    }
554    #[doc = "Bit 11 - UIF status bit remapping"]
555    #[inline]
556    pub fn uifremap(&mut self) -> _UIFREMAPW {
557        _UIFREMAPW { w: self }
558    }
559}
stm32f30x/tim2/cr1/mod.rs

stm32f30x/tim2/cr1/
mod.rs
