stm32f30x/rcc/cfgr/
mod.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CFGR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct SWR {
47 bits: u8,
48}
49impl SWR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bits(&self) -> u8 {
53 self.bits
54 }
55}
56#[doc = r" Value of the field"]
57pub struct SWSR {
58 bits: u8,
59}
60impl SWSR {
61 #[doc = r" Value of the field as raw bits"]
62 #[inline]
63 pub fn bits(&self) -> u8 {
64 self.bits
65 }
66}
67#[doc = r" Value of the field"]
68pub struct HPRER {
69 bits: u8,
70}
71impl HPRER {
72 #[doc = r" Value of the field as raw bits"]
73 #[inline]
74 pub fn bits(&self) -> u8 {
75 self.bits
76 }
77}
78#[doc = r" Value of the field"]
79pub struct PPRE1R {
80 bits: u8,
81}
82impl PPRE1R {
83 #[doc = r" Value of the field as raw bits"]
84 #[inline]
85 pub fn bits(&self) -> u8 {
86 self.bits
87 }
88}
89#[doc = r" Value of the field"]
90pub struct PPRE2R {
91 bits: u8,
92}
93impl PPRE2R {
94 #[doc = r" Value of the field as raw bits"]
95 #[inline]
96 pub fn bits(&self) -> u8 {
97 self.bits
98 }
99}
100#[doc = r" Value of the field"]
101pub struct PLLSRCR {
102 bits: bool,
103}
104impl PLLSRCR {
105 #[doc = r" Value of the field as raw bits"]
106 #[inline]
107 pub fn bit(&self) -> bool {
108 self.bits
109 }
110 #[doc = r" Returns `true` if the bit is clear (0)"]
111 #[inline]
112 pub fn bit_is_clear(&self) -> bool {
113 !self.bit()
114 }
115 #[doc = r" Returns `true` if the bit is set (1)"]
116 #[inline]
117 pub fn bit_is_set(&self) -> bool {
118 self.bit()
119 }
120}
121#[doc = r" Value of the field"]
122pub struct PLLXTPRER {
123 bits: bool,
124}
125impl PLLXTPRER {
126 #[doc = r" Value of the field as raw bits"]
127 #[inline]
128 pub fn bit(&self) -> bool {
129 self.bits
130 }
131 #[doc = r" Returns `true` if the bit is clear (0)"]
132 #[inline]
133 pub fn bit_is_clear(&self) -> bool {
134 !self.bit()
135 }
136 #[doc = r" Returns `true` if the bit is set (1)"]
137 #[inline]
138 pub fn bit_is_set(&self) -> bool {
139 self.bit()
140 }
141}
142#[doc = r" Value of the field"]
143pub struct PLLMULR {
144 bits: u8,
145}
146impl PLLMULR {
147 #[doc = r" Value of the field as raw bits"]
148 #[inline]
149 pub fn bits(&self) -> u8 {
150 self.bits
151 }
152}
153#[doc = r" Value of the field"]
154pub struct USBPRESR {
155 bits: bool,
156}
157impl USBPRESR {
158 #[doc = r" Value of the field as raw bits"]
159 #[inline]
160 pub fn bit(&self) -> bool {
161 self.bits
162 }
163 #[doc = r" Returns `true` if the bit is clear (0)"]
164 #[inline]
165 pub fn bit_is_clear(&self) -> bool {
166 !self.bit()
167 }
168 #[doc = r" Returns `true` if the bit is set (1)"]
169 #[inline]
170 pub fn bit_is_set(&self) -> bool {
171 self.bit()
172 }
173}
174#[doc = r" Value of the field"]
175pub struct MCOR {
176 bits: u8,
177}
178impl MCOR {
179 #[doc = r" Value of the field as raw bits"]
180 #[inline]
181 pub fn bits(&self) -> u8 {
182 self.bits
183 }
184}
185#[doc = r" Value of the field"]
186pub struct MCOFR {
187 bits: bool,
188}
189impl MCOFR {
190 #[doc = r" Value of the field as raw bits"]
191 #[inline]
192 pub fn bit(&self) -> bool {
193 self.bits
194 }
195 #[doc = r" Returns `true` if the bit is clear (0)"]
196 #[inline]
197 pub fn bit_is_clear(&self) -> bool {
198 !self.bit()
199 }
200 #[doc = r" Returns `true` if the bit is set (1)"]
201 #[inline]
202 pub fn bit_is_set(&self) -> bool {
203 self.bit()
204 }
205}
206#[doc = r" Value of the field"]
207pub struct I2SSRCR {
208 bits: bool,
209}
210impl I2SSRCR {
211 #[doc = r" Value of the field as raw bits"]
212 #[inline]
213 pub fn bit(&self) -> bool {
214 self.bits
215 }
216 #[doc = r" Returns `true` if the bit is clear (0)"]
217 #[inline]
218 pub fn bit_is_clear(&self) -> bool {
219 !self.bit()
220 }
221 #[doc = r" Returns `true` if the bit is set (1)"]
222 #[inline]
223 pub fn bit_is_set(&self) -> bool {
224 self.bit()
225 }
226}
227#[doc = r" Proxy"]
228pub struct _SWW<'a> {
229 w: &'a mut W,
230}
231impl<'a> _SWW<'a> {
232 #[doc = r" Writes raw bits to the field"]
233 #[inline]
234 pub unsafe fn bits(self, value: u8) -> &'a mut W {
235 const MASK: u8 = 3;
236 const OFFSET: u8 = 0;
237 self.w.bits &= !((MASK as u32) << OFFSET);
238 self.w.bits |= ((value & MASK) as u32) << OFFSET;
239 self.w
240 }
241}
242#[doc = r" Proxy"]
243pub struct _HPREW<'a> {
244 w: &'a mut W,
245}
246impl<'a> _HPREW<'a> {
247 #[doc = r" Writes raw bits to the field"]
248 #[inline]
249 pub unsafe fn bits(self, value: u8) -> &'a mut W {
250 const MASK: u8 = 15;
251 const OFFSET: u8 = 4;
252 self.w.bits &= !((MASK as u32) << OFFSET);
253 self.w.bits |= ((value & MASK) as u32) << OFFSET;
254 self.w
255 }
256}
257#[doc = r" Proxy"]
258pub struct _PPRE1W<'a> {
259 w: &'a mut W,
260}
261impl<'a> _PPRE1W<'a> {
262 #[doc = r" Writes raw bits to the field"]
263 #[inline]
264 pub unsafe fn bits(self, value: u8) -> &'a mut W {
265 const MASK: u8 = 7;
266 const OFFSET: u8 = 8;
267 self.w.bits &= !((MASK as u32) << OFFSET);
268 self.w.bits |= ((value & MASK) as u32) << OFFSET;
269 self.w
270 }
271}
272#[doc = r" Proxy"]
273pub struct _PPRE2W<'a> {
274 w: &'a mut W,
275}
276impl<'a> _PPRE2W<'a> {
277 #[doc = r" Writes raw bits to the field"]
278 #[inline]
279 pub unsafe fn bits(self, value: u8) -> &'a mut W {
280 const MASK: u8 = 7;
281 const OFFSET: u8 = 11;
282 self.w.bits &= !((MASK as u32) << OFFSET);
283 self.w.bits |= ((value & MASK) as u32) << OFFSET;
284 self.w
285 }
286}
287#[doc = r" Proxy"]
288pub struct _PLLSRCW<'a> {
289 w: &'a mut W,
290}
291impl<'a> _PLLSRCW<'a> {
292 #[doc = r" Sets the field bit"]
293 pub fn set_bit(self) -> &'a mut W {
294 self.bit(true)
295 }
296 #[doc = r" Clears the field bit"]
297 pub fn clear_bit(self) -> &'a mut W {
298 self.bit(false)
299 }
300 #[doc = r" Writes raw bits to the field"]
301 #[inline]
302 pub fn bit(self, value: bool) -> &'a mut W {
303 const MASK: bool = true;
304 const OFFSET: u8 = 16;
305 self.w.bits &= !((MASK as u32) << OFFSET);
306 self.w.bits |= ((value & MASK) as u32) << OFFSET;
307 self.w
308 }
309}
310#[doc = r" Proxy"]
311pub struct _PLLXTPREW<'a> {
312 w: &'a mut W,
313}
314impl<'a> _PLLXTPREW<'a> {
315 #[doc = r" Sets the field bit"]
316 pub fn set_bit(self) -> &'a mut W {
317 self.bit(true)
318 }
319 #[doc = r" Clears the field bit"]
320 pub fn clear_bit(self) -> &'a mut W {
321 self.bit(false)
322 }
323 #[doc = r" Writes raw bits to the field"]
324 #[inline]
325 pub fn bit(self, value: bool) -> &'a mut W {
326 const MASK: bool = true;
327 const OFFSET: u8 = 17;
328 self.w.bits &= !((MASK as u32) << OFFSET);
329 self.w.bits |= ((value & MASK) as u32) << OFFSET;
330 self.w
331 }
332}
333#[doc = r" Proxy"]
334pub struct _PLLMULW<'a> {
335 w: &'a mut W,
336}
337impl<'a> _PLLMULW<'a> {
338 #[doc = r" Writes raw bits to the field"]
339 #[inline]
340 pub unsafe fn bits(self, value: u8) -> &'a mut W {
341 const MASK: u8 = 15;
342 const OFFSET: u8 = 18;
343 self.w.bits &= !((MASK as u32) << OFFSET);
344 self.w.bits |= ((value & MASK) as u32) << OFFSET;
345 self.w
346 }
347}
348#[doc = r" Proxy"]
349pub struct _USBPRESW<'a> {
350 w: &'a mut W,
351}
352impl<'a> _USBPRESW<'a> {
353 #[doc = r" Sets the field bit"]
354 pub fn set_bit(self) -> &'a mut W {
355 self.bit(true)
356 }
357 #[doc = r" Clears the field bit"]
358 pub fn clear_bit(self) -> &'a mut W {
359 self.bit(false)
360 }
361 #[doc = r" Writes raw bits to the field"]
362 #[inline]
363 pub fn bit(self, value: bool) -> &'a mut W {
364 const MASK: bool = true;
365 const OFFSET: u8 = 22;
366 self.w.bits &= !((MASK as u32) << OFFSET);
367 self.w.bits |= ((value & MASK) as u32) << OFFSET;
368 self.w
369 }
370}
371#[doc = r" Proxy"]
372pub struct _MCOW<'a> {
373 w: &'a mut W,
374}
375impl<'a> _MCOW<'a> {
376 #[doc = r" Writes raw bits to the field"]
377 #[inline]
378 pub unsafe fn bits(self, value: u8) -> &'a mut W {
379 const MASK: u8 = 7;
380 const OFFSET: u8 = 24;
381 self.w.bits &= !((MASK as u32) << OFFSET);
382 self.w.bits |= ((value & MASK) as u32) << OFFSET;
383 self.w
384 }
385}
386#[doc = r" Proxy"]
387pub struct _I2SSRCW<'a> {
388 w: &'a mut W,
389}
390impl<'a> _I2SSRCW<'a> {
391 #[doc = r" Sets the field bit"]
392 pub fn set_bit(self) -> &'a mut W {
393 self.bit(true)
394 }
395 #[doc = r" Clears the field bit"]
396 pub fn clear_bit(self) -> &'a mut W {
397 self.bit(false)
398 }
399 #[doc = r" Writes raw bits to the field"]
400 #[inline]
401 pub fn bit(self, value: bool) -> &'a mut W {
402 const MASK: bool = true;
403 const OFFSET: u8 = 23;
404 self.w.bits &= !((MASK as u32) << OFFSET);
405 self.w.bits |= ((value & MASK) as u32) << OFFSET;
406 self.w
407 }
408}
409impl R {
410 #[doc = r" Value of the register as raw bits"]
411 #[inline]
412 pub fn bits(&self) -> u32 {
413 self.bits
414 }
415 #[doc = "Bits 0:1 - System clock Switch"]
416 #[inline]
417 pub fn sw(&self) -> SWR {
418 let bits = {
419 const MASK: u8 = 3;
420 const OFFSET: u8 = 0;
421 ((self.bits >> OFFSET) & MASK as u32) as u8
422 };
423 SWR { bits }
424 }
425 #[doc = "Bits 2:3 - System Clock Switch Status"]
426 #[inline]
427 pub fn sws(&self) -> SWSR {
428 let bits = {
429 const MASK: u8 = 3;
430 const OFFSET: u8 = 2;
431 ((self.bits >> OFFSET) & MASK as u32) as u8
432 };
433 SWSR { bits }
434 }
435 #[doc = "Bits 4:7 - AHB prescaler"]
436 #[inline]
437 pub fn hpre(&self) -> HPRER {
438 let bits = {
439 const MASK: u8 = 15;
440 const OFFSET: u8 = 4;
441 ((self.bits >> OFFSET) & MASK as u32) as u8
442 };
443 HPRER { bits }
444 }
445 #[doc = "Bits 8:10 - APB Low speed prescaler (APB1)"]
446 #[inline]
447 pub fn ppre1(&self) -> PPRE1R {
448 let bits = {
449 const MASK: u8 = 7;
450 const OFFSET: u8 = 8;
451 ((self.bits >> OFFSET) & MASK as u32) as u8
452 };
453 PPRE1R { bits }
454 }
455 #[doc = "Bits 11:13 - APB high speed prescaler (APB2)"]
456 #[inline]
457 pub fn ppre2(&self) -> PPRE2R {
458 let bits = {
459 const MASK: u8 = 7;
460 const OFFSET: u8 = 11;
461 ((self.bits >> OFFSET) & MASK as u32) as u8
462 };
463 PPRE2R { bits }
464 }
465 #[doc = "Bit 16 - PLL entry clock source"]
466 #[inline]
467 pub fn pllsrc(&self) -> PLLSRCR {
468 let bits = {
469 const MASK: bool = true;
470 const OFFSET: u8 = 16;
471 ((self.bits >> OFFSET) & MASK as u32) != 0
472 };
473 PLLSRCR { bits }
474 }
475 #[doc = "Bit 17 - HSE divider for PLL entry"]
476 #[inline]
477 pub fn pllxtpre(&self) -> PLLXTPRER {
478 let bits = {
479 const MASK: bool = true;
480 const OFFSET: u8 = 17;
481 ((self.bits >> OFFSET) & MASK as u32) != 0
482 };
483 PLLXTPRER { bits }
484 }
485 #[doc = "Bits 18:21 - PLL Multiplication Factor"]
486 #[inline]
487 pub fn pllmul(&self) -> PLLMULR {
488 let bits = {
489 const MASK: u8 = 15;
490 const OFFSET: u8 = 18;
491 ((self.bits >> OFFSET) & MASK as u32) as u8
492 };
493 PLLMULR { bits }
494 }
495 #[doc = "Bit 22 - USB prescaler"]
496 #[inline]
497 pub fn usbpres(&self) -> USBPRESR {
498 let bits = {
499 const MASK: bool = true;
500 const OFFSET: u8 = 22;
501 ((self.bits >> OFFSET) & MASK as u32) != 0
502 };
503 USBPRESR { bits }
504 }
505 #[doc = "Bits 24:26 - Microcontroller clock output"]
506 #[inline]
507 pub fn mco(&self) -> MCOR {
508 let bits = {
509 const MASK: u8 = 7;
510 const OFFSET: u8 = 24;
511 ((self.bits >> OFFSET) & MASK as u32) as u8
512 };
513 MCOR { bits }
514 }
515 #[doc = "Bit 28 - Microcontroller Clock Output Flag"]
516 #[inline]
517 pub fn mcof(&self) -> MCOFR {
518 let bits = {
519 const MASK: bool = true;
520 const OFFSET: u8 = 28;
521 ((self.bits >> OFFSET) & MASK as u32) != 0
522 };
523 MCOFR { bits }
524 }
525 #[doc = "Bit 23 - I2S external clock source selection"]
526 #[inline]
527 pub fn i2ssrc(&self) -> I2SSRCR {
528 let bits = {
529 const MASK: bool = true;
530 const OFFSET: u8 = 23;
531 ((self.bits >> OFFSET) & MASK as u32) != 0
532 };
533 I2SSRCR { bits }
534 }
535}
536impl W {
537 #[doc = r" Reset value of the register"]
538 #[inline]
539 pub fn reset_value() -> W {
540 W { bits: 0 }
541 }
542 #[doc = r" Writes raw bits to the register"]
543 #[inline]
544 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
545 self.bits = bits;
546 self
547 }
548 #[doc = "Bits 0:1 - System clock Switch"]
549 #[inline]
550 pub fn sw(&mut self) -> _SWW {
551 _SWW { w: self }
552 }
553 #[doc = "Bits 4:7 - AHB prescaler"]
554 #[inline]
555 pub fn hpre(&mut self) -> _HPREW {
556 _HPREW { w: self }
557 }
558 #[doc = "Bits 8:10 - APB Low speed prescaler (APB1)"]
559 #[inline]
560 pub fn ppre1(&mut self) -> _PPRE1W {
561 _PPRE1W { w: self }
562 }
563 #[doc = "Bits 11:13 - APB high speed prescaler (APB2)"]
564 #[inline]
565 pub fn ppre2(&mut self) -> _PPRE2W {
566 _PPRE2W { w: self }
567 }
568 #[doc = "Bit 16 - PLL entry clock source"]
569 #[inline]
570 pub fn pllsrc(&mut self) -> _PLLSRCW {
571 _PLLSRCW { w: self }
572 }
573 #[doc = "Bit 17 - HSE divider for PLL entry"]
574 #[inline]
575 pub fn pllxtpre(&mut self) -> _PLLXTPREW {
576 _PLLXTPREW { w: self }
577 }
578 #[doc = "Bits 18:21 - PLL Multiplication Factor"]
579 #[inline]
580 pub fn pllmul(&mut self) -> _PLLMULW {
581 _PLLMULW { w: self }
582 }
583 #[doc = "Bit 22 - USB prescaler"]
584 #[inline]
585 pub fn usbpres(&mut self) -> _USBPRESW {
586 _USBPRESW { w: self }
587 }
588 #[doc = "Bits 24:26 - Microcontroller clock output"]
589 #[inline]
590 pub fn mco(&mut self) -> _MCOW {
591 _MCOW { w: self }
592 }
593 #[doc = "Bit 23 - I2S external clock source selection"]
594 #[inline]
595 pub fn i2ssrc(&mut self) -> _I2SSRCW {
596 _I2SSRCW { w: self }
597 }
598}