#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CR1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `CEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CENR {
#[doc = "Counter disabled"]
DISABLED,
#[doc = "Counter enabled"]
ENABLED,
}
impl CENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
CENR::DISABLED => false,
CENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> CENR {
match value {
false => CENR::DISABLED,
true => CENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == CENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == CENR::ENABLED
}
}
#[doc = r" Value of the field"]
pub struct UDISR {
bits: bool,
}
impl UDISR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct URSR {
bits: bool,
}
impl URSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = "Possible values of the field `OPM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum OPMR {
#[doc = "Counter is not stopped at update event"]
CONTINUOUS,
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
ONEPULSE,
}
impl OPMR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
OPMR::CONTINUOUS => false,
OPMR::ONEPULSE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> OPMR {
match value {
false => OPMR::CONTINUOUS,
true => OPMR::ONEPULSE,
}
}
#[doc = "Checks if the value of the field is `CONTINUOUS`"]
#[inline]
pub fn is_continuous(&self) -> bool {
*self == OPMR::CONTINUOUS
}
#[doc = "Checks if the value of the field is `ONEPULSE`"]
#[inline]
pub fn is_one_pulse(&self) -> bool {
*self == OPMR::ONEPULSE
}
}
#[doc = r" Value of the field"]
pub struct ARPER {
bits: bool,
}
impl ARPER {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct UIFREMAPR {
bits: bool,
}
impl UIFREMAPR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = "Values that can be written to the field `CEN`"]
pub enum CENW {
#[doc = "Counter disabled"]
DISABLED,
#[doc = "Counter enabled"]
ENABLED,
}
impl CENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
CENW::DISABLED => false,
CENW::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _CENW<'a> {
w: &'a mut W,
}
impl<'a> _CENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: CENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Counter disabled"]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(CENW::DISABLED)
}
#[doc = "Counter enabled"]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(CENW::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _UDISW<'a> {
w: &'a mut W,
}
impl<'a> _UDISW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _URSW<'a> {
w: &'a mut W,
}
impl<'a> _URSW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `OPM`"]
pub enum OPMW {
#[doc = "Counter is not stopped at update event"]
CONTINUOUS,
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
ONEPULSE,
}
impl OPMW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
OPMW::CONTINUOUS => false,
OPMW::ONEPULSE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _OPMW<'a> {
w: &'a mut W,
}
impl<'a> _OPMW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: OPMW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Counter is not stopped at update event"]
#[inline]
pub fn continuous(self) -> &'a mut W {
self.variant(OPMW::CONTINUOUS)
}
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
#[inline]
pub fn one_pulse(self) -> &'a mut W {
self.variant(OPMW::ONEPULSE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _ARPEW<'a> {
w: &'a mut W,
}
impl<'a> _ARPEW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _UIFREMAPW<'a> {
w: &'a mut W,
}
impl<'a> _UIFREMAPW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 11;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Counter enable"]
#[inline]
pub fn cen(&self) -> CENR {
CENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Update disable"]
#[inline]
pub fn udis(&self) -> UDISR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
};
UDISR { bits }
}
#[doc = "Bit 2 - Update request source"]
#[inline]
pub fn urs(&self) -> URSR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) != 0
};
URSR { bits }
}
#[doc = "Bit 3 - One-pulse mode"]
#[inline]
pub fn opm(&self) -> OPMR {
OPMR::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 7 - Auto-reload preload enable"]
#[inline]
pub fn arpe(&self) -> ARPER {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u32) != 0
};
ARPER { bits }
}
#[doc = "Bit 11 - UIF status bit remapping"]
#[inline]
pub fn uifremap(&self) -> UIFREMAPR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 11;
((self.bits >> OFFSET) & MASK as u32) != 0
};
UIFREMAPR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Counter enable"]
#[inline]
pub fn cen(&mut self) -> _CENW {
_CENW { w: self }
}
#[doc = "Bit 1 - Update disable"]
#[inline]
pub fn udis(&mut self) -> _UDISW {
_UDISW { w: self }
}
#[doc = "Bit 2 - Update request source"]
#[inline]
pub fn urs(&mut self) -> _URSW {
_URSW { w: self }
}
#[doc = "Bit 3 - One-pulse mode"]
#[inline]
pub fn opm(&mut self) -> _OPMW {
_OPMW { w: self }
}
#[doc = "Bit 7 - Auto-reload preload enable"]
#[inline]
pub fn arpe(&mut self) -> _ARPEW {
_ARPEW { w: self }
}
#[doc = "Bit 11 - UIF status bit remapping"]
#[inline]
pub fn uifremap(&mut self) -> _UIFREMAPW {
_UIFREMAPW { w: self }
}
}