1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 1"]
5 pub cr1: CR1,
6 #[doc = "0x04 - control register 2"]
7 pub cr2: CR2,
8 #[doc = "0x08 - slave mode control register"]
9 pub smcr: SMCR,
10 #[doc = "0x0c - DMA/Interrupt enable register"]
11 pub dier: DIER,
12 #[doc = "0x10 - status register"]
13 pub sr: SR,
14 #[doc = "0x14 - event generation register"]
15 pub egr: EGR,
16 #[doc = "0x18 - capture/compare mode register (output mode)"]
17 pub ccmr1_output: CCMR1_OUTPUT,
18 #[doc = "0x1c - capture/compare mode register (output mode)"]
19 pub ccmr2_output: CCMR2_OUTPUT,
20 #[doc = "0x20 - capture/compare enable register"]
21 pub ccer: CCER,
22 #[doc = "0x24 - counter"]
23 pub cnt: CNT,
24 #[doc = "0x28 - prescaler"]
25 pub psc: PSC,
26 #[doc = "0x2c - auto-reload register"]
27 pub arr: ARR,
28 #[doc = "0x30 - repetition counter register"]
29 pub rcr: RCR,
30 #[doc = "0x34 - capture/compare register 1"]
31 pub ccr1: CCR1,
32 #[doc = "0x38 - capture/compare register 2"]
33 pub ccr2: CCR2,
34 #[doc = "0x3c - capture/compare register 3"]
35 pub ccr3: CCR3,
36 #[doc = "0x40 - capture/compare register 4"]
37 pub ccr4: CCR4,
38 #[doc = "0x44 - break and dead-time register"]
39 pub bdtr: BDTR,
40 #[doc = "0x48 - DMA control register"]
41 pub dcr: DCR,
42 #[doc = "0x4c - DMA address for full transfer"]
43 pub dmar: DMAR,
44 _reserved0: [u8; 4usize],
45 #[doc = "0x54 - capture/compare mode register 3 (output mode)"]
46 pub ccmr3_output: CCMR3_OUTPUT,
47 #[doc = "0x58 - capture/compare register 5"]
48 pub ccr5: CCR5,
49 #[doc = "0x5c - capture/compare register 6"]
50 pub ccr6: CCR6,
51 #[doc = "0x60 - option registers"]
52 pub or: OR,
53}
54#[doc = "control register 1"]
55pub struct CR1 {
56 register: ::vcell::VolatileCell<u32>,
57}
58#[doc = "control register 1"]
59pub mod cr1;
60#[doc = "control register 2"]
61pub struct CR2 {
62 register: ::vcell::VolatileCell<u32>,
63}
64#[doc = "control register 2"]
65pub mod cr2;
66#[doc = "slave mode control register"]
67pub struct SMCR {
68 register: ::vcell::VolatileCell<u32>,
69}
70#[doc = "slave mode control register"]
71pub mod smcr;
72#[doc = "DMA/Interrupt enable register"]
73pub struct DIER {
74 register: ::vcell::VolatileCell<u32>,
75}
76#[doc = "DMA/Interrupt enable register"]
77pub mod dier;
78#[doc = "status register"]
79pub struct SR {
80 register: ::vcell::VolatileCell<u32>,
81}
82#[doc = "status register"]
83pub mod sr;
84#[doc = "event generation register"]
85pub struct EGR {
86 register: ::vcell::VolatileCell<u32>,
87}
88#[doc = "event generation register"]
89pub mod egr;
90#[doc = "capture/compare mode register (output mode)"]
91pub struct CCMR1_OUTPUT {
92 register: ::vcell::VolatileCell<u32>,
93}
94#[doc = "capture/compare mode register (output mode)"]
95pub mod ccmr1_output;
96#[doc = "capture/compare mode register 1 (input mode)"]
97pub struct CCMR1_INPUT {
98 register: ::vcell::VolatileCell<u32>,
99}
100#[doc = "capture/compare mode register 1 (input mode)"]
101pub mod ccmr1_input;
102#[doc = "capture/compare mode register (output mode)"]
103pub struct CCMR2_OUTPUT {
104 register: ::vcell::VolatileCell<u32>,
105}
106#[doc = "capture/compare mode register (output mode)"]
107pub mod ccmr2_output;
108#[doc = "capture/compare mode register 2 (input mode)"]
109pub struct CCMR2_INPUT {
110 register: ::vcell::VolatileCell<u32>,
111}
112#[doc = "capture/compare mode register 2 (input mode)"]
113pub mod ccmr2_input;
114#[doc = "capture/compare enable register"]
115pub struct CCER {
116 register: ::vcell::VolatileCell<u32>,
117}
118#[doc = "capture/compare enable register"]
119pub mod ccer;
120#[doc = "counter"]
121pub struct CNT {
122 register: ::vcell::VolatileCell<u32>,
123}
124#[doc = "counter"]
125pub mod cnt;
126#[doc = "prescaler"]
127pub struct PSC {
128 register: ::vcell::VolatileCell<u32>,
129}
130#[doc = "prescaler"]
131pub mod psc;
132#[doc = "auto-reload register"]
133pub struct ARR {
134 register: ::vcell::VolatileCell<u32>,
135}
136#[doc = "auto-reload register"]
137pub mod arr;
138#[doc = "repetition counter register"]
139pub struct RCR {
140 register: ::vcell::VolatileCell<u32>,
141}
142#[doc = "repetition counter register"]
143pub mod rcr;
144#[doc = "capture/compare register 1"]
145pub struct CCR1 {
146 register: ::vcell::VolatileCell<u32>,
147}
148#[doc = "capture/compare register 1"]
149pub mod ccr1;
150#[doc = "capture/compare register 2"]
151pub struct CCR2 {
152 register: ::vcell::VolatileCell<u32>,
153}
154#[doc = "capture/compare register 2"]
155pub mod ccr2;
156#[doc = "capture/compare register 3"]
157pub struct CCR3 {
158 register: ::vcell::VolatileCell<u32>,
159}
160#[doc = "capture/compare register 3"]
161pub mod ccr3;
162#[doc = "capture/compare register 4"]
163pub struct CCR4 {
164 register: ::vcell::VolatileCell<u32>,
165}
166#[doc = "capture/compare register 4"]
167pub mod ccr4;
168#[doc = "break and dead-time register"]
169pub struct BDTR {
170 register: ::vcell::VolatileCell<u32>,
171}
172#[doc = "break and dead-time register"]
173pub mod bdtr;
174#[doc = "DMA control register"]
175pub struct DCR {
176 register: ::vcell::VolatileCell<u32>,
177}
178#[doc = "DMA control register"]
179pub mod dcr;
180#[doc = "DMA address for full transfer"]
181pub struct DMAR {
182 register: ::vcell::VolatileCell<u32>,
183}
184#[doc = "DMA address for full transfer"]
185pub mod dmar;
186#[doc = "capture/compare mode register 3 (output mode)"]
187pub struct CCMR3_OUTPUT {
188 register: ::vcell::VolatileCell<u32>,
189}
190#[doc = "capture/compare mode register 3 (output mode)"]
191pub mod ccmr3_output;
192#[doc = "capture/compare register 5"]
193pub struct CCR5 {
194 register: ::vcell::VolatileCell<u32>,
195}
196#[doc = "capture/compare register 5"]
197pub mod ccr5;
198#[doc = "capture/compare register 6"]
199pub struct CCR6 {
200 register: ::vcell::VolatileCell<u32>,
201}
202#[doc = "capture/compare register 6"]
203pub mod ccr6;
204#[doc = "option registers"]
205pub struct OR {
206 register: ::vcell::VolatileCell<u32>,
207}
208#[doc = "option registers"]
209pub mod or;