# [ doc = "Reset and clock control" ]
# [ repr ( C ) ]
pub struct Rcc {
# [ doc = "0x00 - Clock control register" ]
pub cr: Cr,
# [ doc = "0x04 - Clock configuration register (RCC_CFGR)" ]
pub cfgr: Cfgr,
# [ doc = "0x08 - Clock interrupt register (RCC_CIR)" ]
pub cir: Cir,
# [ doc = "0x0c - APB2 peripheral reset register (RCC_APB2RSTR)" ]
pub apb2rstr: Apb2rstr,
# [ doc = "0x10 - APB1 peripheral reset register (RCC_APB1RSTR)" ]
pub apb1rstr: Apb1rstr,
# [ doc = "0x14 - AHB Peripheral Clock enable register (RCC_AHBENR)" ]
pub ahbenr: Ahbenr,
# [ doc = "0x18 - APB2 peripheral clock enable register (RCC_APB2ENR)" ]
pub apb2enr: Apb2enr,
# [ doc = "0x1c - APB1 peripheral clock enable register (RCC_APB1ENR)" ]
pub apb1enr: Apb1enr,
# [ doc = "0x20 - Backup domain control register (RCC_BDCR)" ]
pub bdcr: Bdcr,
# [ doc = "0x24 - Control/status register (RCC_CSR)" ]
pub csr: Csr,
# [ doc = "0x28 - AHB peripheral reset register" ]
pub ahbrstr: Ahbrstr,
# [ doc = "0x2c - Clock configuration register 2" ]
pub cfgr2: Cfgr2,
# [ doc = "0x30 - Clock configuration register 3" ]
pub cfgr3: Cfgr3,
}
# [ repr ( C ) ]
pub struct Cr {
register: ::volatile_register::RW<u32>,
}
impl Cr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&CrR, &'w mut CrW) -> &'w mut CrW
{
let bits = self.register.read();
let r = CrR { bits: bits };
let mut w = CrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> CrR {
CrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut CrW) -> &mut CrW
{
let mut w = CrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CrR {
bits: u32,
}
impl CrR {
# [ doc = "Bit 0 - Internal High Speed clock enable" ]
pub fn hsion(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - Internal High Speed clock ready flag" ]
pub fn hsirdy(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bits 3:7 - Internal High Speed clock trimming" ]
pub fn hsitrim(&self) -> u8 {
const MASK: u32 = 31;
const OFFSET: u8 = 3u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 8:15 - Internal High Speed clock Calibration" ]
pub fn hsical(&self) -> u8 {
const MASK: u32 = 255;
const OFFSET: u8 = 8u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 16 - External High Speed clock enable" ]
pub fn hseon(&self) -> bool {
const OFFSET: u8 = 16u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - External High Speed clock ready flag" ]
pub fn hserdy(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 18 - External High Speed clock Bypass" ]
pub fn hsebyp(&self) -> bool {
const OFFSET: u8 = 18u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 19 - Clock Security System enable" ]
pub fn csson(&self) -> bool {
const OFFSET: u8 = 19u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 24 - PLL enable" ]
pub fn pllon(&self) -> bool {
const OFFSET: u8 = 24u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 25 - PLL clock ready flag" ]
pub fn pllrdy(&self) -> bool {
const OFFSET: u8 = 25u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CrW {
bits: u32,
}
impl CrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
CrW { bits: 131 }
}
# [ doc = "Bit 0 - Internal High Speed clock enable" ]
pub fn hsion(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bits 3:7 - Internal High Speed clock trimming" ]
pub fn hsitrim(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 3u8;
const MASK: u8 = 31;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 16 - External High Speed clock enable" ]
pub fn hseon(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 16u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - External High Speed clock Bypass" ]
pub fn hsebyp(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 19 - Clock Security System enable" ]
pub fn csson(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 19u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 24 - PLL enable" ]
pub fn pllon(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 24u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Cfgr {
register: ::volatile_register::RW<u32>,
}
impl Cfgr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&CfgrR, &'w mut CfgrW) -> &'w mut CfgrW
{
let bits = self.register.read();
let r = CfgrR { bits: bits };
let mut w = CfgrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> CfgrR {
CfgrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut CfgrW) -> &mut CfgrW
{
let mut w = CfgrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CfgrR {
bits: u32,
}
impl CfgrR {
# [ doc = "Bits 0:1 - System clock Switch" ]
pub fn sw(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 0u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 2:3 - System Clock Switch Status" ]
pub fn sws(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 2u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 4:7 - AHB prescaler" ]
pub fn hpre(&self) -> u8 {
const MASK: u32 = 15;
const OFFSET: u8 = 4u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 8:10 - APB Low speed prescaler (APB1)" ]
pub fn ppre1(&self) -> u8 {
const MASK: u32 = 7;
const OFFSET: u8 = 8u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 11:13 - APB high speed prescaler (APB2)" ]
pub fn ppre2(&self) -> u8 {
const MASK: u32 = 7;
const OFFSET: u8 = 11u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 16 - PLL entry clock source" ]
pub fn pllsrc(&self) -> bool {
const OFFSET: u8 = 16u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - HSE divider for PLL entry" ]
pub fn pllxtpre(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bits 18:21 - PLL Multiplication Factor" ]
pub fn pllmul(&self) -> u8 {
const MASK: u32 = 15;
const OFFSET: u8 = 18u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 22 - USB prescaler" ]
pub fn usbpres(&self) -> bool {
const OFFSET: u8 = 22u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bits 24:26 - Microcontroller clock output" ]
pub fn mco(&self) -> u8 {
const MASK: u32 = 7;
const OFFSET: u8 = 24u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 28 - Microcontroller Clock Output Flag" ]
pub fn mcof(&self) -> bool {
const OFFSET: u8 = 28u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 23 - I2S external clock source selection" ]
pub fn i2ssrc(&self) -> bool {
const OFFSET: u8 = 23u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CfgrW {
bits: u32,
}
impl CfgrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
CfgrW { bits: 0 }
}
# [ doc = "Bits 0:1 - System clock Switch" ]
pub fn sw(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 0u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 4:7 - AHB prescaler" ]
pub fn hpre(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 4u8;
const MASK: u8 = 15;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 8:10 - APB Low speed prescaler (APB1)" ]
pub fn ppre1(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 8u8;
const MASK: u8 = 7;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 11:13 - APB high speed prescaler (APB2)" ]
pub fn ppre2(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 11u8;
const MASK: u8 = 7;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 16 - PLL entry clock source" ]
pub fn pllsrc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 16u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - HSE divider for PLL entry" ]
pub fn pllxtpre(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bits 18:21 - PLL Multiplication Factor" ]
pub fn pllmul(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 18u8;
const MASK: u8 = 15;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 22 - USB prescaler" ]
pub fn usbpres(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 22u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bits 24:26 - Microcontroller clock output" ]
pub fn mco(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 24u8;
const MASK: u8 = 7;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 23 - I2S external clock source selection" ]
pub fn i2ssrc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 23u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Cir {
register: ::volatile_register::RW<u32>,
}
impl Cir {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&CirR, &'w mut CirW) -> &'w mut CirW
{
let bits = self.register.read();
let r = CirR { bits: bits };
let mut w = CirW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> CirR {
CirR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut CirW) -> &mut CirW
{
let mut w = CirW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CirR {
bits: u32,
}
impl CirR {
# [ doc = "Bit 0 - LSI Ready Interrupt flag" ]
pub fn lsirdyf(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - LSE Ready Interrupt flag" ]
pub fn lserdyf(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 2 - HSI Ready Interrupt flag" ]
pub fn hsirdyf(&self) -> bool {
const OFFSET: u8 = 2u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 3 - HSE Ready Interrupt flag" ]
pub fn hserdyf(&self) -> bool {
const OFFSET: u8 = 3u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 4 - PLL Ready Interrupt flag" ]
pub fn pllrdyf(&self) -> bool {
const OFFSET: u8 = 4u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 7 - Clock Security System Interrupt flag" ]
pub fn cssf(&self) -> bool {
const OFFSET: u8 = 7u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 8 - LSI Ready Interrupt Enable" ]
pub fn lsirdyie(&self) -> bool {
const OFFSET: u8 = 8u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 9 - LSE Ready Interrupt Enable" ]
pub fn lserdyie(&self) -> bool {
const OFFSET: u8 = 9u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 10 - HSI Ready Interrupt Enable" ]
pub fn hsirdyie(&self) -> bool {
const OFFSET: u8 = 10u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 11 - HSE Ready Interrupt Enable" ]
pub fn hserdyie(&self) -> bool {
const OFFSET: u8 = 11u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 12 - PLL Ready Interrupt Enable" ]
pub fn pllrdyie(&self) -> bool {
const OFFSET: u8 = 12u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CirW {
bits: u32,
}
impl CirW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
CirW { bits: 0 }
}
# [ doc = "Bit 8 - LSI Ready Interrupt Enable" ]
pub fn lsirdyie(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 8u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 9 - LSE Ready Interrupt Enable" ]
pub fn lserdyie(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 9u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 10 - HSI Ready Interrupt Enable" ]
pub fn hsirdyie(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 10u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 11 - HSE Ready Interrupt Enable" ]
pub fn hserdyie(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 11u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 12 - PLL Ready Interrupt Enable" ]
pub fn pllrdyie(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 12u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 16 - LSI Ready Interrupt Clear" ]
pub fn lsirdyc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 16u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - LSE Ready Interrupt Clear" ]
pub fn lserdyc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - HSI Ready Interrupt Clear" ]
pub fn hsirdyc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 19 - HSE Ready Interrupt Clear" ]
pub fn hserdyc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 19u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 20 - PLL Ready Interrupt Clear" ]
pub fn pllrdyc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 20u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 23 - Clock security system interrupt clear" ]
pub fn cssc(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 23u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Apb2rstr {
register: ::volatile_register::RW<u32>,
}
impl Apb2rstr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&Apb2rstrR, &'w mut Apb2rstrW)
-> &'w mut Apb2rstrW
{
let bits = self.register.read();
let r = Apb2rstrR { bits: bits };
let mut w = Apb2rstrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> Apb2rstrR {
Apb2rstrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut Apb2rstrW) -> &mut Apb2rstrW
{
let mut w = Apb2rstrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb2rstrR {
bits: u32,
}
impl Apb2rstrR {
# [ doc = "Bit 0 - SYSCFG and COMP reset" ]
pub fn syscfgrst(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 11 - TIM1 timer reset" ]
pub fn tim1rst(&self) -> bool {
const OFFSET: u8 = 11u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 12 - SPI 1 reset" ]
pub fn spi1rst(&self) -> bool {
const OFFSET: u8 = 12u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 13 - TIM8 timer reset" ]
pub fn tim8rst(&self) -> bool {
const OFFSET: u8 = 13u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 14 - USART1 reset" ]
pub fn usart1rst(&self) -> bool {
const OFFSET: u8 = 14u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 16 - TIM15 timer reset" ]
pub fn tim15rst(&self) -> bool {
const OFFSET: u8 = 16u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - TIM16 timer reset" ]
pub fn tim16rst(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 18 - TIM17 timer reset" ]
pub fn tim17rst(&self) -> bool {
const OFFSET: u8 = 18u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb2rstrW {
bits: u32,
}
impl Apb2rstrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
Apb2rstrW { bits: 0 }
}
# [ doc = "Bit 0 - SYSCFG and COMP reset" ]
pub fn syscfgrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 11 - TIM1 timer reset" ]
pub fn tim1rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 11u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 12 - SPI 1 reset" ]
pub fn spi1rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 12u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 13 - TIM8 timer reset" ]
pub fn tim8rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 13u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 14 - USART1 reset" ]
pub fn usart1rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 14u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 16 - TIM15 timer reset" ]
pub fn tim15rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 16u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - TIM16 timer reset" ]
pub fn tim16rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - TIM17 timer reset" ]
pub fn tim17rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Apb1rstr {
register: ::volatile_register::RW<u32>,
}
impl Apb1rstr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&Apb1rstrR, &'w mut Apb1rstrW)
-> &'w mut Apb1rstrW
{
let bits = self.register.read();
let r = Apb1rstrR { bits: bits };
let mut w = Apb1rstrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> Apb1rstrR {
Apb1rstrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut Apb1rstrW) -> &mut Apb1rstrW
{
let mut w = Apb1rstrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb1rstrR {
bits: u32,
}
impl Apb1rstrR {
# [ doc = "Bit 0 - Timer 2 reset" ]
pub fn tim2rst(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - Timer 3 reset" ]
pub fn tim3rst(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 2 - Timer 14 reset" ]
pub fn tim4rst(&self) -> bool {
const OFFSET: u8 = 2u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 4 - Timer 6 reset" ]
pub fn tim6rst(&self) -> bool {
const OFFSET: u8 = 4u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 5 - Timer 7 reset" ]
pub fn tim7rst(&self) -> bool {
const OFFSET: u8 = 5u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 11 - Window watchdog reset" ]
pub fn wwdgrst(&self) -> bool {
const OFFSET: u8 = 11u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 14 - SPI2 reset" ]
pub fn spi2rst(&self) -> bool {
const OFFSET: u8 = 14u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 15 - SPI3 reset" ]
pub fn spi3rst(&self) -> bool {
const OFFSET: u8 = 15u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - USART 2 reset" ]
pub fn usart2rst(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 18 - USART3 reset" ]
pub fn usart3rst(&self) -> bool {
const OFFSET: u8 = 18u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 19 - UART 4 reset" ]
pub fn uart4rst(&self) -> bool {
const OFFSET: u8 = 19u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 20 - UART 5 reset" ]
pub fn uart5rst(&self) -> bool {
const OFFSET: u8 = 20u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 21 - I2C1 reset" ]
pub fn i2c1rst(&self) -> bool {
const OFFSET: u8 = 21u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 22 - I2C2 reset" ]
pub fn i2c2rst(&self) -> bool {
const OFFSET: u8 = 22u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 23 - USB reset" ]
pub fn usbrst(&self) -> bool {
const OFFSET: u8 = 23u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 25 - CAN reset" ]
pub fn canrst(&self) -> bool {
const OFFSET: u8 = 25u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 28 - Power interface reset" ]
pub fn pwrrst(&self) -> bool {
const OFFSET: u8 = 28u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 29 - DAC interface reset" ]
pub fn dacrst(&self) -> bool {
const OFFSET: u8 = 29u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb1rstrW {
bits: u32,
}
impl Apb1rstrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
Apb1rstrW { bits: 0 }
}
# [ doc = "Bit 0 - Timer 2 reset" ]
pub fn tim2rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 1 - Timer 3 reset" ]
pub fn tim3rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 1u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 2 - Timer 14 reset" ]
pub fn tim4rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 2u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 4 - Timer 6 reset" ]
pub fn tim6rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 4u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 5 - Timer 7 reset" ]
pub fn tim7rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 5u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 11 - Window watchdog reset" ]
pub fn wwdgrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 11u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 14 - SPI2 reset" ]
pub fn spi2rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 14u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 15 - SPI3 reset" ]
pub fn spi3rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 15u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - USART 2 reset" ]
pub fn usart2rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - USART3 reset" ]
pub fn usart3rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 19 - UART 4 reset" ]
pub fn uart4rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 19u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 20 - UART 5 reset" ]
pub fn uart5rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 20u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 21 - I2C1 reset" ]
pub fn i2c1rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 21u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 22 - I2C2 reset" ]
pub fn i2c2rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 22u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 23 - USB reset" ]
pub fn usbrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 23u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 25 - CAN reset" ]
pub fn canrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 25u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 28 - Power interface reset" ]
pub fn pwrrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 28u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 29 - DAC interface reset" ]
pub fn dacrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 29u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Ahbenr {
register: ::volatile_register::RW<u32>,
}
impl Ahbenr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&AhbenrR, &'w mut AhbenrW) -> &'w mut AhbenrW
{
let bits = self.register.read();
let r = AhbenrR { bits: bits };
let mut w = AhbenrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> AhbenrR {
AhbenrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut AhbenrW) -> &mut AhbenrW
{
let mut w = AhbenrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct AhbenrR {
bits: u32,
}
impl AhbenrR {
# [ doc = "Bit 0 - DMA1 clock enable" ]
pub fn dmaen(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - DMA2 clock enable" ]
pub fn dma2en(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 2 - SRAM interface clock enable" ]
pub fn sramen(&self) -> bool {
const OFFSET: u8 = 2u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 4 - FLITF clock enable" ]
pub fn flitfen(&self) -> bool {
const OFFSET: u8 = 4u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 6 - CRC clock enable" ]
pub fn crcen(&self) -> bool {
const OFFSET: u8 = 6u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - I/O port A clock enable" ]
pub fn iopaen(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 18 - I/O port B clock enable" ]
pub fn iopben(&self) -> bool {
const OFFSET: u8 = 18u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 19 - I/O port C clock enable" ]
pub fn iopcen(&self) -> bool {
const OFFSET: u8 = 19u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 20 - I/O port D clock enable" ]
pub fn iopden(&self) -> bool {
const OFFSET: u8 = 20u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 21 - I/O port E clock enable" ]
pub fn iopeen(&self) -> bool {
const OFFSET: u8 = 21u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 22 - I/O port F clock enable" ]
pub fn iopfen(&self) -> bool {
const OFFSET: u8 = 22u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 24 - Touch sensing controller clock enable" ]
pub fn tscen(&self) -> bool {
const OFFSET: u8 = 24u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 28 - ADC1 and ADC2 clock enable" ]
pub fn adc12en(&self) -> bool {
const OFFSET: u8 = 28u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 29 - ADC3 and ADC4 clock enable" ]
pub fn adc34en(&self) -> bool {
const OFFSET: u8 = 29u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct AhbenrW {
bits: u32,
}
impl AhbenrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
AhbenrW { bits: 20 }
}
# [ doc = "Bit 0 - DMA1 clock enable" ]
pub fn dmaen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 1 - DMA2 clock enable" ]
pub fn dma2en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 1u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 2 - SRAM interface clock enable" ]
pub fn sramen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 2u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 4 - FLITF clock enable" ]
pub fn flitfen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 4u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 6 - CRC clock enable" ]
pub fn crcen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 6u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - I/O port A clock enable" ]
pub fn iopaen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - I/O port B clock enable" ]
pub fn iopben(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 19 - I/O port C clock enable" ]
pub fn iopcen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 19u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 20 - I/O port D clock enable" ]
pub fn iopden(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 20u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 21 - I/O port E clock enable" ]
pub fn iopeen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 21u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 22 - I/O port F clock enable" ]
pub fn iopfen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 22u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 24 - Touch sensing controller clock enable" ]
pub fn tscen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 24u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 28 - ADC1 and ADC2 clock enable" ]
pub fn adc12en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 28u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 29 - ADC3 and ADC4 clock enable" ]
pub fn adc34en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 29u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Apb2enr {
register: ::volatile_register::RW<u32>,
}
impl Apb2enr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&Apb2enrR, &'w mut Apb2enrW) -> &'w mut Apb2enrW
{
let bits = self.register.read();
let r = Apb2enrR { bits: bits };
let mut w = Apb2enrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> Apb2enrR {
Apb2enrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut Apb2enrW) -> &mut Apb2enrW
{
let mut w = Apb2enrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb2enrR {
bits: u32,
}
impl Apb2enrR {
# [ doc = "Bit 0 - SYSCFG clock enable" ]
pub fn syscfgen(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 11 - TIM1 Timer clock enable" ]
pub fn tim1en(&self) -> bool {
const OFFSET: u8 = 11u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 12 - SPI 1 clock enable" ]
pub fn spi1en(&self) -> bool {
const OFFSET: u8 = 12u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 13 - TIM8 Timer clock enable" ]
pub fn tim8en(&self) -> bool {
const OFFSET: u8 = 13u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 14 - USART1 clock enable" ]
pub fn usart1en(&self) -> bool {
const OFFSET: u8 = 14u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 16 - TIM15 timer clock enable" ]
pub fn tim15en(&self) -> bool {
const OFFSET: u8 = 16u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - TIM16 timer clock enable" ]
pub fn tim16en(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 18 - TIM17 timer clock enable" ]
pub fn tim17en(&self) -> bool {
const OFFSET: u8 = 18u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb2enrW {
bits: u32,
}
impl Apb2enrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
Apb2enrW { bits: 0 }
}
# [ doc = "Bit 0 - SYSCFG clock enable" ]
pub fn syscfgen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 11 - TIM1 Timer clock enable" ]
pub fn tim1en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 11u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 12 - SPI 1 clock enable" ]
pub fn spi1en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 12u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 13 - TIM8 Timer clock enable" ]
pub fn tim8en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 13u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 14 - USART1 clock enable" ]
pub fn usart1en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 14u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 16 - TIM15 timer clock enable" ]
pub fn tim15en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 16u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - TIM16 timer clock enable" ]
pub fn tim16en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - TIM17 timer clock enable" ]
pub fn tim17en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Apb1enr {
register: ::volatile_register::RW<u32>,
}
impl Apb1enr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&Apb1enrR, &'w mut Apb1enrW) -> &'w mut Apb1enrW
{
let bits = self.register.read();
let r = Apb1enrR { bits: bits };
let mut w = Apb1enrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> Apb1enrR {
Apb1enrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut Apb1enrW) -> &mut Apb1enrW
{
let mut w = Apb1enrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb1enrR {
bits: u32,
}
impl Apb1enrR {
# [ doc = "Bit 0 - Timer 2 clock enable" ]
pub fn tim2en(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - Timer 3 clock enable" ]
pub fn tim3en(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 2 - Timer 4 clock enable" ]
pub fn tim4en(&self) -> bool {
const OFFSET: u8 = 2u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 4 - Timer 6 clock enable" ]
pub fn tim6en(&self) -> bool {
const OFFSET: u8 = 4u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 5 - Timer 7 clock enable" ]
pub fn tim7en(&self) -> bool {
const OFFSET: u8 = 5u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 11 - Window watchdog clock enable" ]
pub fn wwdgen(&self) -> bool {
const OFFSET: u8 = 11u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 14 - SPI 2 clock enable" ]
pub fn spi2en(&self) -> bool {
const OFFSET: u8 = 14u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 15 - SPI 3 clock enable" ]
pub fn spi3en(&self) -> bool {
const OFFSET: u8 = 15u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 17 - USART 2 clock enable" ]
pub fn usart2en(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 21 - I2C 1 clock enable" ]
pub fn i2c1en(&self) -> bool {
const OFFSET: u8 = 21u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 22 - I2C 2 clock enable" ]
pub fn i2c2en(&self) -> bool {
const OFFSET: u8 = 22u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 23 - USB clock enable" ]
pub fn usben(&self) -> bool {
const OFFSET: u8 = 23u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 25 - CAN clock enable" ]
pub fn canen(&self) -> bool {
const OFFSET: u8 = 25u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 28 - Power interface clock enable" ]
pub fn pwren(&self) -> bool {
const OFFSET: u8 = 28u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 29 - DAC interface clock enable" ]
pub fn dacen(&self) -> bool {
const OFFSET: u8 = 29u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Apb1enrW {
bits: u32,
}
impl Apb1enrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
Apb1enrW { bits: 0 }
}
# [ doc = "Bit 0 - Timer 2 clock enable" ]
pub fn tim2en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 1 - Timer 3 clock enable" ]
pub fn tim3en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 1u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 2 - Timer 4 clock enable" ]
pub fn tim4en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 2u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 4 - Timer 6 clock enable" ]
pub fn tim6en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 4u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 5 - Timer 7 clock enable" ]
pub fn tim7en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 5u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 11 - Window watchdog clock enable" ]
pub fn wwdgen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 11u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 14 - SPI 2 clock enable" ]
pub fn spi2en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 14u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 15 - SPI 3 clock enable" ]
pub fn spi3en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 15u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 17 - USART 2 clock enable" ]
pub fn usart2en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 21 - I2C 1 clock enable" ]
pub fn i2c1en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 21u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 22 - I2C 2 clock enable" ]
pub fn i2c2en(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 22u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 23 - USB clock enable" ]
pub fn usben(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 23u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 25 - CAN clock enable" ]
pub fn canen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 25u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 28 - Power interface clock enable" ]
pub fn pwren(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 28u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 29 - DAC interface clock enable" ]
pub fn dacen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 29u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Bdcr {
register: ::volatile_register::RW<u32>,
}
impl Bdcr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&BdcrR, &'w mut BdcrW) -> &'w mut BdcrW
{
let bits = self.register.read();
let r = BdcrR { bits: bits };
let mut w = BdcrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> BdcrR {
BdcrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut BdcrW) -> &mut BdcrW
{
let mut w = BdcrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct BdcrR {
bits: u32,
}
impl BdcrR {
# [ doc = "Bit 0 - External Low Speed oscillator enable" ]
pub fn lseon(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - External Low Speed oscillator ready" ]
pub fn lserdy(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 2 - External Low Speed oscillator bypass" ]
pub fn lsebyp(&self) -> bool {
const OFFSET: u8 = 2u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bits 3:4 - LSE oscillator drive capability" ]
pub fn lsedrv(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 3u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 8:9 - RTC clock source selection" ]
pub fn rtcsel(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 8u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 15 - RTC clock enable" ]
pub fn rtcen(&self) -> bool {
const OFFSET: u8 = 15u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 16 - Backup domain software reset" ]
pub fn bdrst(&self) -> bool {
const OFFSET: u8 = 16u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct BdcrW {
bits: u32,
}
impl BdcrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
BdcrW { bits: 0 }
}
# [ doc = "Bit 0 - External Low Speed oscillator enable" ]
pub fn lseon(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 2 - External Low Speed oscillator bypass" ]
pub fn lsebyp(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 2u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bits 3:4 - LSE oscillator drive capability" ]
pub fn lsedrv(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 3u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 8:9 - RTC clock source selection" ]
pub fn rtcsel(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 8u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 15 - RTC clock enable" ]
pub fn rtcen(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 15u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 16 - Backup domain software reset" ]
pub fn bdrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 16u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Csr {
register: ::volatile_register::RW<u32>,
}
impl Csr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&CsrR, &'w mut CsrW) -> &'w mut CsrW
{
let bits = self.register.read();
let r = CsrR { bits: bits };
let mut w = CsrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> CsrR {
CsrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut CsrW) -> &mut CsrW
{
let mut w = CsrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CsrR {
bits: u32,
}
impl CsrR {
# [ doc = "Bit 0 - Internal low speed oscillator enable" ]
pub fn lsion(&self) -> bool {
const OFFSET: u8 = 0u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 1 - Internal low speed oscillator ready" ]
pub fn lsirdy(&self) -> bool {
const OFFSET: u8 = 1u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 24 - Remove reset flag" ]
pub fn rmvf(&self) -> bool {
const OFFSET: u8 = 24u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 25 - Option byte loader reset flag" ]
pub fn oblrstf(&self) -> bool {
const OFFSET: u8 = 25u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 26 - PIN reset flag" ]
pub fn pinrstf(&self) -> bool {
const OFFSET: u8 = 26u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 27 - POR/PDR reset flag" ]
pub fn porrstf(&self) -> bool {
const OFFSET: u8 = 27u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 28 - Software reset flag" ]
pub fn sftrstf(&self) -> bool {
const OFFSET: u8 = 28u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 29 - Independent watchdog reset flag" ]
pub fn iwdgrstf(&self) -> bool {
const OFFSET: u8 = 29u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 30 - Window watchdog reset flag" ]
pub fn wwdgrstf(&self) -> bool {
const OFFSET: u8 = 30u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 31 - Low-power reset flag" ]
pub fn lpwrrstf(&self) -> bool {
const OFFSET: u8 = 31u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct CsrW {
bits: u32,
}
impl CsrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
CsrW { bits: 201326592 }
}
# [ doc = "Bit 0 - Internal low speed oscillator enable" ]
pub fn lsion(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 0u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 24 - Remove reset flag" ]
pub fn rmvf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 24u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 25 - Option byte loader reset flag" ]
pub fn oblrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 25u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 26 - PIN reset flag" ]
pub fn pinrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 26u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 27 - POR/PDR reset flag" ]
pub fn porrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 27u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 28 - Software reset flag" ]
pub fn sftrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 28u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 29 - Independent watchdog reset flag" ]
pub fn iwdgrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 29u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 30 - Window watchdog reset flag" ]
pub fn wwdgrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 30u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 31 - Low-power reset flag" ]
pub fn lpwrrstf(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 31u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Ahbrstr {
register: ::volatile_register::RW<u32>,
}
impl Ahbrstr {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&AhbrstrR, &'w mut AhbrstrW) -> &'w mut AhbrstrW
{
let bits = self.register.read();
let r = AhbrstrR { bits: bits };
let mut w = AhbrstrW { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> AhbrstrR {
AhbrstrR { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut AhbrstrW) -> &mut AhbrstrW
{
let mut w = AhbrstrW::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct AhbrstrR {
bits: u32,
}
impl AhbrstrR {
# [ doc = "Bit 17 - I/O port A reset" ]
pub fn ioparst(&self) -> bool {
const OFFSET: u8 = 17u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 18 - I/O port B reset" ]
pub fn iopbrst(&self) -> bool {
const OFFSET: u8 = 18u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 19 - I/O port C reset" ]
pub fn iopcrst(&self) -> bool {
const OFFSET: u8 = 19u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 20 - I/O port D reset" ]
pub fn iopdrst(&self) -> bool {
const OFFSET: u8 = 20u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 21 - I/O port E reset" ]
pub fn ioperst(&self) -> bool {
const OFFSET: u8 = 21u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 22 - I/O port F reset" ]
pub fn iopfrst(&self) -> bool {
const OFFSET: u8 = 22u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 24 - Touch sensing controller reset" ]
pub fn tscrst(&self) -> bool {
const OFFSET: u8 = 24u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 28 - ADC1 and ADC2 reset" ]
pub fn adc12rst(&self) -> bool {
const OFFSET: u8 = 28u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 29 - ADC3 and ADC4 reset" ]
pub fn adc34rst(&self) -> bool {
const OFFSET: u8 = 29u8;
self.bits & (1 << OFFSET) != 0
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct AhbrstrW {
bits: u32,
}
impl AhbrstrW {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
AhbrstrW { bits: 0 }
}
# [ doc = "Bit 17 - I/O port A reset" ]
pub fn ioparst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 17u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 18 - I/O port B reset" ]
pub fn iopbrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 18u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 19 - I/O port C reset" ]
pub fn iopcrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 19u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 20 - I/O port D reset" ]
pub fn iopdrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 20u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 21 - I/O port E reset" ]
pub fn ioperst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 21u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 22 - I/O port F reset" ]
pub fn iopfrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 22u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 24 - Touch sensing controller reset" ]
pub fn tscrst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 24u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 28 - ADC1 and ADC2 reset" ]
pub fn adc12rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 28u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 29 - ADC3 and ADC4 reset" ]
pub fn adc34rst(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 29u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
}
# [ repr ( C ) ]
pub struct Cfgr2 {
register: ::volatile_register::RW<u32>,
}
impl Cfgr2 {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&Cfgr2R, &'w mut Cfgr2W) -> &'w mut Cfgr2W
{
let bits = self.register.read();
let r = Cfgr2R { bits: bits };
let mut w = Cfgr2W { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> Cfgr2R {
Cfgr2R { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut Cfgr2W) -> &mut Cfgr2W
{
let mut w = Cfgr2W::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Cfgr2R {
bits: u32,
}
impl Cfgr2R {
# [ doc = "Bits 0:3 - PREDIV division factor" ]
pub fn prediv(&self) -> u8 {
const MASK: u32 = 15;
const OFFSET: u8 = 0u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 4:8 - ADC1 and ADC2 prescaler" ]
pub fn adc12pres(&self) -> u8 {
const MASK: u32 = 31;
const OFFSET: u8 = 4u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 9:13 - ADC3 and ADC4 prescaler" ]
pub fn adc34pres(&self) -> u8 {
const MASK: u32 = 31;
const OFFSET: u8 = 9u8;
((self.bits >> OFFSET) & MASK) as u8
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Cfgr2W {
bits: u32,
}
impl Cfgr2W {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
Cfgr2W { bits: 0 }
}
# [ doc = "Bits 0:3 - PREDIV division factor" ]
pub fn prediv(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 0u8;
const MASK: u8 = 15;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 4:8 - ADC1 and ADC2 prescaler" ]
pub fn adc12pres(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 4u8;
const MASK: u8 = 31;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 9:13 - ADC3 and ADC4 prescaler" ]
pub fn adc34pres(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 9u8;
const MASK: u8 = 31;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
}
# [ repr ( C ) ]
pub struct Cfgr3 {
register: ::volatile_register::RW<u32>,
}
impl Cfgr3 {
pub fn read_bits(&self) -> u32 {
self.register.read()
}
pub unsafe fn modify_bits<F>(&mut self, f: F)
where F: FnOnce(&mut u32)
{
let mut bits = self.register.read();
f(&mut bits);
self.register.write(bits);
}
pub unsafe fn write_bits(&mut self, bits: u32) {
self.register.write(bits);
}
pub fn modify<F>(&mut self, f: F)
where for<'w> F: FnOnce(&Cfgr3R, &'w mut Cfgr3W) -> &'w mut Cfgr3W
{
let bits = self.register.read();
let r = Cfgr3R { bits: bits };
let mut w = Cfgr3W { bits: bits };
f(&r, &mut w);
self.register.write(w.bits);
}
pub fn read(&self) -> Cfgr3R {
Cfgr3R { bits: self.register.read() }
}
pub fn write<F>(&mut self, f: F)
where F: FnOnce(&mut Cfgr3W) -> &mut Cfgr3W
{
let mut w = Cfgr3W::reset_value();
f(&mut w);
self.register.write(w.bits);
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Cfgr3R {
bits: u32,
}
impl Cfgr3R {
# [ doc = "Bits 0:1 - USART1 clock source selection" ]
pub fn usart1sw(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 0u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 4 - I2C1 clock source selection" ]
pub fn i2c1sw(&self) -> bool {
const OFFSET: u8 = 4u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 5 - I2C2 clock source selection" ]
pub fn i2c2sw(&self) -> bool {
const OFFSET: u8 = 5u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bits 16:17 - USART2 clock source selection" ]
pub fn usart2sw(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 16u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 18:19 - USART3 clock source selection" ]
pub fn usart3sw(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 18u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bit 8 - Timer1 clock source selection" ]
pub fn tim1sw(&self) -> bool {
const OFFSET: u8 = 8u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bit 9 - Timer8 clock source selection" ]
pub fn tim8sw(&self) -> bool {
const OFFSET: u8 = 9u8;
self.bits & (1 << OFFSET) != 0
}
# [ doc = "Bits 20:21 - UART4 clock source selection" ]
pub fn uart4sw(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 20u8;
((self.bits >> OFFSET) & MASK) as u8
}
# [ doc = "Bits 22:23 - UART5 clock source selection" ]
pub fn uart5sw(&self) -> u8 {
const MASK: u32 = 3;
const OFFSET: u8 = 22u8;
((self.bits >> OFFSET) & MASK) as u8
}
}
# [ derive ( Clone , Copy ) ]
# [ repr ( C ) ]
pub struct Cfgr3W {
bits: u32,
}
impl Cfgr3W {
# [ doc = r" Reset value" ]
pub fn reset_value() -> Self {
Cfgr3W { bits: 0 }
}
# [ doc = "Bits 0:1 - USART1 clock source selection" ]
pub fn usart1sw(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 0u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 4 - I2C1 clock source selection" ]
pub fn i2c1sw(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 4u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 5 - I2C2 clock source selection" ]
pub fn i2c2sw(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 5u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bits 16:17 - USART2 clock source selection" ]
pub fn usart2sw(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 16u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 18:19 - USART3 clock source selection" ]
pub fn usart3sw(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 18u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bit 8 - Timer1 clock source selection" ]
pub fn tim1sw(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 8u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bit 9 - Timer8 clock source selection" ]
pub fn tim8sw(&mut self, value: bool) -> &mut Self {
const OFFSET: u8 = 9u8;
if value {
self.bits |= 1 << OFFSET;
} else {
self.bits &= !(1 << OFFSET);
}
self
}
# [ doc = "Bits 20:21 - UART4 clock source selection" ]
pub fn uart4sw(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 20u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
# [ doc = "Bits 22:23 - UART5 clock source selection" ]
pub fn uart5sw(&mut self, value: u8) -> &mut Self {
const OFFSET: u8 = 22u8;
const MASK: u8 = 3;
self.bits &= !((MASK as u32) << OFFSET);
self.bits |= ((value & MASK) as u32) << OFFSET;
self
}
}