#[doc = "Reader of register CR"]
pub type R = crate::R<u32, super::CR>;
#[doc = "Writer for register CR"]
pub type W = crate::W<u32, super::CR>;
#[doc = "Register CR `reset()`'s with value 0"]
impl crate::ResetValue for super::CR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `CTPH`"]
pub type CTPH_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `CTPH`"]
pub struct CTPH_W<'a> {
w: &'a mut W,
}
impl<'a> CTPH_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 28)) | (((value as u32) & 0x0f) << 28);
self.w
}
}
#[doc = "Reader of field `CTPL`"]
pub type CTPL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `CTPL`"]
pub struct CTPL_W<'a> {
w: &'a mut W,
}
impl<'a> CTPL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
self.w
}
}
#[doc = "Reader of field `SSD`"]
pub type SSD_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SSD`"]
pub struct SSD_W<'a> {
w: &'a mut W,
}
impl<'a> SSD_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x7f << 17)) | (((value as u32) & 0x7f) << 17);
self.w
}
}
#[doc = "Reader of field `SSE`"]
pub type SSE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SSE`"]
pub struct SSE_W<'a> {
w: &'a mut W,
}
impl<'a> SSE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
#[doc = "Reader of field `SSPSC`"]
pub type SSPSC_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SSPSC`"]
pub struct SSPSC_W<'a> {
w: &'a mut W,
}
impl<'a> SSPSC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "Reader of field `PGPSC`"]
pub type PGPSC_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `PGPSC`"]
pub struct PGPSC_W<'a> {
w: &'a mut W,
}
impl<'a> PGPSC_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12);
self.w
}
}
#[doc = "Reader of field `MCV`"]
pub type MCV_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `MCV`"]
pub struct MCV_W<'a> {
w: &'a mut W,
}
impl<'a> MCV_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 5)) | (((value as u32) & 0x07) << 5);
self.w
}
}
#[doc = "Reader of field `IODEF`"]
pub type IODEF_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `IODEF`"]
pub struct IODEF_W<'a> {
w: &'a mut W,
}
impl<'a> IODEF_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Reader of field `SYNCPOL`"]
pub type SYNCPOL_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SYNCPOL`"]
pub struct SYNCPOL_W<'a> {
w: &'a mut W,
}
impl<'a> SYNCPOL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "Reader of field `AM`"]
pub type AM_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `AM`"]
pub struct AM_W<'a> {
w: &'a mut W,
}
impl<'a> AM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `START`"]
pub type START_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `START`"]
pub struct START_W<'a> {
w: &'a mut W,
}
impl<'a> START_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `TSCE`"]
pub type TSCE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TSCE`"]
pub struct TSCE_W<'a> {
w: &'a mut W,
}
impl<'a> TSCE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
impl R {
#[doc = "Bits 28:31 - Charge transfer pulse high"]
#[inline(always)]
pub fn ctph(&self) -> CTPH_R {
CTPH_R::new(((self.bits >> 28) & 0x0f) as u8)
}
#[doc = "Bits 24:27 - Charge transfer pulse low"]
#[inline(always)]
pub fn ctpl(&self) -> CTPL_R {
CTPL_R::new(((self.bits >> 24) & 0x0f) as u8)
}
#[doc = "Bits 17:23 - Spread spectrum deviation"]
#[inline(always)]
pub fn ssd(&self) -> SSD_R {
SSD_R::new(((self.bits >> 17) & 0x7f) as u8)
}
#[doc = "Bit 16 - Spread spectrum enable"]
#[inline(always)]
pub fn sse(&self) -> SSE_R {
SSE_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 15 - Spread spectrum prescaler"]
#[inline(always)]
pub fn sspsc(&self) -> SSPSC_R {
SSPSC_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bits 12:14 - pulse generator prescaler"]
#[inline(always)]
pub fn pgpsc(&self) -> PGPSC_R {
PGPSC_R::new(((self.bits >> 12) & 0x07) as u8)
}
#[doc = "Bits 5:7 - Max count value"]
#[inline(always)]
pub fn mcv(&self) -> MCV_R {
MCV_R::new(((self.bits >> 5) & 0x07) as u8)
}
#[doc = "Bit 4 - I/O Default mode"]
#[inline(always)]
pub fn iodef(&self) -> IODEF_R {
IODEF_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 3 - Synchronization pin polarity"]
#[inline(always)]
pub fn syncpol(&self) -> SYNCPOL_R {
SYNCPOL_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - Acquisition mode"]
#[inline(always)]
pub fn am(&self) -> AM_R {
AM_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - Start a new acquisition"]
#[inline(always)]
pub fn start(&self) -> START_R {
START_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - Touch sensing controller enable"]
#[inline(always)]
pub fn tsce(&self) -> TSCE_R {
TSCE_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 28:31 - Charge transfer pulse high"]
#[inline(always)]
pub fn ctph(&mut self) -> CTPH_W {
CTPH_W { w: self }
}
#[doc = "Bits 24:27 - Charge transfer pulse low"]
#[inline(always)]
pub fn ctpl(&mut self) -> CTPL_W {
CTPL_W { w: self }
}
#[doc = "Bits 17:23 - Spread spectrum deviation"]
#[inline(always)]
pub fn ssd(&mut self) -> SSD_W {
SSD_W { w: self }
}
#[doc = "Bit 16 - Spread spectrum enable"]
#[inline(always)]
pub fn sse(&mut self) -> SSE_W {
SSE_W { w: self }
}
#[doc = "Bit 15 - Spread spectrum prescaler"]
#[inline(always)]
pub fn sspsc(&mut self) -> SSPSC_W {
SSPSC_W { w: self }
}
#[doc = "Bits 12:14 - pulse generator prescaler"]
#[inline(always)]
pub fn pgpsc(&mut self) -> PGPSC_W {
PGPSC_W { w: self }
}
#[doc = "Bits 5:7 - Max count value"]
#[inline(always)]
pub fn mcv(&mut self) -> MCV_W {
MCV_W { w: self }
}
#[doc = "Bit 4 - I/O Default mode"]
#[inline(always)]
pub fn iodef(&mut self) -> IODEF_W {
IODEF_W { w: self }
}
#[doc = "Bit 3 - Synchronization pin polarity"]
#[inline(always)]
pub fn syncpol(&mut self) -> SYNCPOL_W {
SYNCPOL_W { w: self }
}
#[doc = "Bit 2 - Acquisition mode"]
#[inline(always)]
pub fn am(&mut self) -> AM_W {
AM_W { w: self }
}
#[doc = "Bit 1 - Start a new acquisition"]
#[inline(always)]
pub fn start(&mut self) -> START_W {
START_W { w: self }
}
#[doc = "Bit 0 - Touch sensing controller enable"]
#[inline(always)]
pub fn tsce(&mut self) -> TSCE_W {
TSCE_W { w: self }
}
}